Re: [RESEND] Re: [PATCH] PCI: dw-rockchip: Skip waiting for link up

Shawn Lin
2025-11-10T07:13:12Z

在 2025/11/10 星期一 12:56, FUKAUMI Naoki 写道:
> Hi Shawn,
>
> On 11/10/25 11:30, Shawn Lin wrote:
>> Hi Fukaumi
>>
>> 在 2025/11/10 星期一 7:26, FUKAUMI Naoki 写道:
>>> (RESEND: fix mani's email address)
>>>
>>> Hi Niklas,
>>>
>>> On 11/9/25 21:28, Niklas Cassel wrote:
>>>> On Sun, Nov 09, 2025 at 01:42:23PM +0900, FUKAUMI Naoki wrote:
>>>>> Hi Niklas,
>>>>>
>>>>> On 11/8/25 22:27, Niklas Cassel wrote:
>>>>> (snip)> (And btw. please test with the latest 6.18-rc, as, from
>>>>> experience,
>>>>> the
>>>>>> ASPM problems in earlier RCs can result in some weird problems
>>>>>> that are
>>>>>> not immediately deduced to be caused by the ASPM enablement.)
>>>>>
>>>>> Here is dmesg from v6.18-rc4:
>>>>>   https://gist.github.com/RadxaNaoki/40e1d049bff4f1d2d4773a5ba0ed9dff
>>>>
>>>> Same problem as before:
>>>> [    1.732538] pci_bus 0004:43: busn_res: can not insert [bus 43-41]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.732645] pci_bus 0004:43: busn_res: [bus 43-41] end is updated
>>>> to 43
>>>> [    1.732651] pci_bus 0004:43: busn_res: can not insert [bus 43]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.732661] pci 0004:42:00.0: devices behind bridge are unusable
>>>> because [bus 43] cannot be assigned for them
>>>> [    1.732840] pci_bus 0004:44: busn_res: can not insert [bus 44-41]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.732947] pci_bus 0004:44: busn_res: [bus 44-41] end is updated
>>>> to 44
>>>> [    1.732952] pci_bus 0004:44: busn_res: can not insert [bus 44]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.732962] pci 0004:42:02.0: devices behind bridge are unusable
>>>> because [bus 44] cannot be assigned for them
>>>> [    1.733134] pci_bus 0004:45: busn_res: can not insert [bus 45-41]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.733246] pci_bus 0004:45: busn_res: [bus 45-41] end is updated
>>>> to 45
>>>> [    1.733255] pci_bus 0004:45: busn_res: can not insert [bus 45]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.733266] pci 0004:42:06.0: devices behind bridge are unusable
>>>> because [bus 45] cannot be assigned for them
>>>> [    1.733438] pci_bus 0004:46: busn_res: can not insert [bus 46-41]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.733544] pci_bus 0004:46: busn_res: [bus 46-41] end is updated
>>>> to 46
>>>> [    1.733550] pci_bus 0004:46: busn_res: can not insert [bus 46]
>>>> under [bus 42-41] (conflicts with (null) [bus 42-41])
>>>> [    1.733560] pci 0004:42:0e.0: devices behind bridge are unusable
>>>> because [bus 46] cannot be assigned for them
>>>> [    1.733571] pci_bus 0004:42: busn_res: [bus 42-41] end is updated
>>>> to 46
>>>> [    1.733575] pci_bus 0004:42: busn_res: can not insert [bus 42-46]
>>>> under [bus 41] (conflicts with (null) [bus 41])
>>>> [    1.733585] pci 0004:41:00.0: devices behind bridge are unusable
>>>> because [bus 42-46] cannot be assigned for them
>>>> [    1.733596] pcieport 0004:40:00.0: bridge has subordinate 41 but
>>>> max busn 46
>>>>
>>>>
>>>> Seems like the ASM2806 switch, for some reason, is not ready.
>>>>
>>>> One change that Diederik pointed out is that in the "good" case,
>>>> the link is always in Gen1 speed.
>>>>
>>>> Perhaps you could build with CONFIG_PCI_QUIRKS=y and try this patch:
>>>>
>>>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>>>> index 214ed060ca1b..ac134d95a97f 100644
>>>> --- a/drivers/pci/quirks.c
>>>> +++ b/drivers/pci/quirks.c
>>>> @@ -96,6 +96,7 @@ int pcie_failed_link_retrain(struct pci_dev *dev)
>>>>   {
>>>>       static const struct pci_device_id ids[] = {
>>>>           { PCI_VDEVICE(ASMEDIA, 0x2824) }, /* ASMedia ASM2824 */
>>>> +        { PCI_VDEVICE(ASMEDIA, 0x2806) }, /* ASMedia ASM2806 */
>>>>           {}
>>>>       };
>>>>       u16 lnksta, lnkctl2;
>>>
>>> It doesn't help with either probing behind the bridge or the link speed.
>>>
>>>> If that does not work, perhaps you could try this patch
>>>> (assuming that all Rock 5C:s have a ASM2806 on pcie2x1l2):
>>>
>>> ROCK 5C has a PCIe FPC connector and I'm using Dual 2.5G Router HAT.
>>>   https://radxa.com/products/rock5/5c#techspec
>>>   https://radxa.com/products/accessories/dual-2-5g-router-hat
>>>
>>> Regarding the link speed, I initially suspected the FPC connector
>>> and/ or cable might be the issue. However, I tried the Dual 2.5G
>>> Router HAT with the ROCK 5A (which uses a different cable), and I got
>>> the same result.
>>>
>>> BTW, the link speed varies between 2Gb/s and 4Gb/s depending on the
>>> reboot. (with or without quirk)
>>
>> Could you please help check this patch?
>
> I tried your patch on top of vanilla v6.18-rc5.
>  https://gist.github.com/RadxaNaoki/b42252ce3209d9f6bc2d4c90c71956ae
>
> I got 2 oops,
>
> - its_msi_teardown+0x120/0x140
>   New with this patch.
>
> - of_pci_add_properties+0x284/0x4c4
>   It sometimes happen with vanilla v6.18-rcX.
>
> Nothing behind the bridge is probed.

Hi Fukaumi,

Thanks for testing. I just got a ASM2806 switch as yours and verified it
on vanilla v6.18-rc5. After 30 times of cold boot, two NVMes behind
ASM2806 work as expected. Nothing special happened when I checked
with PA as well. You could help check the log and lspci dump there[1].

[1]https://pastebin.com/sAF1fT0g

>
> Best regards,
>
> --
> FUKAUMI Naoki
> Radxa Computer (Shenzhen) Co., Ltd.
>
>> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
>> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
>> @@ -454,6 +454,8 @@ static irqreturn_t
>> rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
>>          struct dw_pcie *pci = &rockchip->pci;
>>          struct dw_pcie_rp *pp = &pci->pp;
>>          struct device *dev = pci->dev;
>> +       struct pci_bus *child, *root_bus = NULL;
>> +       struct pci_dev *bridge;
>>          u32 reg;
>>
>>          reg = rockchip_pcie_readl_apb(rockchip,
>> PCIE_CLIENT_INTR_STATUS_MISC);
>> @@ -462,12 +464,21 @@ static irqreturn_t
>> rockchip_pcie_rc_sys_irq_thread(int irq, void *arg)
>>          dev_dbg(dev, "PCIE_CLIENT_INTR_STATUS_MISC: %#x\n", reg);
>>          dev_dbg(dev, "LTSSM_STATUS: %#x\n",
>> rockchip_pcie_get_ltssm(rockchip));
>>
>> +       list_for_each_entry(child, &pp->bridge->bus->children, node) {
>> +               if (child->parent == pp->bridge->bus) {
>> +                       root_bus = child;
>> +                       bridge = root_bus->self;
>> +                       break;
>> +               }
>> +        }
>> +
>>          if (reg & PCIE_RDLH_LINK_UP_CHGED) {
>>                  if (rockchip_pcie_link_up(pci)) {
>>                          msleep(PCIE_RESET_CONFIG_WAIT_MS);
>>                          dev_dbg(dev, "Received Link up event.
>> Starting enumeration!\n");
>>                          /* Rescan the bus to enumerate endpoint
>> devices */
>>                          pci_lock_rescan_remove();
>> +                       pci_stop_and_remove_bus_device(bridge);
>>                          pci_rescan_bus(pp->bridge->bus);
>>                          pci_unlock_rescan_remove();
>>                  }
>>
>>
>>>
>>> Best regards,
>>>
>>> --
>>> FUKAUMI Naoki
>>> Radxa Computer (Shenzhen) Co., Ltd.
>>>
>>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/
>>>> arch/ arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
>>>> index dd7317bab613..26f8539d934a 100644
>>>> --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
>>>> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
>>>> @@ -452,6 +452,7 @@ &pcie2x1l2 {
>>>>       pinctrl-0 = <&pcie20x1_2_perstn_m0>;
>>>>       reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
>>>>       vpcie3v3-supply = <&pcie2x1l2_3v3>;
>>>> +    max-link-speed = <1>;
>>>>       status = "okay";
>>>>   };
>>>>
>>>>
>>>>
>>>> Kind regards,
>>>> Niklas
>>>>
>>>
>>>
>>
>>
>
>