From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, bhelgaas@google.com,
lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com,
imx@lists.linux.dev, kernel@pengutronix.de,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 02/10] PCI: imx6: Add ref clock for i.MX95 PCIe
Date: Sun, 19 Jan 2025 12:32:46 +0530 [thread overview]
Message-ID: <20250119070246.yfxogn4vv3jqfvzb@thinkpad> (raw)
In-Reply-To: <20241126075702.4099164-3-hongxing.zhu@nxp.com>
On Tue, Nov 26, 2024 at 03:56:54PM +0800, Richard Zhu wrote:
> Add "ref" clock to enable reference clock. To avoid breaking DT
> backwards compatibility, i.MX95 REF clock might be optional. Use
> devm_clk_get_optional() to fetch i.MX95 PCIe optional clocks in driver.
>
> If use external clock, ref clock should point to external reference.
>
> If use internal clock, CREF_EN in LAST_TO_REG controls reference output,
> which implement in drivers/clk/imx/clk-imx95-blk-ctl.c.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 16 +++++++++++-----
> 1 file changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 385f6323e3ca..f7e928e0a018 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -103,6 +103,7 @@ struct imx_pcie_drvdata {
> const char *gpr;
> const char * const *clk_names;
> const u32 clks_cnt;
> + const u32 clks_optional_cnt;
> const u32 ltssm_off;
> const u32 ltssm_mask;
> const u32 mode_off[IMX_PCIE_MAX_INSTANCES];
> @@ -1306,9 +1307,8 @@ static int imx_pcie_probe(struct platform_device *pdev)
> struct device_node *np;
> struct resource *dbi_base;
> struct device_node *node = dev->of_node;
> - int ret;
> + int i, ret, req_cnt;
> u16 val;
> - int i;
>
> imx_pcie = devm_kzalloc(dev, sizeof(*imx_pcie), GFP_KERNEL);
> if (!imx_pcie)
> @@ -1358,9 +1358,13 @@ static int imx_pcie_probe(struct platform_device *pdev)
> imx_pcie->clks[i].id = imx_pcie->drvdata->clk_names[i];
>
> /* Fetch clocks */
> - ret = devm_clk_bulk_get(dev, imx_pcie->drvdata->clks_cnt, imx_pcie->clks);
> + req_cnt = imx_pcie->drvdata->clks_cnt - imx_pcie->drvdata->clks_optional_cnt;
> + ret = devm_clk_bulk_get(dev, req_cnt, imx_pcie->clks);
> if (ret)
> return ret;
> + imx_pcie->clks[req_cnt].clk = devm_clk_get_optional(dev, "ref");
> + if (IS_ERR(imx_pcie->clks[req_cnt].clk))
> + return PTR_ERR(imx_pcie->clks[req_cnt].clk);
I think you should just switch to devm_clk_bulk_get_all() instead of getting the
clks separately. As I told previously, the DT binding should ensure that correct
clocks for the platforms are defined in DT and the driver has no business in
validating it. Driver should trust the DT instead (unless there is a valid
reason to not do so).
>
> if (imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_PHYDRV)) {
> imx_pcie->phy = devm_phy_get(dev, "pcie-phy");
> @@ -1509,6 +1513,7 @@ static const char * const imx8mm_clks[] = {"pcie_bus", "pcie", "pcie_aux"};
> static const char * const imx8mq_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"};
> static const char * const imx6sx_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"};
> static const char * const imx8q_clks[] = {"mstr", "slv", "dbi"};
> +static const char * const imx95_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux", "ref"};
And these static clock defines will go away too.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2025-01-19 7:04 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-26 7:56 [PATCH v7 0/10] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-11-26 7:56 ` [PATCH v7 01/10] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Richard Zhu
2024-11-26 7:56 ` [PATCH v7 02/10] PCI: imx6: Add ref clock for i.MX95 PCIe Richard Zhu
2025-01-19 7:02 ` Manivannan Sadhasivam [this message]
2025-01-20 2:49 ` Hongxing Zhu
2025-01-24 8:01 ` Manivannan Sadhasivam
2024-11-26 7:56 ` [PATCH v7 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-11-26 7:56 ` [PATCH v7 04/10] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-11-26 7:56 ` [PATCH v7 05/10] PCI: imx6: Deassert apps_reset in imx_pcie_deassert_core_reset() Richard Zhu
2025-06-06 21:03 ` Tim Harvey
2025-06-09 8:03 ` Hongxing Zhu
2025-06-10 0:24 ` Tim Harvey
2025-06-10 5:46 ` Hongxing Zhu
2024-11-26 7:56 ` [PATCH v7 06/10] PCI: imx6: Fix the missing reference clock disable logic Richard Zhu
2025-01-16 17:01 ` Bjorn Helgaas
2025-01-16 17:45 ` Frank Li
2024-11-26 7:56 ` [PATCH v7 07/10] PCI: imx6: Remove imx7d_pcie_init_phy() function Richard Zhu
2024-11-26 7:57 ` [PATCH v7 08/10] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-11-26 7:57 ` [PATCH v7 09/10] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PM support Richard Zhu
2024-11-26 7:57 ` [PATCH v7 10/10] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2025-01-14 21:00 ` [PATCH v7 0/10] A bunch of changes to refine i.MX PCIe driver Frank Li
2025-01-15 13:04 ` Krzysztof Wilczyński
2025-01-15 13:06 ` Krzysztof Wilczyński
2025-01-15 13:40 ` Krzysztof Wilczyński
2025-01-16 1:29 ` Hongxing Zhu
2025-01-16 1:44 ` Krzysztof Wilczy��ski
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