[PATCH v3 0/2] Add SMI LARBs reset for MediaTek MT8188 SoC

[Friday Yang <friday.yang@mediatek.com>]

Based on tag: next-20250120, linux-next/master

When we enable/disable power domain, the SMI LARBs linked to this power
domain could be affected by the bus glitch. To avoid this issue, SMI
need to apply clamp and reset opereations.

This patch mainly add these functions:
1) Add reset platform data for SMI LARBs to implement reset opereations
   in current clock control driver.
2) Add bindings to support the reset controller driver.

Changes v3:
- Drop the v2 smi reset binding
- Add '#reset-cells' for the clock controller in the image, camera
  and IPE subsystems.
- Drop the v2 smi reset driver and use the existed clock control driver
- Add reset platform data for SMI LARBs in the image, camera and IPE
  subsystems.

v2:
https://lore.kernel.org/lkml/20241120063305.8135-2-friday.yang@mediatek.com/
https://lore.kernel.org/lkml/20241120063305.8135-3-friday.yang@mediatek.com/

Friday Yang (2):
  dt-bindings: clock: mediatek: Add support for SMI LARBs reset
  clk: mediatek: Add support for SMI LARBs reset

 .../bindings/clock/mediatek,mt8188-clock.yaml | 21 +++++++++++++++++++
 drivers/clk/mediatek/clk-mt8188-cam.c         | 17 +++++++++++++++
 drivers/clk/mediatek/clk-mt8188-img.c         | 18 ++++++++++++++++
 drivers/clk/mediatek/clk-mt8188-ipe.c         | 14 +++++++++++++
 4 files changed, 70 insertions(+)

--
2.46.0