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* [RFC PATCH v1 0/1] base/of/cacheinfo: support l1-cache entry in dt
@ 2025-01-24 15:20 Alireza Sanaee
  2025-01-24 15:20 ` [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 " Alireza Sanaee
  0 siblings, 1 reply; 6+ messages in thread
From: Alireza Sanaee @ 2025-01-24 15:20 UTC (permalink / raw)
  To: robh, mark.rutland, devicetree
  Cc: linux-kernel, jonathan.cameron, linux-arm-kernel,
	shameerali.kolothum.thodi, zhao1.liu, yangyicong, rrendec,
	catalin.marinas

This RFC adds support for l1-cache entry in device tree. The changes are
based on the assumptions that nodes will have l1-cache to describe first
cache layer. This patch enable to describe shared caches for SMTs which
is not currently possible about which there were discussions already
[1,2,3].

The question that I am seeking feedback for is to see if this might be a
good way to go about solving this issue? Or instead using phandle and
index in CPU nodes is a better way to go according to prior discussion,
I have another patch this investigates this approach [2]. Apparently,
every single CPU will need to addressed in the cpu-map structure as per
Mark mentioned earlier [4].

Sample device tree:

             cpu@0 {
                        next-level-cache = <0x800b>;
                        phandle = <0x800a>;
                        reg = <0x00>;
                        enable-method = "psci";
                        compatible = "arm,cortex-a57";
                        device_type = "cpu";

                        l1-cache {
                                next-level-cache = <0x8008>;
                                cache-level = <0x01>;
                                d-cache-sets = <0x100>;
                                d-cache-block-size = <0x40>;
                                d-cache-size = <0x10000>;
                                i-cache-sets = <0x100>;
                                i-cache-block-size = <0x40>;
                                i-cache-size = <0x10000>;
                                phandle = <0x800b>;
                        };
                };

                cpu@1 {
                        next-level-cache = <0x8009>;
                        phandle = <0x8007>;
                        reg = <0x01>;
                        enable-method = "psci";
                        compatible = "arm,cortex-a57";
                        device_type = "cpu";

                        l1-cache {
                                next-level-cache = <0x8008>;
                                cache-level = <0x01>;
                                d-cache-sets = <0x100>;
                                d-cache-block-size = <0x40>;
                                d-cache-size = <0x10000>;
                                i-cache-sets = <0x100>;
                                i-cache-block-size = <0x40>;
                                i-cache-size = <0x10000>;
                                phandle = <0x8009>;
                        };

                        l2-cache {
                                next-level-cache = <0x8002>;
                                cache-level = <0x02>;
                                cache-unified;
                                cache-sets = <0x800>;
                                cache-block-size = <0x40>;
                                cache-size = <0x100000>;
                                phandle = <0x8008>;
                        };
                };

1) https://lore.kernel.org/linux-devicetree/CAL_JsqLGEvGBQ0W_B6+5cME1UEhuKXadBB-6=GoN1tmavw9K_w@mail.gmail.com/
2) https://lore.kernel.org/linux-arm-kernel/20250110161057.445-1-alireza.sanaee@huawei.com/
3) https://mail.gnu.org/archive/html/qemu-arm/2025-01/msg00014.html
4) https://lore.kernel.org/linux-arm-kernel/Z4FJZPRg75YIUR2l@J2N7QTR9R3/

Alireza Sanaee (1):
  base/of/cacheinfo: support l1 entry in dt

 drivers/base/cacheinfo.c | 54 +++++++++++++++++++++++++++-------------
 1 file changed, 37 insertions(+), 17 deletions(-)

-- 
2.34.1



^ permalink raw reply	[flat|nested] 6+ messages in thread

* [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 entry in dt
  2025-01-24 15:20 [RFC PATCH v1 0/1] base/of/cacheinfo: support l1-cache entry in dt Alireza Sanaee
@ 2025-01-24 15:20 ` Alireza Sanaee
  2025-01-27 12:11   ` Jonathan Cameron
  2025-01-27 16:24   ` Rob Herring
  0 siblings, 2 replies; 6+ messages in thread
From: Alireza Sanaee @ 2025-01-24 15:20 UTC (permalink / raw)
  To: robh, mark.rutland, devicetree
  Cc: linux-kernel, jonathan.cameron, linux-arm-kernel,
	shameerali.kolothum.thodi, zhao1.liu, yangyicong, rrendec,
	catalin.marinas

This commit simply assumes that CPU node entries may point to a cache
node that basically act as a l1-cache and there are some CPU nodes
without describing any caches but a next-level-cache property that
points to l1-cache.

Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
---
 drivers/base/cacheinfo.c | 54 +++++++++++++++++++++++++++-------------
 1 file changed, 37 insertions(+), 17 deletions(-)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index cf0d455209d7..d119228fc392 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -83,7 +83,31 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
 
 #ifdef CONFIG_OF
 
-static bool of_check_cache_nodes(struct device_node *np);
+static bool of_check_cache_node(struct device_node *np) {
+	if (of_property_present(np, "cache-size")   ||
+	    of_property_present(np, "i-cache-size") ||
+	    of_property_present(np, "d-cache-size") ||
+	    of_property_present(np, "cache-unified"))
+		return true;
+	return false;
+}
+
+static bool of_check_cache_nodes(struct device_node *np)
+{
+	if (of_property_present(np, "cache-size")   ||
+	    of_property_present(np, "i-cache-size") ||
+	    of_property_present(np, "d-cache-size") ||
+	    of_property_present(np, "cache-unified"))
+		return true;
+
+	struct device_node *next __free(device_node) = of_find_next_cache_node(np);
+	if (next) {
+		return true;
+	}
+
+	return false;
+}
+
 
 /* OF properties to query for a given cache type */
 struct cache_type_info {
@@ -218,11 +242,23 @@ static int cache_setup_of_node(unsigned int cpu)
 	while (index < cache_leaves(cpu)) {
 		this_leaf = per_cpu_cacheinfo_idx(cpu, index);
 		if (this_leaf->level != 1) {
+			/* Always go one level down for level > 1 */
 			struct device_node *prev __free(device_node) = np;
 			np = of_find_next_cache_node(np);
 			if (!np)
 				break;
+		} else {
+			/* For level 1, check compatibility */
+			if (!of_device_is_compatible(np, "cache") &&
+			    !of_check_cache_node(np)) {
+				struct device_node *prev __free(device_node) = np;
+				np = of_find_next_cache_node(np);
+				if (!np)
+					break;
+				continue; /* Skip to next index without processing */
+			}
 		}
+
 		cache_of_set_props(this_leaf, np);
 		this_leaf->fw_token = np;
 		index++;
@@ -234,22 +270,6 @@ static int cache_setup_of_node(unsigned int cpu)
 	return 0;
 }
 
-static bool of_check_cache_nodes(struct device_node *np)
-{
-	if (of_property_present(np, "cache-size")   ||
-	    of_property_present(np, "i-cache-size") ||
-	    of_property_present(np, "d-cache-size") ||
-	    of_property_present(np, "cache-unified"))
-		return true;
-
-	struct device_node *next __free(device_node) = of_find_next_cache_node(np);
-	if (next) {
-		return true;
-	}
-
-	return false;
-}
-
 static int of_count_cache_leaves(struct device_node *np)
 {
 	unsigned int leaves = 0;
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 entry in dt
  2025-01-24 15:20 ` [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 " Alireza Sanaee
@ 2025-01-27 12:11   ` Jonathan Cameron
  2025-01-28 11:44     ` Alireza Sanaee
  2025-01-27 16:24   ` Rob Herring
  1 sibling, 1 reply; 6+ messages in thread
From: Jonathan Cameron @ 2025-01-27 12:11 UTC (permalink / raw)
  To: Alireza Sanaee
  Cc: robh, mark.rutland, devicetree, linux-kernel, linux-arm-kernel,
	shameerali.kolothum.thodi, zhao1.liu, yangyicong, rrendec,
	catalin.marinas

On Fri, 24 Jan 2025 15:20:08 +0000
Alireza Sanaee <alireza.sanaee@huawei.com> wrote:

> This commit simply assumes that CPU node entries may point to a cache
> node that basically act as a l1-cache and there are some CPU nodes
> without describing any caches but a next-level-cache property that
> points to l1-cache.
> 
> Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> ---
>  drivers/base/cacheinfo.c | 54 +++++++++++++++++++++++++++-------------
>  1 file changed, 37 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index cf0d455209d7..d119228fc392 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -83,7 +83,31 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
>  
>  #ifdef CONFIG_OF
>  
> -static bool of_check_cache_nodes(struct device_node *np);
> +static bool of_check_cache_node(struct device_node *np) {
> +	if (of_property_present(np, "cache-size")   ||
> +	    of_property_present(np, "i-cache-size") ||
> +	    of_property_present(np, "d-cache-size") ||
> +	    of_property_present(np, "cache-unified"))
> +		return true;
> +	return false;
> +}
> +
> +static bool of_check_cache_nodes(struct device_node *np)
> +{
> +	if (of_property_present(np, "cache-size")   ||
> +	    of_property_present(np, "i-cache-size") ||
> +	    of_property_present(np, "d-cache-size") ||
> +	    of_property_present(np, "cache-unified"))
> +		return true;

	if (of_check_cache_node(np))
		return true;
> +
> +	struct device_node *next __free(device_node) = of_find_next_cache_node(np);
> +	if (next) {

Hmm. Was like this before, but general kernel style is no brackets for single statement
if block.

> +		return true;
> +	}
> +
> +	return false;
> +}
> +
>  
>  /* OF properties to query for a given cache type */
>  struct cache_type_info {
> @@ -218,11 +242,23 @@ static int cache_setup_of_node(unsigned int cpu)
>  	while (index < cache_leaves(cpu)) {
>  		this_leaf = per_cpu_cacheinfo_idx(cpu, index);
>  		if (this_leaf->level != 1) {
> +			/* Always go one level down for level > 1 */
>  			struct device_node *prev __free(device_node) = np;
>  			np = of_find_next_cache_node(np);
>  			if (!np)
>  				break;
> +		} else {
> +			/* For level 1, check compatibility */
> +			if (!of_device_is_compatible(np, "cache") &&
> +			    !of_check_cache_node(np)) {
> +				struct device_node *prev __free(device_node) = np;
> +				np = of_find_next_cache_node(np);
> +				if (!np)
> +					break;
> +				continue; /* Skip to next index without processing */
> +			}
>  		}
> +
>  		cache_of_set_props(this_leaf, np);
>  		this_leaf->fw_token = np;
>  		index++;
> @@ -234,22 +270,6 @@ static int cache_setup_of_node(unsigned int cpu)
>  	return 0;
>  }
>  
> -static bool of_check_cache_nodes(struct device_node *np)
> -{
> -	if (of_property_present(np, "cache-size")   ||
> -	    of_property_present(np, "i-cache-size") ||
> -	    of_property_present(np, "d-cache-size") ||
> -	    of_property_present(np, "cache-unified"))
> -		return true;
> -
> -	struct device_node *next __free(device_node) = of_find_next_cache_node(np);
> -	if (next) {
> -		return true;
> -	}
> -
> -	return false;
> -}
> -
>  static int of_count_cache_leaves(struct device_node *np)
>  {
>  	unsigned int leaves = 0;



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 entry in dt
  2025-01-24 15:20 ` [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 " Alireza Sanaee
  2025-01-27 12:11   ` Jonathan Cameron
@ 2025-01-27 16:24   ` Rob Herring
  2025-01-28 11:48     ` Alireza Sanaee
  1 sibling, 1 reply; 6+ messages in thread
From: Rob Herring @ 2025-01-27 16:24 UTC (permalink / raw)
  To: Alireza Sanaee
  Cc: mark.rutland, devicetree, linux-kernel, jonathan.cameron,
	linux-arm-kernel, shameerali.kolothum.thodi, zhao1.liu,
	yangyicong, rrendec, catalin.marinas

On Fri, Jan 24, 2025 at 9:20 AM Alireza Sanaee
<alireza.sanaee@huawei.com> wrote:
>
> This commit simply assumes that CPU node entries may point to a cache
> node that basically act as a l1-cache and there are some CPU nodes
> without describing any caches but a next-level-cache property that
> points to l1-cache.

This commit message needs some work. Read documentation on writing
commit messages.

Why/when does describing L1 cache in the cpu nodes not work? That is
the assumption in the bindings. If we're changing that, there may need
to be a binding/spec change.

>
> Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> ---
>  drivers/base/cacheinfo.c | 54 +++++++++++++++++++++++++++-------------
>  1 file changed, 37 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index cf0d455209d7..d119228fc392 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -83,7 +83,31 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
>
>  #ifdef CONFIG_OF
>
> -static bool of_check_cache_nodes(struct device_node *np);
> +static bool of_check_cache_node(struct device_node *np) {
> +       if (of_property_present(np, "cache-size")   ||
> +           of_property_present(np, "i-cache-size") ||
> +           of_property_present(np, "d-cache-size") ||
> +           of_property_present(np, "cache-unified"))
> +               return true;
> +       return false;
> +}
> +
> +static bool of_check_cache_nodes(struct device_node *np)
> +{
> +       if (of_property_present(np, "cache-size")   ||
> +           of_property_present(np, "i-cache-size") ||
> +           of_property_present(np, "d-cache-size") ||
> +           of_property_present(np, "cache-unified"))

This is the same code as of_check_cache_node(), use it.

> +               return true;
> +
> +       struct device_node *next __free(device_node) = of_find_next_cache_node(np);
> +       if (next) {
> +               return true;
> +       }
> +
> +       return false;
> +}
> +
>
>  /* OF properties to query for a given cache type */
>  struct cache_type_info {
> @@ -218,11 +242,23 @@ static int cache_setup_of_node(unsigned int cpu)
>         while (index < cache_leaves(cpu)) {
>                 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
>                 if (this_leaf->level != 1) {
> +                       /* Always go one level down for level > 1 */
>                         struct device_node *prev __free(device_node) = np;
>                         np = of_find_next_cache_node(np);
>                         if (!np)
>                                 break;
> +               } else {
> +                       /* For level 1, check compatibility */
> +                       if (!of_device_is_compatible(np, "cache") &&
> +                           !of_check_cache_node(np)) {
> +                               struct device_node *prev __free(device_node) = np;
> +                               np = of_find_next_cache_node(np);
> +                               if (!np)
> +                                       break;
> +                               continue; /* Skip to next index without processing */
> +                       }
>                 }
> +
>                 cache_of_set_props(this_leaf, np);
>                 this_leaf->fw_token = np;
>                 index++;
> @@ -234,22 +270,6 @@ static int cache_setup_of_node(unsigned int cpu)
>         return 0;
>  }
>
> -static bool of_check_cache_nodes(struct device_node *np)
> -{
> -       if (of_property_present(np, "cache-size")   ||
> -           of_property_present(np, "i-cache-size") ||
> -           of_property_present(np, "d-cache-size") ||
> -           of_property_present(np, "cache-unified"))
> -               return true;
> -
> -       struct device_node *next __free(device_node) = of_find_next_cache_node(np);
> -       if (next) {
> -               return true;
> -       }
> -
> -       return false;
> -}
> -
>  static int of_count_cache_leaves(struct device_node *np)
>  {
>         unsigned int leaves = 0;
> --
> 2.34.1
>


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 entry in dt
  2025-01-27 12:11   ` Jonathan Cameron
@ 2025-01-28 11:44     ` Alireza Sanaee
  0 siblings, 0 replies; 6+ messages in thread
From: Alireza Sanaee @ 2025-01-28 11:44 UTC (permalink / raw)
  To: Jonathan Cameron
  Cc: robh, mark.rutland, devicetree, linux-kernel, linux-arm-kernel,
	shameerali.kolothum.thodi, zhao1.liu, yangyicong, rrendec,
	catalin.marinas

On Mon, 27 Jan 2025 12:11:36 +0000
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:

> On Fri, 24 Jan 2025 15:20:08 +0000
> Alireza Sanaee <alireza.sanaee@huawei.com> wrote:
> 
> > This commit simply assumes that CPU node entries may point to a
> > cache node that basically act as a l1-cache and there are some CPU
> > nodes without describing any caches but a next-level-cache property
> > that points to l1-cache.
> > 
> > Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> > ---
> >  drivers/base/cacheinfo.c | 54
> > +++++++++++++++++++++++++++------------- 1 file changed, 37
> > insertions(+), 17 deletions(-)
> > 
> > diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> > index cf0d455209d7..d119228fc392 100644
> > --- a/drivers/base/cacheinfo.c
> > +++ b/drivers/base/cacheinfo.c
> > @@ -83,7 +83,31 @@ bool last_level_cache_is_shared(unsigned int
> > cpu_x, unsigned int cpu_y) 
> >  #ifdef CONFIG_OF
> >  
> > -static bool of_check_cache_nodes(struct device_node *np);
> > +static bool of_check_cache_node(struct device_node *np) {
> > +	if (of_property_present(np, "cache-size")   ||
> > +	    of_property_present(np, "i-cache-size") ||
> > +	    of_property_present(np, "d-cache-size") ||
> > +	    of_property_present(np, "cache-unified"))
> > +		return true;
> > +	return false;
> > +}
> > +
> > +static bool of_check_cache_nodes(struct device_node *np)
> > +{
> > +	if (of_property_present(np, "cache-size")   ||
> > +	    of_property_present(np, "i-cache-size") ||
> > +	    of_property_present(np, "d-cache-size") ||
> > +	    of_property_present(np, "cache-unified"))
> > +		return true;  
> 
> 	if (of_check_cache_node(np))
> 		return true;
Hi Jonathan,

Thanks for the feedback, I'll replace this.
> > +
> > +	struct device_node *next __free(device_node) =
> > of_find_next_cache_node(np);
> > +	if (next) {  
> 
> Hmm. Was like this before, but general kernel style is no brackets
> for single statement if block.

Makes sense, will change this too on the next version.

Thanks,
Alireza
> 
> > +		return true;
> > +	}
> > +
> > +	return false;
> > +}
> > +
> >  
> >  /* OF properties to query for a given cache type */
> >  struct cache_type_info {
> > @@ -218,11 +242,23 @@ static int cache_setup_of_node(unsigned int
> > cpu) while (index < cache_leaves(cpu)) {
> >  		this_leaf = per_cpu_cacheinfo_idx(cpu, index);
> >  		if (this_leaf->level != 1) {
> > +			/* Always go one level down for level > 1
> > */ struct device_node *prev __free(device_node) = np;
> >  			np = of_find_next_cache_node(np);
> >  			if (!np)
> >  				break;
> > +		} else {
> > +			/* For level 1, check compatibility */
> > +			if (!of_device_is_compatible(np, "cache")
> > &&
> > +			    !of_check_cache_node(np)) {
> > +				struct device_node *prev
> > __free(device_node) = np;
> > +				np = of_find_next_cache_node(np);
> > +				if (!np)
> > +					break;
> > +				continue; /* Skip to next index
> > without processing */
> > +			}
> >  		}
> > +
> >  		cache_of_set_props(this_leaf, np);
> >  		this_leaf->fw_token = np;
> >  		index++;
> > @@ -234,22 +270,6 @@ static int cache_setup_of_node(unsigned int
> > cpu) return 0;
> >  }
> >  
> > -static bool of_check_cache_nodes(struct device_node *np)
> > -{
> > -	if (of_property_present(np, "cache-size")   ||
> > -	    of_property_present(np, "i-cache-size") ||
> > -	    of_property_present(np, "d-cache-size") ||
> > -	    of_property_present(np, "cache-unified"))
> > -		return true;
> > -
> > -	struct device_node *next __free(device_node) =
> > of_find_next_cache_node(np);
> > -	if (next) {
> > -		return true;
> > -	}
> > -
> > -	return false;
> > -}
> > -
> >  static int of_count_cache_leaves(struct device_node *np)
> >  {
> >  	unsigned int leaves = 0;  
> 



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 entry in dt
  2025-01-27 16:24   ` Rob Herring
@ 2025-01-28 11:48     ` Alireza Sanaee
  0 siblings, 0 replies; 6+ messages in thread
From: Alireza Sanaee @ 2025-01-28 11:48 UTC (permalink / raw)
  To: Rob Herring
  Cc: mark.rutland, devicetree, linux-kernel, jonathan.cameron,
	linux-arm-kernel, shameerali.kolothum.thodi, zhao1.liu,
	yangyicong, rrendec, catalin.marinas

On Mon, 27 Jan 2025 10:24:13 -0600
Rob Herring <robh@kernel.org> wrote:

> On Fri, Jan 24, 2025 at 9:20 AM Alireza Sanaee
> <alireza.sanaee@huawei.com> wrote:
> >
> > This commit simply assumes that CPU node entries may point to a
> > cache node that basically act as a l1-cache and there are some CPU
> > nodes without describing any caches but a next-level-cache property
> > that points to l1-cache.  
> 
> This commit message needs some work. Read documentation on writing
> commit messages.

Hi Rob,

Thanks for the feedback.

I am going to update this text to give more background.

> 
> Why/when does describing L1 cache in the cpu nodes not work? That is
> the assumption in the bindings. If we're changing that, there may need
> to be a binding/spec change.

Yes, I will have to send a patch regarding the spec too. Will send a
patch as well.

My plan is to first send a new revision and then send the updates
related to the spec, and then hopefully we can converge there.

Thanks,
Alireza
> 
> >
> > Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> > ---
> >  drivers/base/cacheinfo.c | 54
> > +++++++++++++++++++++++++++------------- 1 file changed, 37
> > insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> > index cf0d455209d7..d119228fc392 100644
> > --- a/drivers/base/cacheinfo.c
> > +++ b/drivers/base/cacheinfo.c
> > @@ -83,7 +83,31 @@ bool last_level_cache_is_shared(unsigned int
> > cpu_x, unsigned int cpu_y)
> >
> >  #ifdef CONFIG_OF
> >
> > -static bool of_check_cache_nodes(struct device_node *np);
> > +static bool of_check_cache_node(struct device_node *np) {
> > +       if (of_property_present(np, "cache-size")   ||
> > +           of_property_present(np, "i-cache-size") ||
> > +           of_property_present(np, "d-cache-size") ||
> > +           of_property_present(np, "cache-unified"))
> > +               return true;
> > +       return false;
> > +}
> > +
> > +static bool of_check_cache_nodes(struct device_node *np)
> > +{
> > +       if (of_property_present(np, "cache-size")   ||
> > +           of_property_present(np, "i-cache-size") ||
> > +           of_property_present(np, "d-cache-size") ||
> > +           of_property_present(np, "cache-unified"))  
> 
> This is the same code as of_check_cache_node(), use it.
> 
> > +               return true;
> > +
> > +       struct device_node *next __free(device_node) =
> > of_find_next_cache_node(np);
> > +       if (next) {
> > +               return true;
> > +       }
> > +
> > +       return false;
> > +}
> > +
> >
> >  /* OF properties to query for a given cache type */
> >  struct cache_type_info {
> > @@ -218,11 +242,23 @@ static int cache_setup_of_node(unsigned int
> > cpu) while (index < cache_leaves(cpu)) {
> >                 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
> >                 if (this_leaf->level != 1) {
> > +                       /* Always go one level down for level > 1 */
> >                         struct device_node *prev
> > __free(device_node) = np; np = of_find_next_cache_node(np);
> >                         if (!np)
> >                                 break;
> > +               } else {
> > +                       /* For level 1, check compatibility */
> > +                       if (!of_device_is_compatible(np, "cache") &&
> > +                           !of_check_cache_node(np)) {
> > +                               struct device_node *prev
> > __free(device_node) = np;
> > +                               np = of_find_next_cache_node(np);
> > +                               if (!np)
> > +                                       break;
> > +                               continue; /* Skip to next index
> > without processing */
> > +                       }
> >                 }
> > +
> >                 cache_of_set_props(this_leaf, np);
> >                 this_leaf->fw_token = np;
> >                 index++;
> > @@ -234,22 +270,6 @@ static int cache_setup_of_node(unsigned int
> > cpu) return 0;
> >  }
> >
> > -static bool of_check_cache_nodes(struct device_node *np)
> > -{
> > -       if (of_property_present(np, "cache-size")   ||
> > -           of_property_present(np, "i-cache-size") ||
> > -           of_property_present(np, "d-cache-size") ||
> > -           of_property_present(np, "cache-unified"))
> > -               return true;
> > -
> > -       struct device_node *next __free(device_node) =
> > of_find_next_cache_node(np);
> > -       if (next) {
> > -               return true;
> > -       }
> > -
> > -       return false;
> > -}
> > -
> >  static int of_count_cache_leaves(struct device_node *np)
> >  {
> >         unsigned int leaves = 0;
> > --
> > 2.34.1
> >  
> 



^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2025-01-28 11:50 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-01-24 15:20 [RFC PATCH v1 0/1] base/of/cacheinfo: support l1-cache entry in dt Alireza Sanaee
2025-01-24 15:20 ` [RFC PATCH v1 1/1] base/of/cacheinfo: support l1 " Alireza Sanaee
2025-01-27 12:11   ` Jonathan Cameron
2025-01-28 11:44     ` Alireza Sanaee
2025-01-27 16:24   ` Rob Herring
2025-01-28 11:48     ` Alireza Sanaee

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