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From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.linux.dev
Cc: Marc Zyngier <maz@kernel.org>, Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mingwei Zhang <mizhang@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Raghavendra Rao Ananta <rananta@google.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Oliver Upton <oliver.upton@linux.dev>,
	Janne Grunau <j@jannau.net>
Subject: [PATCH v2 11/14] KVM: arm64: Compute synthetic sysreg ESR for Apple PMUv3 traps
Date: Mon,  3 Feb 2025 10:31:08 -0800	[thread overview]
Message-ID: <20250203183111.191519-12-oliver.upton@linux.dev> (raw)
In-Reply-To: <20250203183111.191519-1-oliver.upton@linux.dev>

Apple M* CPUs provide an IMPDEF trap for PMUv3 sysregs, where ESR_EL2.EC
is a reserved value (0x3F) and a sysreg-like ISS is reported in
AFSR1_EL2.

Compute a synthetic ESR for these PMUv3 traps, giving the illusion of
something architectural to the rest of KVM.

Tested-by: Janne Grunau <j@jannau.net>
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
 arch/arm64/kvm/hyp/vhe/switch.c | 22 ++++++++++++++++++++++
 arch/arm64/tools/cpucaps        |  1 +
 2 files changed, 23 insertions(+)

diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index b5b9dbaf1fdd..3456996dd65f 100644
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -525,6 +525,25 @@ static bool kvm_hyp_handle_sysreg_vhe(struct kvm_vcpu *vcpu, u64 *exit_code)
 	return kvm_hyp_handle_sysreg(vcpu, exit_code);
 }
 
+static bool kvm_hyp_handle_impdef(struct kvm_vcpu *vcpu, u64 *exit_code)
+{
+	u64 iss;
+
+	if (!cpus_have_final_cap(ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS))
+		return false;
+
+	/*
+	 * Compute a synthetic ESR for a sysreg trap. Conveniently, AFSR1_EL2
+	 * is populated with a correct ISS for a sysreg trap. These fruity
+	 * parts are 64bit only, so unconditionally set IL.
+	 */
+	iss = ESR_ELx_ISS(read_sysreg_s(SYS_AFSR1_EL2));
+	vcpu->arch.fault.esr_el2 = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SYS64) |
+				   FIELD_PREP(ESR_ELx_ISS_MASK, iss) |
+				   ESR_ELx_IL;
+	return false;
+}
+
 static const exit_handler_fn hyp_exit_handlers[] = {
 	[0 ... ESR_ELx_EC_MAX]		= NULL,
 	[ESR_ELx_EC_CP15_32]		= kvm_hyp_handle_cp15_32,
@@ -536,6 +555,9 @@ static const exit_handler_fn hyp_exit_handlers[] = {
 	[ESR_ELx_EC_WATCHPT_LOW]	= kvm_hyp_handle_watchpt_low,
 	[ESR_ELx_EC_ERET]		= kvm_hyp_handle_eret,
 	[ESR_ELx_EC_MOPS]		= kvm_hyp_handle_mops,
+
+	/* Apple shenanigans */
+	[0x3F]				= kvm_hyp_handle_impdef,
 };
 
 static const exit_handler_fn *kvm_get_exit_handler_array(struct kvm_vcpu *vcpu)
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index ee4316cb3690..772c1b008e43 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -105,6 +105,7 @@ WORKAROUND_CAVIUM_TX2_219_TVM
 WORKAROUND_CLEAN_CACHE
 WORKAROUND_DEVICE_LOAD_ACQUIRE
 WORKAROUND_NVIDIA_CARMEL_CNP
+WORKAROUND_PMUV3_IMPDEF_TRAPS
 WORKAROUND_QCOM_FALKOR_E1003
 WORKAROUND_QCOM_ORYON_CNTVOFF
 WORKAROUND_REPEAT_TLBI
-- 
2.39.5



  parent reply	other threads:[~2025-02-03 18:52 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-03 18:30 [PATCH v2 00/14] KVM: arm64: Support FEAT_PMUv3 on Apple hardware Oliver Upton
2025-02-03 18:30 ` [PATCH v2 01/14] drivers/perf: apple_m1: Refactor event select/filter configuration Oliver Upton
2025-02-19 16:22   ` Marc Zyngier
2025-02-03 18:30 ` [PATCH v2 02/14] drivers/perf: apple_m1: Support host/guest event filtering Oliver Upton
2025-02-03 18:31 ` [PATCH v2 03/14] drivers/perf: apple_m1: Provide helper for mapping PMUv3 events Oliver Upton
2025-02-19 16:37   ` Marc Zyngier
2025-02-03 18:31 ` [PATCH v2 04/14] KVM: arm64: Compute PMCEID from arm_pmu's event bitmaps Oliver Upton
2025-02-03 18:31 ` [PATCH v2 05/14] KVM: arm64: Always support SW_INCR PMU event Oliver Upton
2025-02-03 18:31 ` [PATCH v2 06/14] KVM: arm64: Remap PMUv3 events onto hardware Oliver Upton
2025-02-19 16:45   ` Marc Zyngier
2025-02-19 19:25     ` Oliver Upton
2025-02-03 18:31 ` [PATCH v2 07/14] KVM: arm64: Use a cpucap to determine if system supports FEAT_PMUv3 Oliver Upton
2025-02-19 17:44   ` Marc Zyngier
2025-02-19 19:22     ` Oliver Upton
2025-02-19 19:35       ` Marc Zyngier
2025-02-03 18:31 ` [PATCH v2 08/14] KVM: arm64: Drop kvm_arm_pmu_available static key Oliver Upton
2025-02-03 18:31 ` [PATCH v2 09/14] KVM: arm64: Use guard() to cleanup usage of arm_pmus_lock Oliver Upton
2025-02-03 18:31 ` [PATCH v2 10/14] KVM: arm64: Move PMUVer filtering into KVM code Oliver Upton
2025-02-19 18:17   ` Marc Zyngier
2025-02-03 18:31 ` Oliver Upton [this message]
2025-02-03 18:31 ` [PATCH v2 12/14] KVM: arm64: Advertise PMUv3 if IMPDEF traps are present Oliver Upton
2025-02-03 18:31 ` [PATCH v2 13/14] KVM: arm64: Provide 1 event counter on IMPDEF hardware Oliver Upton
2025-02-03 18:31 ` [PATCH v2 14/14] arm64: Enable IMP DEF PMUv3 traps on Apple M* Oliver Upton

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