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* [PATCH 0/6] thermal: renesas: Add support for RZ/G3S
@ 2025-01-03 16:37 Claudiu
  2025-01-03 16:38 ` [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP Claudiu
                   ` (5 more replies)
  0 siblings, 6 replies; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:37 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Hi,

This series adds thermal support for the Renesas RZ/G3S SoC.

Series is organized as follows:
- patch 1/6:		adds clock, resets and power domain support for
			the thermal sensor unit (TSU)
- patch 2/6:		adds support for non-devres thermal zone
			register/unregister 
- patches 3-4/6:	add thermal support for RZ/G3S
- patches 5-6/6:	add device tree support

Merge strategy, if any:
- patch 1/6 can go through the Renesas tree
- patches 2-4/6 can go through the thermal tree
- patches 5-6/6 can go through the Renesas tree

Ulf,

I've added you to this thread as well due to patch 2/6 that has a similar
root cause as [1].

Thank you,
Claudiu Beznea

[1] https://lore.kernel.org/all/20250103140042.1619703-2-claudiu.beznea.uj@bp.renesas.com/

Claudiu Beznea (6):
  clk: renesas: r9a08g045: Add clocks, resets and power domain support
    for the TSU IP
  thermal: of: Export non-devres helper to register/unregister thermal
    zone
  dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit
  thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  arm64: dts: renesas: r9a08g045: Add TSU node
  arm64: defconfig: Enable RZ/G3S thermal

 .../thermal/renesas,r9a08g045-tsu.yaml        |  93 ++++++
 MAINTAINERS                                   |   7 +
 arch/arm64/boot/dts/renesas/r9a08g045.dtsi    |  43 ++-
 .../boot/dts/renesas/rzg3s-smarc-som.dtsi     |   4 -
 arch/arm64/configs/defconfig                  |   1 +
 drivers/clk/renesas/r9a08g045-cpg.c           |   4 +
 drivers/thermal/renesas/Kconfig               |   8 +
 drivers/thermal/renesas/Makefile              |   1 +
 drivers/thermal/renesas/rzg3s_thermal.c       | 301 ++++++++++++++++++
 drivers/thermal/thermal_of.c                  |   8 +-
 include/linux/thermal.h                       |  14 +
 11 files changed, 476 insertions(+), 8 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml
 create mode 100644 drivers/thermal/renesas/rzg3s_thermal.c

-- 
2.43.0



^ permalink raw reply	[flat|nested] 39+ messages in thread

* [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP
  2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
@ 2025-01-03 16:38 ` Claudiu
  2025-01-10 14:16   ` Geert Uytterhoeven
  2025-01-03 16:38 ` [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone Claudiu
                   ` (4 subsequent siblings)
  5 siblings, 1 reply; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:38 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Add clocks, resets and power domains for the TSU IP available on the
Renesas RZ/G3S SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 drivers/clk/renesas/r9a08g045-cpg.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c
index 0e7e3bf05b52..bc44e08e7eb9 100644
--- a/drivers/clk/renesas/r9a08g045-cpg.c
+++ b/drivers/clk/renesas/r9a08g045-cpg.c
@@ -241,6 +241,7 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = {
 	DEF_MOD("gpio_hclk",		R9A08G045_GPIO_HCLK, R9A08G045_OSCCLK, 0x598, 0),
 	DEF_MOD("adc_adclk",		R9A08G045_ADC_ADCLK, R9A08G045_CLK_TSU, 0x5a8, 0),
 	DEF_MOD("adc_pclk",		R9A08G045_ADC_PCLK, R9A08G045_CLK_TSU, 0x5a8, 1),
+	DEF_MOD("tsu_pclk",		R9A08G045_TSU_PCLK, R9A08G045_CLK_TSU, 0x5ac, 0),
 	DEF_MOD("vbat_bclk",		R9A08G045_VBAT_BCLK, R9A08G045_OSCCLK, 0x614, 0),
 };
 
@@ -279,6 +280,7 @@ static const struct rzg2l_reset r9a08g045_resets[] = {
 	DEF_RST(R9A08G045_GPIO_SPARE_RESETN, 0x898, 2),
 	DEF_RST(R9A08G045_ADC_PRESETN, 0x8a8, 0),
 	DEF_RST(R9A08G045_ADC_ADRST_N, 0x8a8, 1),
+	DEF_RST(R9A08G045_TSU_PRESETN, 0x8ac, 0),
 	DEF_RST(R9A08G045_VBAT_BRESETN, 0x914, 0),
 };
 
@@ -353,6 +355,8 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = {
 				DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(4)), 0),
 	DEF_PD("adc",		R9A08G045_PD_ADC,
 				DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(14)), 0),
+	DEF_PD("tsu",		R9A08G045_PD_TSU,
+				DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(15)), 0),
 	DEF_PD("vbat",		R9A08G045_PD_VBAT,
 				DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(8)),
 				GENPD_FLAG_ALWAYS_ON),
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
  2025-01-03 16:38 ` [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP Claudiu
@ 2025-01-03 16:38 ` Claudiu
  2025-01-09 17:34   ` Daniel Lezcano
  2025-01-29 17:24   ` Daniel Lezcano
  2025-01-03 16:38 ` [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit Claudiu
                   ` (3 subsequent siblings)
  5 siblings, 2 replies; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:38 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
clocks are managed through PM domains. These PM domains, registered on
behalf of the clock controller driver, are configured with
GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
clocks are enabled/disabled using runtime PM APIs.

During probe, devices are attached to the PM domain controlling their
clocks. Similarly, during removal, devices are detached from the PM domain.

The detachment call stack is as follows:

device_driver_detach() ->
  device_release_driver_internal() ->
    __device_release_driver() ->
      device_remove() ->
        platform_remove() ->
	  dev_pm_domain_detach()

In the upcoming Renesas RZ/G3S thermal driver, the
struct thermal_zone_device_ops::change_mode API is implemented to
start/stop the thermal sensor unit. Register settings are updated within
the change_mode API.

In case devres helpers are used for thermal zone register/unregister the
struct thermal_zone_device_ops::change_mode API is invoked when the
driver is unbound. The identified call stack is as follows:

device_driver_detach() ->
  device_release_driver_internal() ->
    device_unbind_cleanup() ->
      devres_release_all() ->
        devm_thermal_of_zone_release() ->
	  thermal_zone_device_disable() ->
	    thermal_zone_device_set_mode() ->
	      rzg3s_thermal_change_mode()

The device_unbind_cleanup() function is called after the thermal device is
detached from the PM domain (via dev_pm_domain_detach()).

The rzg3s_thermal_change_mode() implementation calls
pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
accessing the registers. However, during the unbind scenario, the
devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
Consequently, the clocks are not enabled, as the device is removed from
the PM domain at this time, leading to an Asynchronous SError Interrupt.
The system cannot be used after this.

Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
be used in the upcomming RZ/G3S thermal driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 drivers/thermal/thermal_of.c |  8 +++++---
 include/linux/thermal.h      | 14 ++++++++++++++
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c
index fab11b98ca49..8fc35d20db60 100644
--- a/drivers/thermal/thermal_of.c
+++ b/drivers/thermal/thermal_of.c
@@ -329,11 +329,12 @@ static bool thermal_of_should_bind(struct thermal_zone_device *tz,
  *
  * @tz: a pointer to the thermal zone structure
  */
-static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
+void thermal_of_zone_unregister(struct thermal_zone_device *tz)
 {
 	thermal_zone_device_disable(tz);
 	thermal_zone_device_unregister(tz);
 }
+EXPORT_SYMBOL_GPL(thermal_of_zone_unregister);
 
 /**
  * thermal_of_zone_register - Register a thermal zone with device node
@@ -355,8 +356,8 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
  *	- ENOMEM: if one structure can not be allocated
  *	- Other negative errors are returned by the underlying called functions
  */
-static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
-							    const struct thermal_zone_device_ops *ops)
+struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
+						     const struct thermal_zone_device_ops *ops)
 {
 	struct thermal_zone_device_ops of_ops = *ops;
 	struct thermal_zone_device *tz;
@@ -429,6 +430,7 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node *
 
 	return ERR_PTR(ret);
 }
+EXPORT_SYMBOL_GPL(thermal_of_zone_register);
 
 static void devm_thermal_of_zone_release(struct device *dev, void *res)
 {
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index 69f9bedd0ee8..adbb4092a064 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -195,13 +195,23 @@ struct thermal_zone_params {
 
 /* Function declarations */
 #ifdef CONFIG_THERMAL_OF
+struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
+						     const struct thermal_zone_device_ops *ops);
 struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
 							  const struct thermal_zone_device_ops *ops);
 
+void thermal_of_zone_unregister(struct thermal_zone_device *tz);
 void devm_thermal_of_zone_unregister(struct device *dev, struct thermal_zone_device *tz);
 
 #else
 
+static inline
+struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
+						     const struct thermal_zone_device_ops *ops)
+{
+	return ERR_PTR(-ENOTSUPP);
+}
+
 static inline
 struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
 							  const struct thermal_zone_device_ops *ops)
@@ -209,6 +219,10 @@ struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, in
 	return ERR_PTR(-ENOTSUPP);
 }
 
+static inline void thermal_of_zone_unregister(struct thermal_zone_device *tz)
+{
+}
+
 static inline void devm_thermal_of_zone_unregister(struct device *dev,
 						   struct thermal_zone_device *tz)
 {
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit
  2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
  2025-01-03 16:38 ` [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP Claudiu
  2025-01-03 16:38 ` [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone Claudiu
@ 2025-01-03 16:38 ` Claudiu
  2025-01-08 23:43   ` Rob Herring (Arm)
  2025-01-22 10:12   ` Geert Uytterhoeven
  2025-01-03 16:38 ` [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC Claudiu
                   ` (2 subsequent siblings)
  5 siblings, 2 replies; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:38 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

The Renesas RZ/G3S SoC includes a Thermal Sensor Unit (TSU) block designed
to measure the junction temperature. The temperature is measured using
the RZ/G3S ADC, with a dedicated ADC channel directly connected to the TSU.
Add documentation for it.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 .../thermal/renesas,r9a08g045-tsu.yaml        | 93 +++++++++++++++++++
 1 file changed, 93 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml

diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml
new file mode 100644
index 000000000000..573e2b9d3752
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/renesas,r9a08g045-tsu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/G3S Thermal Sensor Unit
+
+description:
+  The thermal sensor unit (TSU) measures the temperature(Tj) inside
+  the LSI.
+
+maintainers:
+  - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
+
+$ref: thermal-sensor.yaml#
+
+properties:
+  compatible:
+    const: renesas,r9a08g045-tsu
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: TSU module clock
+
+  power-domains:
+    maxItems: 1
+
+  resets:
+    items:
+      - description: TSU module reset
+
+  io-channels:
+    items:
+      - description: ADC channel which reports the TSU temperature
+
+  io-channel-names:
+    items:
+      - const: tsu
+
+  "#thermal-sensor-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - power-domains
+  - resets
+  - io-channels
+  - io-channel-names
+  - '#thermal-sensor-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/r9a08g045-cpg.h>
+
+    tsu: thermal@10059000 {
+        compatible = "renesas,r9a08g045-tsu";
+        reg = <0x10059000 0x1000>;
+        clocks = <&cpg CPG_MOD R9A08G045_TSU_PCLK>;
+        resets = <&cpg R9A08G045_TSU_PRESETN>;
+        power-domains = <&cpg>;
+        #thermal-sensor-cells = <0>;
+        io-channels = <&adc 8>;
+        io-channel-names = "tsu";
+    };
+
+    thermal-zones {
+        cpu-thermal {
+            polling-delay-passive = <250>;
+            polling-delay = <1000>;
+            thermal-sensors = <&tsu>;
+
+            trips {
+                sensor_crit: sensor-crit {
+                    temperature = <125000>;
+                    hysteresis = <1000>;
+                    type = "critical";
+                };
+                target: trip-point {
+                    temperature = <100000>;
+                    hysteresis = <1000>;
+                    type = "passive";
+                };
+            };
+        };
+    };
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
                   ` (2 preceding siblings ...)
  2025-01-03 16:38 ` [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit Claudiu
@ 2025-01-03 16:38 ` Claudiu
  2025-01-22 10:29   ` Geert Uytterhoeven
  2025-01-03 16:38 ` [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node Claudiu
  2025-01-03 16:38 ` [PATCH 6/6] arm64: defconfig: Enable RZ/G3S thermal Claudiu
  5 siblings, 1 reply; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:38 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that reports
the junction temperature. The temperature is reported through a dedicated
ADC channel. Add a driver for the Renesas RZ/G3S TSU.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 MAINTAINERS                             |   7 +
 drivers/thermal/renesas/Kconfig         |   8 +
 drivers/thermal/renesas/Makefile        |   1 +
 drivers/thermal/renesas/rzg3s_thermal.c | 301 ++++++++++++++++++++++++
 4 files changed, 317 insertions(+)
 create mode 100644 drivers/thermal/renesas/rzg3s_thermal.c

diff --git a/MAINTAINERS b/MAINTAINERS
index d2ab799a0659..0b5854dc2d5d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20131,6 +20131,13 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/iio/potentiometer/renesas,x9250.yaml
 F:	drivers/iio/potentiometer/x9250.c
 
+RENESAS RZ/G3S THERMAL SENSOR UNIT DRIVER
+M:	Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
+L:	linux-pm@vger.kernel.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml
+F:	drivers/thermal/renesas/rzg3s_thermal.c
+
 RESET CONTROLLER FRAMEWORK
 M:	Philipp Zabel <p.zabel@pengutronix.de>
 S:	Maintained
diff --git a/drivers/thermal/renesas/Kconfig b/drivers/thermal/renesas/Kconfig
index dcf5fc5ae08e..566478797095 100644
--- a/drivers/thermal/renesas/Kconfig
+++ b/drivers/thermal/renesas/Kconfig
@@ -26,3 +26,11 @@ config RZG2L_THERMAL
 	help
 	  Enable this to plug the RZ/G2L thermal sensor driver into the Linux
 	  thermal framework.
+
+config RZG3S_THERMAL
+	tristate "Renesas RZ/G3S thermal driver"
+	depends on ARCH_R9A08G045 || COMPILE_TEST
+	depends on OF && IIO && RZG2L_ADC
+	help
+	  Enable this to plug the RZ/G3S thermal sensor driver into the Linux
+	  thermal framework.
diff --git a/drivers/thermal/renesas/Makefile b/drivers/thermal/renesas/Makefile
index bf9cb3cb94d6..1feb5ab78827 100644
--- a/drivers/thermal/renesas/Makefile
+++ b/drivers/thermal/renesas/Makefile
@@ -3,3 +3,4 @@
 obj-$(CONFIG_RCAR_GEN3_THERMAL)	+= rcar_gen3_thermal.o
 obj-$(CONFIG_RCAR_THERMAL)	+= rcar_thermal.o
 obj-$(CONFIG_RZG2L_THERMAL)	+= rzg2l_thermal.o
+obj-$(CONFIG_RZG3S_THERMAL)	+= rzg3s_thermal.o
diff --git a/drivers/thermal/renesas/rzg3s_thermal.c b/drivers/thermal/renesas/rzg3s_thermal.c
new file mode 100644
index 000000000000..6719f9ca05eb
--- /dev/null
+++ b/drivers/thermal/renesas/rzg3s_thermal.c
@@ -0,0 +1,301 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G3S TSU Thermal Sensor Driver
+ *
+ * Copyright (C) 2024 Renesas Electronics Corporation
+ */
+
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+#include <linux/iio/consumer.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+#include <linux/thermal.h>
+#include <linux/units.h>
+
+#include "../thermal_hwmon.h"
+
+#define TSU_SM			0x0
+#define TSU_SM_EN		BIT(0)
+#define TSU_SM_OE		BIT(1)
+#define OTPTSUTRIM_REG(n)	(0x18 + (n) * 0x4)
+#define OTPTSUTRIM_EN_MASK	BIT(31)
+#define OTPTSUTRIM_MASK		GENMASK(11, 0)
+
+#define TSU_READ_STEPS		8
+
+/* Default calibration values, if FUSE values are missing. */
+#define SW_CALIB0_VAL		1297
+#define SW_CALIB1_VAL		751
+
+#define MCELSIUS(temp)		((temp) * MILLIDEGREE_PER_DEGREE)
+
+/**
+ * struct rzg3s_thermal_priv - RZ/G3S thermal private data structure
+ * @base: TSU base address
+ * @dev: device pointer
+ * @tz: thermal zone pointer
+ * @rstc: reset control
+ * @channel: IIO channel to read the TSU
+ * @mode: current device mode
+ * @calib0: calibration value
+ * @calib1: calibration value
+ */
+struct rzg3s_thermal_priv {
+	void __iomem *base;
+	struct device *dev;
+	struct thermal_zone_device *tz;
+	struct reset_control *rstc;
+	struct iio_channel *channel;
+	enum thermal_device_mode mode;
+	u16 calib0;
+	u16 calib1;
+};
+
+static int rzg3s_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
+{
+	struct rzg3s_thermal_priv *priv = thermal_zone_device_priv(tz);
+	struct device *dev = priv->dev;
+	u32 ts_code_ave = 0;
+	int ret, val;
+
+	if (priv->mode != THERMAL_DEVICE_ENABLED)
+		return -EAGAIN;
+
+	ret = pm_runtime_resume_and_get(dev);
+	if (ret)
+		return ret;
+
+	for (u8 i = 0; i < TSU_READ_STEPS; i++) {
+		ret = iio_read_channel_raw(priv->channel, &val);
+		if (ret < 0)
+			goto rpm_put;
+
+		ts_code_ave += val;
+		/*
+		 * According to the HW manual (section 40.4.4 Procedure for Measuring the
+		 * Temperature) we need to wait here at leat 3us.
+		 */
+		usleep_range(5, 10);
+	}
+
+	ret = 0;
+	ts_code_ave = DIV_ROUND_CLOSEST(ts_code_ave, TSU_READ_STEPS);
+
+	/*
+	 * According to the HW manual (section 40.4.4 Procedure for Measuring the Temperature)
+	 * the computation formula is as follows:
+	 *
+	 * Tj = (ts_code_ave - priv->calib1) * 165 / (priv->calib0 - priv->calib1) - 40
+	 */
+	*temp = DIV_ROUND_CLOSEST((ts_code_ave - priv->calib1) * 165,
+				  (priv->calib0 - priv->calib1)) - 40;
+
+	/* Report it in mili degrees Celsius and round it up to 0.5 degrees Celsius. */
+	*temp = roundup(MCELSIUS(*temp), 500);
+
+rpm_put:
+	pm_runtime_mark_last_busy(dev);
+	pm_runtime_put_autosuspend(dev);
+
+	return ret;
+}
+
+static void rzg3s_thermal_set_mode(struct rzg3s_thermal_priv *priv,
+				   enum thermal_device_mode mode)
+{
+	struct device *dev = priv->dev;
+	int ret;
+
+	ret = pm_runtime_resume_and_get(dev);
+	if (ret)
+		return;
+
+	if (mode == THERMAL_DEVICE_DISABLED) {
+		writel(0, priv->base + TSU_SM);
+	} else {
+		writel(TSU_SM_EN, priv->base + TSU_SM);
+		/*
+		 * According to the HW manual (section 40.4.1 Procedure for
+		 * Starting the TSU) we need to wait here 30us or more.
+		 */
+		usleep_range(30, 40);
+
+		writel(TSU_SM_OE | TSU_SM_EN, priv->base + TSU_SM);
+		/*
+		 * According to the HW manual (section 40.4.1 Procedure for
+		 * Starting the TSU) we need to wait here 50us or more.
+		 */
+		usleep_range(50, 60);
+	}
+
+	pm_runtime_mark_last_busy(dev);
+	pm_runtime_put_autosuspend(dev);
+}
+
+static int rzg3s_thermal_change_mode(struct thermal_zone_device *tz,
+				     enum thermal_device_mode mode)
+{
+	struct rzg3s_thermal_priv *priv = thermal_zone_device_priv(tz);
+
+	if (priv->mode == mode)
+		return 0;
+
+	rzg3s_thermal_set_mode(priv, mode);
+	priv->mode = mode;
+
+	return 0;
+}
+
+static const struct thermal_zone_device_ops rzg3s_tz_of_ops = {
+	.get_temp = rzg3s_thermal_get_temp,
+	.change_mode = rzg3s_thermal_change_mode,
+};
+
+static int rzg3s_thermal_read_calib(struct rzg3s_thermal_priv *priv)
+{
+	struct device *dev = priv->dev;
+	u32 val;
+	int ret;
+
+	ret = pm_runtime_resume_and_get(dev);
+	if (ret)
+		return ret;
+
+	val = readl(priv->base + OTPTSUTRIM_REG(0));
+	if (val & OTPTSUTRIM_EN_MASK)
+		priv->calib0 = FIELD_GET(OTPTSUTRIM_MASK, val);
+	else
+		priv->calib0 = SW_CALIB0_VAL;
+
+	val = readl(priv->base + OTPTSUTRIM_REG(1));
+	if (val & OTPTSUTRIM_EN_MASK)
+		priv->calib1 = FIELD_GET(OTPTSUTRIM_MASK, val);
+	else
+		priv->calib1 = SW_CALIB1_VAL;
+
+	pm_runtime_mark_last_busy(dev);
+	pm_runtime_put_autosuspend(dev);
+
+	return 0;
+}
+
+static int rzg3s_thermal_probe(struct platform_device *pdev)
+{
+	struct rzg3s_thermal_priv *priv;
+	struct device *dev = &pdev->dev;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->channel = devm_iio_channel_get(dev, "tsu");
+	if (IS_ERR(priv->channel))
+		return dev_err_probe(dev, PTR_ERR(priv->channel), "Failed to get IIO channel!\n");
+
+	priv->rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL);
+	if (IS_ERR(priv->rstc))
+		return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset!\n");
+
+	priv->dev = dev;
+	priv->mode = THERMAL_DEVICE_DISABLED;
+	platform_set_drvdata(pdev, priv);
+
+	pm_runtime_set_autosuspend_delay(dev, 300);
+	pm_runtime_use_autosuspend(dev);
+	pm_runtime_enable(dev);
+
+	ret = rzg3s_thermal_read_calib(priv);
+	if (ret) {
+		dev_err_probe(dev, ret, "Failed to read calibration data!\n");
+		goto rpm_disable;
+	}
+
+	priv->tz = thermal_of_zone_register(dev->of_node, 0, priv, &rzg3s_tz_of_ops);
+	if (IS_ERR(priv->tz)) {
+		dev_err_probe(dev, PTR_ERR(priv->tz), "Failed to register thermal zone!\n");
+		goto rpm_disable;
+	}
+
+	ret = thermal_add_hwmon_sysfs(priv->tz);
+	if (ret) {
+		dev_err_probe(dev, ret, "Failed to add hwmon sysfs!\n");
+		goto tz_unregister;
+	}
+
+	return 0;
+
+tz_unregister:
+	thermal_of_zone_unregister(priv->tz);
+rpm_disable:
+	pm_runtime_disable(dev);
+	pm_runtime_dont_use_autosuspend(dev);
+	return ret;
+}
+
+static void rzg3s_thermal_remove(struct platform_device *pdev)
+{
+	struct rzg3s_thermal_priv *priv = dev_get_drvdata(&pdev->dev);
+
+	thermal_remove_hwmon_sysfs(priv->tz);
+	thermal_of_zone_unregister(priv->tz);
+	pm_runtime_disable(priv->dev);
+	pm_runtime_dont_use_autosuspend(priv->dev);
+}
+
+static int rzg3s_thermal_suspend(struct device *dev)
+{
+	struct rzg3s_thermal_priv *priv = dev_get_drvdata(dev);
+
+	rzg3s_thermal_set_mode(priv, THERMAL_DEVICE_DISABLED);
+
+	return reset_control_assert(priv->rstc);
+}
+
+static int rzg3s_thermal_resume(struct device *dev)
+{
+	struct rzg3s_thermal_priv *priv = dev_get_drvdata(dev);
+	int ret;
+
+	ret = reset_control_deassert(priv->rstc);
+	if (ret)
+		return ret;
+
+	if (priv->mode != THERMAL_DEVICE_DISABLED)
+		rzg3s_thermal_set_mode(priv, priv->mode);
+
+	return 0;
+}
+
+static const struct dev_pm_ops rzg3s_thermal_pm_ops = {
+	SYSTEM_SLEEP_PM_OPS(rzg3s_thermal_suspend, rzg3s_thermal_resume)
+};
+
+static const struct of_device_id rzg3s_thermal_dt_ids[] = {
+	{ .compatible = "renesas,r9a08g045-tsu" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, rzg3s_thermal_dt_ids);
+
+static struct platform_driver rzg3s_thermal_driver = {
+	.driver = {
+		.name = "rzg3s_thermal",
+		.of_match_table = rzg3s_thermal_dt_ids,
+		.pm = pm_ptr(&rzg3s_thermal_pm_ops),
+	},
+	.probe = rzg3s_thermal_probe,
+	.remove = rzg3s_thermal_remove,
+};
+module_platform_driver(rzg3s_thermal_driver);
+
+MODULE_DESCRIPTION("Renesas RZ/G3S Thermal Sensor Unit Driver");
+MODULE_AUTHOR("Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>");
+MODULE_LICENSE("GPL");
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node
  2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
                   ` (3 preceding siblings ...)
  2025-01-03 16:38 ` [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC Claudiu
@ 2025-01-03 16:38 ` Claudiu
  2025-01-22 10:31   ` Geert Uytterhoeven
  2025-01-30 17:53   ` Daniel Lezcano
  2025-01-03 16:38 ` [PATCH 6/6] arm64: defconfig: Enable RZ/G3S thermal Claudiu
  5 siblings, 2 replies; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:38 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Add TSU node along with thermal zones and keep it enabled in the SoC DTSI.
The temperature reported by the TSU can only be read through channel 8 of
the ADC. Therefore, enable the ADC by default.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a08g045.dtsi    | 43 ++++++++++++++++++-
 .../boot/dts/renesas/rzg3s-smarc-som.dtsi     |  4 --
 2 files changed, 42 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
index a9b98db9ef95..fd74138198a8 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
@@ -205,7 +205,6 @@ adc: adc@10058000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			#io-channel-cells = <1>;
-			status = "disabled";
 
 			channel@0 {
 				reg = <0>;
@@ -244,6 +243,17 @@ channel@8 {
 			};
 		};
 
+		tsu: thermal@10059000 {
+			compatible = "renesas,r9a08g045-tsu";
+			reg = <0 0x10059000 0 0x1000>;
+			clocks = <&cpg CPG_MOD R9A08G045_TSU_PCLK>;
+			resets = <&cpg R9A08G045_TSU_PRESETN>;
+			power-domains = <&cpg>;
+			#thermal-sensor-cells = <0>;
+			io-channels = <&adc 8>;
+			io-channel-names = "tsu";
+		};
+
 		vbattb: clock-controller@1005c000 {
 			compatible = "renesas,r9a08g045-vbattb";
 			reg = <0 0x1005c000 0 0x1000>;
@@ -690,6 +700,37 @@ timer {
 				  "hyp-virt";
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+			thermal-sensors = <&tsu>;
+			sustainable-power = <423>;
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 0 2>;
+					contribution = <1024>;
+				};
+			};
+
+			trips {
+				sensor_crit: sensor-crit {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+
+				target: trip-point {
+					temperature = <100000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+	};
+
 	vbattb_xtal: vbattb-xtal {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
index ef12c1c462a7..041d256d7b79 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
@@ -102,10 +102,6 @@ x3_clk: x3-clock {
 	};
 };
 
-&adc {
-	status = "okay";
-};
-
 #if SW_CONFIG3 == SW_ON
 &eth0 {
 	pinctrl-0 = <&eth0_pins>;
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* [PATCH 6/6] arm64: defconfig: Enable RZ/G3S thermal
  2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
                   ` (4 preceding siblings ...)
  2025-01-03 16:38 ` [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node Claudiu
@ 2025-01-03 16:38 ` Claudiu
  2025-01-22 10:33   ` Geert Uytterhoeven
  5 siblings, 1 reply; 39+ messages in thread
From: Claudiu @ 2025-01-03 16:38 UTC (permalink / raw)
  To: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: claudiu.beznea, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Enable the CONFIG_RZG3S_THERMAL flag for the RZ/G3S SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index dfa5c8d5b658..576a544b8c79 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -706,6 +706,7 @@ CONFIG_ROCKCHIP_THERMAL=m
 CONFIG_RCAR_THERMAL=y
 CONFIG_RCAR_GEN3_THERMAL=y
 CONFIG_RZG2L_THERMAL=y
+CONFIG_RZG3S_THERMAL=m
 CONFIG_ARMADA_THERMAL=y
 CONFIG_MTK_THERMAL=m
 CONFIG_MTK_LVTS_THERMAL=m
-- 
2.43.0



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* Re: [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit
  2025-01-03 16:38 ` [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit Claudiu
@ 2025-01-08 23:43   ` Rob Herring (Arm)
  2025-01-22 10:12   ` Geert Uytterhoeven
  1 sibling, 0 replies; 39+ messages in thread
From: Rob Herring (Arm) @ 2025-01-08 23:43 UTC (permalink / raw)
  To: Claudiu
  Cc: linux-pm, magnus.damm, linux-renesas-soc, lukasz.luba, mturquette,
	ulf.hansson, linux-clk, geert+renesas, devicetree, linux-kernel,
	Claudiu Beznea, rui.zhang, p.zabel, linux-arm-kernel, rafael,
	conor+dt, krzk+dt, daniel.lezcano, sboyd


On Fri, 03 Jan 2025 18:38:02 +0200, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> The Renesas RZ/G3S SoC includes a Thermal Sensor Unit (TSU) block designed
> to measure the junction temperature. The temperature is measured using
> the RZ/G3S ADC, with a dedicated ADC channel directly connected to the TSU.
> Add documentation for it.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>  .../thermal/renesas,r9a08g045-tsu.yaml        | 93 +++++++++++++++++++
>  1 file changed, 93 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a08g045-tsu.yaml
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-03 16:38 ` [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone Claudiu
@ 2025-01-09 17:34   ` Daniel Lezcano
  2025-01-15 15:42     ` Ulf Hansson
  2025-01-29 17:24   ` Daniel Lezcano
  1 sibling, 1 reply; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-09 17:34 UTC (permalink / raw)
  To: Claudiu, rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea


Ulf,

can you have a look at this particular patch please ?

Perhaps this scenario already happened in the past and there is an 
alternative to fix it instead of this proposed change


On 03/01/2025 17:38, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
> clocks are managed through PM domains. These PM domains, registered on
> behalf of the clock controller driver, are configured with
> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
> clocks are enabled/disabled using runtime PM APIs.
> 
> During probe, devices are attached to the PM domain controlling their
> clocks. Similarly, during removal, devices are detached from the PM domain.
> 
> The detachment call stack is as follows:
> 
> device_driver_detach() ->
>    device_release_driver_internal() ->
>      __device_release_driver() ->
>        device_remove() ->
>          platform_remove() ->
> 	  dev_pm_domain_detach()
> 
> In the upcoming Renesas RZ/G3S thermal driver, the
> struct thermal_zone_device_ops::change_mode API is implemented to
> start/stop the thermal sensor unit. Register settings are updated within
> the change_mode API.
> 
> In case devres helpers are used for thermal zone register/unregister the
> struct thermal_zone_device_ops::change_mode API is invoked when the
> driver is unbound. The identified call stack is as follows:
> 
> device_driver_detach() ->
>    device_release_driver_internal() ->
>      device_unbind_cleanup() ->
>        devres_release_all() ->
>          devm_thermal_of_zone_release() ->
> 	  thermal_zone_device_disable() ->
> 	    thermal_zone_device_set_mode() ->
> 	      rzg3s_thermal_change_mode()
> 
> The device_unbind_cleanup() function is called after the thermal device is
> detached from the PM domain (via dev_pm_domain_detach()).
> 
> The rzg3s_thermal_change_mode() implementation calls
> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
> accessing the registers. However, during the unbind scenario, the
> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> Consequently, the clocks are not enabled, as the device is removed from
> the PM domain at this time, leading to an Asynchronous SError Interrupt.
> The system cannot be used after this.
> 
> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
> be used in the upcomming RZ/G3S thermal driver.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>   drivers/thermal/thermal_of.c |  8 +++++---
>   include/linux/thermal.h      | 14 ++++++++++++++
>   2 files changed, 19 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c
> index fab11b98ca49..8fc35d20db60 100644
> --- a/drivers/thermal/thermal_of.c
> +++ b/drivers/thermal/thermal_of.c
> @@ -329,11 +329,12 @@ static bool thermal_of_should_bind(struct thermal_zone_device *tz,
>    *
>    * @tz: a pointer to the thermal zone structure
>    */
> -static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> +void thermal_of_zone_unregister(struct thermal_zone_device *tz)
>   {
>   	thermal_zone_device_disable(tz);
>   	thermal_zone_device_unregister(tz);
>   }
> +EXPORT_SYMBOL_GPL(thermal_of_zone_unregister);
>   
>   /**
>    * thermal_of_zone_register - Register a thermal zone with device node
> @@ -355,8 +356,8 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
>    *	- ENOMEM: if one structure can not be allocated
>    *	- Other negative errors are returned by the underlying called functions
>    */
> -static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> -							    const struct thermal_zone_device_ops *ops)
> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> +						     const struct thermal_zone_device_ops *ops)
>   {
>   	struct thermal_zone_device_ops of_ops = *ops;
>   	struct thermal_zone_device *tz;
> @@ -429,6 +430,7 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node *
>   
>   	return ERR_PTR(ret);
>   }
> +EXPORT_SYMBOL_GPL(thermal_of_zone_register);
>   
>   static void devm_thermal_of_zone_release(struct device *dev, void *res)
>   {
> diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> index 69f9bedd0ee8..adbb4092a064 100644
> --- a/include/linux/thermal.h
> +++ b/include/linux/thermal.h
> @@ -195,13 +195,23 @@ struct thermal_zone_params {
>   
>   /* Function declarations */
>   #ifdef CONFIG_THERMAL_OF
> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> +						     const struct thermal_zone_device_ops *ops);
>   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
>   							  const struct thermal_zone_device_ops *ops);
>   
> +void thermal_of_zone_unregister(struct thermal_zone_device *tz);
>   void devm_thermal_of_zone_unregister(struct device *dev, struct thermal_zone_device *tz);
>   
>   #else
>   
> +static inline
> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> +						     const struct thermal_zone_device_ops *ops)
> +{
> +	return ERR_PTR(-ENOTSUPP);
> +}
> +
>   static inline
>   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
>   							  const struct thermal_zone_device_ops *ops)
> @@ -209,6 +219,10 @@ struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, in
>   	return ERR_PTR(-ENOTSUPP);
>   }
>   
> +static inline void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> +{
> +}
> +
>   static inline void devm_thermal_of_zone_unregister(struct device *dev,
>   						   struct thermal_zone_device *tz)
>   {


-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP
  2025-01-03 16:38 ` [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP Claudiu
@ 2025-01-10 14:16   ` Geert Uytterhoeven
  0 siblings, 0 replies; 39+ messages in thread
From: Geert Uytterhoeven @ 2025-01-10 14:16 UTC (permalink / raw)
  To: Claudiu
  Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, magnus.damm, mturquette, sboyd, p.zabel, ulf.hansson,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Add clocks, resets and power domains for the TSU IP available on the
> Renesas RZ/G3S SoC.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk for v6.15.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-09 17:34   ` Daniel Lezcano
@ 2025-01-15 15:42     ` Ulf Hansson
  2025-02-04 14:33       ` Jonathan Cameron
  0 siblings, 1 reply; 39+ messages in thread
From: Ulf Hansson @ 2025-01-15 15:42 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: Claudiu, rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel, linux-pm,
	devicetree, linux-kernel, linux-renesas-soc, linux-arm-kernel,
	linux-clk, Claudiu Beznea

On Thu, 9 Jan 2025 at 18:34, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>
>
> Ulf,
>
> can you have a look at this particular patch please ?
>
> Perhaps this scenario already happened in the past and there is an
> alternative to fix it instead of this proposed change

I think the patch makes sense.

If there is a PM domain that is attached to the device that is
managing the clocks for the thermal zone, the detach procedure
certainly needs to be well controlled/synchronized.

>
>
> On 03/01/2025 17:38, Claudiu wrote:
> > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >
> > On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
> > clocks are managed through PM domains. These PM domains, registered on
> > behalf of the clock controller driver, are configured with
> > GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
> > clocks are enabled/disabled using runtime PM APIs.
> >
> > During probe, devices are attached to the PM domain controlling their
> > clocks. Similarly, during removal, devices are detached from the PM domain.
> >
> > The detachment call stack is as follows:
> >
> > device_driver_detach() ->
> >    device_release_driver_internal() ->
> >      __device_release_driver() ->
> >        device_remove() ->
> >          platform_remove() ->
> >         dev_pm_domain_detach()
> >
> > In the upcoming Renesas RZ/G3S thermal driver, the
> > struct thermal_zone_device_ops::change_mode API is implemented to
> > start/stop the thermal sensor unit. Register settings are updated within
> > the change_mode API.
> >
> > In case devres helpers are used for thermal zone register/unregister the
> > struct thermal_zone_device_ops::change_mode API is invoked when the
> > driver is unbound. The identified call stack is as follows:
> >
> > device_driver_detach() ->
> >    device_release_driver_internal() ->
> >      device_unbind_cleanup() ->
> >        devres_release_all() ->
> >          devm_thermal_of_zone_release() ->
> >         thermal_zone_device_disable() ->
> >           thermal_zone_device_set_mode() ->
> >             rzg3s_thermal_change_mode()
> >
> > The device_unbind_cleanup() function is called after the thermal device is
> > detached from the PM domain (via dev_pm_domain_detach()).
> >
> > The rzg3s_thermal_change_mode() implementation calls
> > pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
> > accessing the registers. However, during the unbind scenario, the
> > devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> > Consequently, the clocks are not enabled, as the device is removed from
> > the PM domain at this time, leading to an Asynchronous SError Interrupt.
> > The system cannot be used after this.
> >
> > Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
> > be used in the upcomming RZ/G3S thermal driver.
> >
> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>

Kind regards
Uffe

> > ---
> >   drivers/thermal/thermal_of.c |  8 +++++---
> >   include/linux/thermal.h      | 14 ++++++++++++++
> >   2 files changed, 19 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c
> > index fab11b98ca49..8fc35d20db60 100644
> > --- a/drivers/thermal/thermal_of.c
> > +++ b/drivers/thermal/thermal_of.c
> > @@ -329,11 +329,12 @@ static bool thermal_of_should_bind(struct thermal_zone_device *tz,
> >    *
> >    * @tz: a pointer to the thermal zone structure
> >    */
> > -static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> > +void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> >   {
> >       thermal_zone_device_disable(tz);
> >       thermal_zone_device_unregister(tz);
> >   }
> > +EXPORT_SYMBOL_GPL(thermal_of_zone_unregister);
> >
> >   /**
> >    * thermal_of_zone_register - Register a thermal zone with device node
> > @@ -355,8 +356,8 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> >    *  - ENOMEM: if one structure can not be allocated
> >    *  - Other negative errors are returned by the underlying called functions
> >    */
> > -static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > -                                                         const struct thermal_zone_device_ops *ops)
> > +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > +                                                  const struct thermal_zone_device_ops *ops)
> >   {
> >       struct thermal_zone_device_ops of_ops = *ops;
> >       struct thermal_zone_device *tz;
> > @@ -429,6 +430,7 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node *
> >
> >       return ERR_PTR(ret);
> >   }
> > +EXPORT_SYMBOL_GPL(thermal_of_zone_register);
> >
> >   static void devm_thermal_of_zone_release(struct device *dev, void *res)
> >   {
> > diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> > index 69f9bedd0ee8..adbb4092a064 100644
> > --- a/include/linux/thermal.h
> > +++ b/include/linux/thermal.h
> > @@ -195,13 +195,23 @@ struct thermal_zone_params {
> >
> >   /* Function declarations */
> >   #ifdef CONFIG_THERMAL_OF
> > +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > +                                                  const struct thermal_zone_device_ops *ops);
> >   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
> >                                                         const struct thermal_zone_device_ops *ops);
> >
> > +void thermal_of_zone_unregister(struct thermal_zone_device *tz);
> >   void devm_thermal_of_zone_unregister(struct device *dev, struct thermal_zone_device *tz);
> >
> >   #else
> >
> > +static inline
> > +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > +                                                  const struct thermal_zone_device_ops *ops)
> > +{
> > +     return ERR_PTR(-ENOTSUPP);
> > +}
> > +
> >   static inline
> >   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
> >                                                         const struct thermal_zone_device_ops *ops)
> > @@ -209,6 +219,10 @@ struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, in
> >       return ERR_PTR(-ENOTSUPP);
> >   }
> >
> > +static inline void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> > +{
> > +}
> > +
> >   static inline void devm_thermal_of_zone_unregister(struct device *dev,
> >                                                  struct thermal_zone_device *tz)
> >   {
>
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit
  2025-01-03 16:38 ` [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit Claudiu
  2025-01-08 23:43   ` Rob Herring (Arm)
@ 2025-01-22 10:12   ` Geert Uytterhoeven
  1 sibling, 0 replies; 39+ messages in thread
From: Geert Uytterhoeven @ 2025-01-22 10:12 UTC (permalink / raw)
  To: Claudiu
  Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, magnus.damm, mturquette, sboyd, p.zabel, ulf.hansson,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> The Renesas RZ/G3S SoC includes a Thermal Sensor Unit (TSU) block designed
> to measure the junction temperature. The temperature is measured using
> the RZ/G3S ADC, with a dedicated ADC channel directly connected to the TSU.
> Add documentation for it.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

LGTM from the hardware-description point of view, do
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-03 16:38 ` [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC Claudiu
@ 2025-01-22 10:29   ` Geert Uytterhoeven
  2025-01-25 12:18     ` Jonathan Cameron
  0 siblings, 1 reply; 39+ messages in thread
From: Geert Uytterhoeven @ 2025-01-22 10:29 UTC (permalink / raw)
  To: Claudiu
  Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, magnus.damm, mturquette, sboyd, p.zabel, ulf.hansson,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea,
	open list:IIO SUBSYSTEM AND DRIVERS

Hi Claudiu,

CC iio

On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that reports
> the junction temperature. The temperature is reported through a dedicated
> ADC channel. Add a driver for the Renesas RZ/G3S TSU.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/drivers/thermal/renesas/rzg3s_thermal.c

> +static int rzg3s_thermal_probe(struct platform_device *pdev)
> +{
> +       struct rzg3s_thermal_priv *priv;
> +       struct device *dev = &pdev->dev;
> +       int ret;
> +
> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +       if (!priv)
> +               return -ENOMEM;
> +
> +       priv->base = devm_platform_ioremap_resource(pdev, 0);
> +       if (IS_ERR(priv->base))
> +               return PTR_ERR(priv->base);
> +
> +       priv->channel = devm_iio_channel_get(dev, "tsu");

Given there's only a single IIO channel, you could pass NULL instead
of the name, and drop "io-channel-names" from the DT bindings.
I don't know what's the IIO policy w.r.t. unnamed channels, though.

> +       if (IS_ERR(priv->channel))
> +               return dev_err_probe(dev, PTR_ERR(priv->channel), "Failed to get IIO channel!\n");
> +
> +       priv->rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL);
> +       if (IS_ERR(priv->rstc))
> +               return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset!\n");
> +
> +       priv->dev = dev;
> +       priv->mode = THERMAL_DEVICE_DISABLED;
> +       platform_set_drvdata(pdev, priv);
> +
> +       pm_runtime_set_autosuspend_delay(dev, 300);
> +       pm_runtime_use_autosuspend(dev);
> +       pm_runtime_enable(dev);
> +
> +       ret = rzg3s_thermal_read_calib(priv);
> +       if (ret) {
> +               dev_err_probe(dev, ret, "Failed to read calibration data!\n");
> +               goto rpm_disable;
> +       }
> +
> +       priv->tz = thermal_of_zone_register(dev->of_node, 0, priv, &rzg3s_tz_of_ops);
> +       if (IS_ERR(priv->tz)) {
> +               dev_err_probe(dev, PTR_ERR(priv->tz), "Failed to register thermal zone!\n");
> +               goto rpm_disable;
> +       }
> +
> +       ret = thermal_add_hwmon_sysfs(priv->tz);
> +       if (ret) {
> +               dev_err_probe(dev, ret, "Failed to add hwmon sysfs!\n");
> +               goto tz_unregister;
> +       }
> +
> +       return 0;
> +
> +tz_unregister:
> +       thermal_of_zone_unregister(priv->tz);
> +rpm_disable:
> +       pm_runtime_disable(dev);
> +       pm_runtime_dont_use_autosuspend(dev);
> +       return ret;
> +}

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node
  2025-01-03 16:38 ` [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node Claudiu
@ 2025-01-22 10:31   ` Geert Uytterhoeven
  2025-01-30 17:53   ` Daniel Lezcano
  1 sibling, 0 replies; 39+ messages in thread
From: Geert Uytterhoeven @ 2025-01-22 10:31 UTC (permalink / raw)
  To: Claudiu
  Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, magnus.damm, mturquette, sboyd, p.zabel, ulf.hansson,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

Hi Claudiu,

On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Add TSU node along with thermal zones and keep it enabled in the SoC DTSI.
> The temperature reported by the TSU can only be read through channel 8 of
> the ADC. Therefore, enable the ADC by default.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Queueing in renesas-devel is postponed, pending acceptance of the DT
bindings by the thermal (and iio?) maintainers.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 6/6] arm64: defconfig: Enable RZ/G3S thermal
  2025-01-03 16:38 ` [PATCH 6/6] arm64: defconfig: Enable RZ/G3S thermal Claudiu
@ 2025-01-22 10:33   ` Geert Uytterhoeven
  0 siblings, 0 replies; 39+ messages in thread
From: Geert Uytterhoeven @ 2025-01-22 10:33 UTC (permalink / raw)
  To: Claudiu
  Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, magnus.damm, mturquette, sboyd, p.zabel, ulf.hansson,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Enable the CONFIG_RZG3S_THERMAL flag for the RZ/G3S SoC.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Queueing in renesas-devel is postponed, pending acceptance of the
driver by the thermal maintainers.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-22 10:29   ` Geert Uytterhoeven
@ 2025-01-25 12:18     ` Jonathan Cameron
  2025-01-27  8:32       ` Claudiu Beznea
  0 siblings, 1 reply; 39+ messages in thread
From: Jonathan Cameron @ 2025-01-25 12:18 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Claudiu, rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh,
	krzk+dt, conor+dt, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea,
	open list:IIO SUBSYSTEM AND DRIVERS

On Wed, 22 Jan 2025 11:29:19 +0100
Geert Uytterhoeven <geert@linux-m68k.org> wrote:

> Hi Claudiu,
> 
> CC iio
> 
> On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >
> > The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that reports
> > the junction temperature. The temperature is reported through a dedicated
> > ADC channel. Add a driver for the Renesas RZ/G3S TSU.
> >
> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>  
> 
> Thanks for your patch!
> 
> > --- /dev/null
> > +++ b/drivers/thermal/renesas/rzg3s_thermal.c  
> 
> > +static int rzg3s_thermal_probe(struct platform_device *pdev)
> > +{
> > +       struct rzg3s_thermal_priv *priv;
> > +       struct device *dev = &pdev->dev;
> > +       int ret;
> > +
> > +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > +       if (!priv)
> > +               return -ENOMEM;
> > +
> > +       priv->base = devm_platform_ioremap_resource(pdev, 0);
> > +       if (IS_ERR(priv->base))
> > +               return PTR_ERR(priv->base);
> > +
> > +       priv->channel = devm_iio_channel_get(dev, "tsu");  
> 
> Given there's only a single IIO channel, you could pass NULL instead
> of the name, and drop "io-channel-names" from the DT bindings.
> I don't know what's the IIO policy w.r.t. unnamed channels, though.

It's supported, so fine as long as no future additional names show up.
Will just fallback to index 0 I think.

Jonathan

> 
> > +       if (IS_ERR(priv->channel))
> > +               return dev_err_probe(dev, PTR_ERR(priv->channel), "Failed to get IIO channel!\n");
> > +
> > +       priv->rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL);
> > +       if (IS_ERR(priv->rstc))
> > +               return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset!\n");
> > +
> > +       priv->dev = dev;
> > +       priv->mode = THERMAL_DEVICE_DISABLED;
> > +       platform_set_drvdata(pdev, priv);
> > +
> > +       pm_runtime_set_autosuspend_delay(dev, 300);
> > +       pm_runtime_use_autosuspend(dev);
> > +       pm_runtime_enable(dev);
> > +
> > +       ret = rzg3s_thermal_read_calib(priv);
> > +       if (ret) {
> > +               dev_err_probe(dev, ret, "Failed to read calibration data!\n");
> > +               goto rpm_disable;
> > +       }
> > +
> > +       priv->tz = thermal_of_zone_register(dev->of_node, 0, priv, &rzg3s_tz_of_ops);
> > +       if (IS_ERR(priv->tz)) {
> > +               dev_err_probe(dev, PTR_ERR(priv->tz), "Failed to register thermal zone!\n");
> > +               goto rpm_disable;
> > +       }
> > +
> > +       ret = thermal_add_hwmon_sysfs(priv->tz);
> > +       if (ret) {
> > +               dev_err_probe(dev, ret, "Failed to add hwmon sysfs!\n");
> > +               goto tz_unregister;
> > +       }
> > +
> > +       return 0;
> > +
> > +tz_unregister:
> > +       thermal_of_zone_unregister(priv->tz);
> > +rpm_disable:
> > +       pm_runtime_disable(dev);
> > +       pm_runtime_dont_use_autosuspend(dev);
> > +       return ret;
> > +}  
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-25 12:18     ` Jonathan Cameron
@ 2025-01-27  8:32       ` Claudiu Beznea
  2025-01-27  8:54         ` Geert Uytterhoeven
  0 siblings, 1 reply; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-27  8:32 UTC (permalink / raw)
  To: Jonathan Cameron, Geert Uytterhoeven
  Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, magnus.damm, mturquette, sboyd, p.zabel, ulf.hansson,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea,
	open list:IIO SUBSYSTEM AND DRIVERS



On 25.01.2025 14:18, Jonathan Cameron wrote:
> On Wed, 22 Jan 2025 11:29:19 +0100
> Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> 
>> Hi Claudiu,
>>
>> CC iio
>>
>> On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>
>>> The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that reports
>>> the junction temperature. The temperature is reported through a dedicated
>>> ADC channel. Add a driver for the Renesas RZ/G3S TSU.
>>>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>  
>>
>> Thanks for your patch!
>>
>>> --- /dev/null
>>> +++ b/drivers/thermal/renesas/rzg3s_thermal.c  
>>
>>> +static int rzg3s_thermal_probe(struct platform_device *pdev)
>>> +{
>>> +       struct rzg3s_thermal_priv *priv;
>>> +       struct device *dev = &pdev->dev;
>>> +       int ret;
>>> +
>>> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>>> +       if (!priv)
>>> +               return -ENOMEM;
>>> +
>>> +       priv->base = devm_platform_ioremap_resource(pdev, 0);
>>> +       if (IS_ERR(priv->base))
>>> +               return PTR_ERR(priv->base);
>>> +
>>> +       priv->channel = devm_iio_channel_get(dev, "tsu");  
>>
>> Given there's only a single IIO channel, you could pass NULL instead
>> of the name, and drop "io-channel-names" from the DT bindings.
>> I don't know what's the IIO policy w.r.t. unnamed channels, though.
> 
> It's supported, so fine as long as no future additional names show up.
> Will just fallback to index 0 I think.

If everyone agrees, I would keep the name, too, to avoid complications in
case this IP variant will be extended on future SoCs.

Thank you,
Claudiu

> 
> Jonathan
> 
>>
>>> +       if (IS_ERR(priv->channel))
>>> +               return dev_err_probe(dev, PTR_ERR(priv->channel), "Failed to get IIO channel!\n");
>>> +
>>> +       priv->rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL);
>>> +       if (IS_ERR(priv->rstc))
>>> +               return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset!\n");
>>> +
>>> +       priv->dev = dev;
>>> +       priv->mode = THERMAL_DEVICE_DISABLED;
>>> +       platform_set_drvdata(pdev, priv);
>>> +
>>> +       pm_runtime_set_autosuspend_delay(dev, 300);
>>> +       pm_runtime_use_autosuspend(dev);
>>> +       pm_runtime_enable(dev);
>>> +
>>> +       ret = rzg3s_thermal_read_calib(priv);
>>> +       if (ret) {
>>> +               dev_err_probe(dev, ret, "Failed to read calibration data!\n");
>>> +               goto rpm_disable;
>>> +       }
>>> +
>>> +       priv->tz = thermal_of_zone_register(dev->of_node, 0, priv, &rzg3s_tz_of_ops);
>>> +       if (IS_ERR(priv->tz)) {
>>> +               dev_err_probe(dev, PTR_ERR(priv->tz), "Failed to register thermal zone!\n");
>>> +               goto rpm_disable;
>>> +       }
>>> +
>>> +       ret = thermal_add_hwmon_sysfs(priv->tz);
>>> +       if (ret) {
>>> +               dev_err_probe(dev, ret, "Failed to add hwmon sysfs!\n");
>>> +               goto tz_unregister;
>>> +       }
>>> +
>>> +       return 0;
>>> +
>>> +tz_unregister:
>>> +       thermal_of_zone_unregister(priv->tz);
>>> +rpm_disable:
>>> +       pm_runtime_disable(dev);
>>> +       pm_runtime_dont_use_autosuspend(dev);
>>> +       return ret;
>>> +}  
>>
>> Gr{oetje,eeting}s,
>>
>>                         Geert
>>
>> --
>> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>>
>> In personal conversations with technical people, I call myself a hacker. But
>> when I'm talking to journalists I just say "programmer" or something like that.
>>                                 -- Linus Torvalds
>>
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-27  8:32       ` Claudiu Beznea
@ 2025-01-27  8:54         ` Geert Uytterhoeven
  2025-01-27  9:11           ` Biju Das
  0 siblings, 1 reply; 39+ messages in thread
From: Geert Uytterhoeven @ 2025-01-27  8:54 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: Jonathan Cameron, rafael, daniel.lezcano, rui.zhang, lukasz.luba,
	robh, krzk+dt, conor+dt, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea,
	open list:IIO SUBSYSTEM AND DRIVERS

Hi Claudiu,

On Mon, 27 Jan 2025 at 09:33, Claudiu Beznea <claudiu.beznea@tuxon.dev> wrote:
> On 25.01.2025 14:18, Jonathan Cameron wrote:
> > On Wed, 22 Jan 2025 11:29:19 +0100
> > Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> >> On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> >>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>>
> >>> The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that reports
> >>> the junction temperature. The temperature is reported through a dedicated
> >>> ADC channel. Add a driver for the Renesas RZ/G3S TSU.
> >>>
> >>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>
> >> Thanks for your patch!
> >>
> >>> --- /dev/null
> >>> +++ b/drivers/thermal/renesas/rzg3s_thermal.c
> >>
> >>> +static int rzg3s_thermal_probe(struct platform_device *pdev)
> >>> +{
> >>> +       struct rzg3s_thermal_priv *priv;
> >>> +       struct device *dev = &pdev->dev;
> >>> +       int ret;
> >>> +
> >>> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> >>> +       if (!priv)
> >>> +               return -ENOMEM;
> >>> +
> >>> +       priv->base = devm_platform_ioremap_resource(pdev, 0);
> >>> +       if (IS_ERR(priv->base))
> >>> +               return PTR_ERR(priv->base);
> >>> +
> >>> +       priv->channel = devm_iio_channel_get(dev, "tsu");
> >>
> >> Given there's only a single IIO channel, you could pass NULL instead
> >> of the name, and drop "io-channel-names" from the DT bindings.
> >> I don't know what's the IIO policy w.r.t. unnamed channels, though.
> >
> > It's supported, so fine as long as no future additional names show up.
> > Will just fallback to index 0 I think.
>
> If everyone agrees, I would keep the name, too, to avoid complications in
> case this IP variant will be extended on future SoCs.

Fine for me.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


^ permalink raw reply	[flat|nested] 39+ messages in thread

* RE: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-27  8:54         ` Geert Uytterhoeven
@ 2025-01-27  9:11           ` Biju Das
  2025-01-27  9:15             ` Claudiu Beznea
  0 siblings, 1 reply; 39+ messages in thread
From: Biju Das @ 2025-01-27  9:11 UTC (permalink / raw)
  To: Geert Uytterhoeven, Claudiu.Beznea
  Cc: Jonathan Cameron, rafael@kernel.org, daniel.lezcano@linaro.org,
	rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de,
	ulf.hansson@linaro.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	Claudiu Beznea, open list:IIO SUBSYSTEM AND DRIVERS

Hi Claudiu,

> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: 27 January 2025 08:55
> Subject: Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
> 
> Hi Claudiu,
> 
> On Mon, 27 Jan 2025 at 09:33, Claudiu Beznea <claudiu.beznea@tuxon.dev> wrote:
> > On 25.01.2025 14:18, Jonathan Cameron wrote:
> > > On Wed, 22 Jan 2025 11:29:19 +0100
> > > Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > >> On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> > >>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> > >>>
> > >>> The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that
> > >>> reports the junction temperature. The temperature is reported
> > >>> through a dedicated ADC channel. Add a driver for the Renesas RZ/G3S TSU.
> > >>>
> > >>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> > >>
> > >> Thanks for your patch!
> > >>
> > >>> --- /dev/null
> > >>> +++ b/drivers/thermal/renesas/rzg3s_thermal.c
> > >>
> > >>> +static int rzg3s_thermal_probe(struct platform_device *pdev) {
> > >>> +       struct rzg3s_thermal_priv *priv;
> > >>> +       struct device *dev = &pdev->dev;
> > >>> +       int ret;
> > >>> +
> > >>> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > >>> +       if (!priv)
> > >>> +               return -ENOMEM;
> > >>> +
> > >>> +       priv->base = devm_platform_ioremap_resource(pdev, 0);
> > >>> +       if (IS_ERR(priv->base))
> > >>> +               return PTR_ERR(priv->base);
> > >>> +
> > >>> +       priv->channel = devm_iio_channel_get(dev, "tsu");
> > >>
> > >> Given there's only a single IIO channel, you could pass NULL
> > >> instead of the name, and drop "io-channel-names" from the DT bindings.
> > >> I don't know what's the IIO policy w.r.t. unnamed channels, though.
> > >
> > > It's supported, so fine as long as no future additional names show up.
> > > Will just fallback to index 0 I think.
> >
> > If everyone agrees, I would keep the name, too, to avoid complications
> > in case this IP variant will be extended on future SoCs.

If you are planning to extend this driver to other SoCs then may be update
KConfig with dependency on ARCH_RENESAS? see [1]

[1] https://lore.kernel.org/linux-renesas-soc/20250118-trout-of-luxurious-inquire-aae9aa@krzk-bin/

Cheers,
Biju

^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-27  9:11           ` Biju Das
@ 2025-01-27  9:15             ` Claudiu Beznea
  2025-01-27  9:17               ` Biju Das
  0 siblings, 1 reply; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-27  9:15 UTC (permalink / raw)
  To: Biju Das, Geert Uytterhoeven
  Cc: Jonathan Cameron, rafael@kernel.org, daniel.lezcano@linaro.org,
	rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de,
	ulf.hansson@linaro.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	Claudiu Beznea, open list:IIO SUBSYSTEM AND DRIVERS

Hi, Biju,

On 27.01.2025 11:11, Biju Das wrote:
> Hi Claudiu,
> 
>> -----Original Message-----
>> From: Geert Uytterhoeven <geert@linux-m68k.org>
>> Sent: 27 January 2025 08:55
>> Subject: Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
>>
>> Hi Claudiu,
>>
>> On Mon, 27 Jan 2025 at 09:33, Claudiu Beznea <claudiu.beznea@tuxon.dev> wrote:
>>> On 25.01.2025 14:18, Jonathan Cameron wrote:
>>>> On Wed, 22 Jan 2025 11:29:19 +0100
>>>> Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>>>>> On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
>>>>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>>>>
>>>>>> The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that
>>>>>> reports the junction temperature. The temperature is reported
>>>>>> through a dedicated ADC channel. Add a driver for the Renesas RZ/G3S TSU.
>>>>>>
>>>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>>>
>>>>> Thanks for your patch!
>>>>>
>>>>>> --- /dev/null
>>>>>> +++ b/drivers/thermal/renesas/rzg3s_thermal.c
>>>>>
>>>>>> +static int rzg3s_thermal_probe(struct platform_device *pdev) {
>>>>>> +       struct rzg3s_thermal_priv *priv;
>>>>>> +       struct device *dev = &pdev->dev;
>>>>>> +       int ret;
>>>>>> +
>>>>>> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>>>>>> +       if (!priv)
>>>>>> +               return -ENOMEM;
>>>>>> +
>>>>>> +       priv->base = devm_platform_ioremap_resource(pdev, 0);
>>>>>> +       if (IS_ERR(priv->base))
>>>>>> +               return PTR_ERR(priv->base);
>>>>>> +
>>>>>> +       priv->channel = devm_iio_channel_get(dev, "tsu");
>>>>>
>>>>> Given there's only a single IIO channel, you could pass NULL
>>>>> instead of the name, and drop "io-channel-names" from the DT bindings.
>>>>> I don't know what's the IIO policy w.r.t. unnamed channels, though.
>>>>
>>>> It's supported, so fine as long as no future additional names show up.
>>>> Will just fallback to index 0 I think.
>>>
>>> If everyone agrees, I would keep the name, too, to avoid complications
>>> in case this IP variant will be extended on future SoCs.
> 
> If you are planning to extend this driver to other SoCs then may be update

I don't plan to extend it. My point here was to keep the driver as is for
any possible future extensions that might arise.

Thank you,
Claudiu

> KConfig with dependency on ARCH_RENESAS? see [1]
> 
> [1] https://lore.kernel.org/linux-renesas-soc/20250118-trout-of-luxurious-inquire-aae9aa@krzk-bin/
> 
> Cheers,
> Biju



^ permalink raw reply	[flat|nested] 39+ messages in thread

* RE: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
  2025-01-27  9:15             ` Claudiu Beznea
@ 2025-01-27  9:17               ` Biju Das
  0 siblings, 0 replies; 39+ messages in thread
From: Biju Das @ 2025-01-27  9:17 UTC (permalink / raw)
  To: Claudiu.Beznea, Geert Uytterhoeven
  Cc: Jonathan Cameron, rafael@kernel.org, daniel.lezcano@linaro.org,
	rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de,
	ulf.hansson@linaro.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	Claudiu Beznea, open list:IIO SUBSYSTEM AND DRIVERS

Hi Claudiu,

> -----Original Message-----
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Sent: 27 January 2025 09:16
> Subject: Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC
> 
> Hi, Biju,
> 
> On 27.01.2025 11:11, Biju Das wrote:
> > Hi Claudiu,
> >
> >> -----Original Message-----
> >> From: Geert Uytterhoeven <geert@linux-m68k.org>
> >> Sent: 27 January 2025 08:55
> >> Subject: Re: [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver
> >> for the Renesas RZ/G3S SoC
> >>
> >> Hi Claudiu,
> >>
> >> On Mon, 27 Jan 2025 at 09:33, Claudiu Beznea <claudiu.beznea@tuxon.dev> wrote:
> >>> On 25.01.2025 14:18, Jonathan Cameron wrote:
> >>>> On Wed, 22 Jan 2025 11:29:19 +0100
> >>>> Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> >>>>> On Fri, Jan 3, 2025 at 5:38 PM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> >>>>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>>>>>
> >>>>>> The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that
> >>>>>> reports the junction temperature. The temperature is reported
> >>>>>> through a dedicated ADC channel. Add a driver for the Renesas RZ/G3S TSU.
> >>>>>>
> >>>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>>>>
> >>>>> Thanks for your patch!
> >>>>>
> >>>>>> --- /dev/null
> >>>>>> +++ b/drivers/thermal/renesas/rzg3s_thermal.c
> >>>>>
> >>>>>> +static int rzg3s_thermal_probe(struct platform_device *pdev) {
> >>>>>> +       struct rzg3s_thermal_priv *priv;
> >>>>>> +       struct device *dev = &pdev->dev;
> >>>>>> +       int ret;
> >>>>>> +
> >>>>>> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> >>>>>> +       if (!priv)
> >>>>>> +               return -ENOMEM;
> >>>>>> +
> >>>>>> +       priv->base = devm_platform_ioremap_resource(pdev, 0);
> >>>>>> +       if (IS_ERR(priv->base))
> >>>>>> +               return PTR_ERR(priv->base);
> >>>>>> +
> >>>>>> +       priv->channel = devm_iio_channel_get(dev, "tsu");
> >>>>>
> >>>>> Given there's only a single IIO channel, you could pass NULL
> >>>>> instead of the name, and drop "io-channel-names" from the DT bindings.
> >>>>> I don't know what's the IIO policy w.r.t. unnamed channels, though.
> >>>>
> >>>> It's supported, so fine as long as no future additional names show up.
> >>>> Will just fallback to index 0 I think.
> >>>
> >>> If everyone agrees, I would keep the name, too, to avoid
> >>> complications in case this IP variant will be extended on future SoCs.
> >
> > If you are planning to extend this driver to other SoCs then may be
> > update
> 
> I don't plan to extend it. My point here was to keep the driver as is for any possible future
> extensions that might arise.

OK, then it is fine as the driver is only for RZ/G3S SoC.

Cheers,
Biju


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-03 16:38 ` [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone Claudiu
  2025-01-09 17:34   ` Daniel Lezcano
@ 2025-01-29 17:24   ` Daniel Lezcano
  2025-01-30  9:08     ` Claudiu Beznea
  1 sibling, 1 reply; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-29 17:24 UTC (permalink / raw)
  To: Claudiu
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

Hi Claudiu,

On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
> clocks are managed through PM domains. These PM domains, registered on
> behalf of the clock controller driver, are configured with
> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
> clocks are enabled/disabled using runtime PM APIs.
> 
> During probe, devices are attached to the PM domain controlling their
> clocks. Similarly, during removal, devices are detached from the PM domain.
> 
> The detachment call stack is as follows:
> 
> device_driver_detach() ->
>   device_release_driver_internal() ->
>     __device_release_driver() ->
>       device_remove() ->
>         platform_remove() ->
> 	  dev_pm_domain_detach()
> 
> In the upcoming Renesas RZ/G3S thermal driver, the
> struct thermal_zone_device_ops::change_mode API is implemented to
> start/stop the thermal sensor unit. Register settings are updated within
> the change_mode API.
> 
> In case devres helpers are used for thermal zone register/unregister the
> struct thermal_zone_device_ops::change_mode API is invoked when the
> driver is unbound. The identified call stack is as follows:
> 
> device_driver_detach() ->
>   device_release_driver_internal() ->
>     device_unbind_cleanup() ->
>       devres_release_all() ->
>         devm_thermal_of_zone_release() ->
> 	  thermal_zone_device_disable() ->
> 	    thermal_zone_device_set_mode() ->
> 	      rzg3s_thermal_change_mode()
> 
> The device_unbind_cleanup() function is called after the thermal device is
> detached from the PM domain (via dev_pm_domain_detach()).
> 
> The rzg3s_thermal_change_mode() implementation calls
> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
> accessing the registers. However, during the unbind scenario, the
> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> Consequently, the clocks are not enabled, as the device is removed from
> the PM domain at this time, leading to an Asynchronous SError Interrupt.
> The system cannot be used after this.

I've been through the driver before responding to this change. What is the
benefit of powering down / up (or clock off / on) the thermal sensor when
reading the temperature ?

I can understand for disable / enable but I don't get for the classic usage
where a governor will be reading the temperature regularly.

Would the IP need some cycles to capture the temperature accurately after the
clock is enabled ?

> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
> be used in the upcomming RZ/G3S thermal driver.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-29 17:24   ` Daniel Lezcano
@ 2025-01-30  9:08     ` Claudiu Beznea
  2025-01-30 10:07       ` Daniel Lezcano
  0 siblings, 1 reply; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-30  9:08 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

Hi, Daniel,

On 29.01.2025 19:24, Daniel Lezcano wrote:
> Hi Claudiu,
> 
> On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
>> clocks are managed through PM domains. These PM domains, registered on
>> behalf of the clock controller driver, are configured with
>> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
>> clocks are enabled/disabled using runtime PM APIs.
>>
>> During probe, devices are attached to the PM domain controlling their
>> clocks. Similarly, during removal, devices are detached from the PM domain.
>>
>> The detachment call stack is as follows:
>>
>> device_driver_detach() ->
>>   device_release_driver_internal() ->
>>     __device_release_driver() ->
>>       device_remove() ->
>>         platform_remove() ->
>> 	  dev_pm_domain_detach()
>>
>> In the upcoming Renesas RZ/G3S thermal driver, the
>> struct thermal_zone_device_ops::change_mode API is implemented to
>> start/stop the thermal sensor unit. Register settings are updated within
>> the change_mode API.
>>
>> In case devres helpers are used for thermal zone register/unregister the
>> struct thermal_zone_device_ops::change_mode API is invoked when the
>> driver is unbound. The identified call stack is as follows:
>>
>> device_driver_detach() ->
>>   device_release_driver_internal() ->
>>     device_unbind_cleanup() ->
>>       devres_release_all() ->
>>         devm_thermal_of_zone_release() ->
>> 	  thermal_zone_device_disable() ->
>> 	    thermal_zone_device_set_mode() ->
>> 	      rzg3s_thermal_change_mode()
>>
>> The device_unbind_cleanup() function is called after the thermal device is
>> detached from the PM domain (via dev_pm_domain_detach()).
>>
>> The rzg3s_thermal_change_mode() implementation calls
>> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
>> accessing the registers. However, during the unbind scenario, the
>> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
>> Consequently, the clocks are not enabled, as the device is removed from
>> the PM domain at this time, leading to an Asynchronous SError Interrupt.
>> The system cannot be used after this.
> 
> I've been through the driver before responding to this change. What is the
> benefit of powering down / up (or clock off / on) the thermal sensor when
> reading the temperature ?
> 
> I can understand for disable / enable but I don't get for the classic usage
> where a governor will be reading the temperature regularly.

I tried to be as power saving as possible both at runtime and after the IP
is not used anymore as the HW manual doesn't mentioned anything about
accuracy or implications of disabling the IP clock at runtime. We use
similar approach (of disabling clocks at runtime) for other IPs in the
RZ/G3S SoC as well.

> 
> Would the IP need some cycles to capture the temperature accurately after the
> clock is enabled ?

There is nothing about this mentioned about this in the HW manual of the
RZ/G3S SoC. The only points mentioned are as described in the driver code:
- wait at least 3us after each IIO channel read
- wait at least 30us after enabling the sensor
- wait at least 50us after setting OE bit in TSU_SM

For this I chose to have it implemented as proposed.

If any, the HW manual is available here
https://www.renesas.com/en/document/mah/rzg3s-group-users-manual-hardware?r=25458591
(an archive is here; the manual is in Deliverables/r01uh1014ej0110-rzg3s.pdf)

Thank you for your review,
Claudiu

> 
>> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
>> be used in the upcomming RZ/G3S thermal driver.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30  9:08     ` Claudiu Beznea
@ 2025-01-30 10:07       ` Daniel Lezcano
  2025-01-30 10:30         ` Claudiu Beznea
  2025-01-30 10:33         ` Biju Das
  0 siblings, 2 replies; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-30 10:07 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
> Hi, Daniel,
> 
> On 29.01.2025 19:24, Daniel Lezcano wrote:
> > Hi Claudiu,
> > 
> > On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote:
> >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>
> >> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
> >> clocks are managed through PM domains. These PM domains, registered on
> >> behalf of the clock controller driver, are configured with
> >> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
> >> clocks are enabled/disabled using runtime PM APIs.
> >>
> >> During probe, devices are attached to the PM domain controlling their
> >> clocks. Similarly, during removal, devices are detached from the PM domain.
> >>
> >> The detachment call stack is as follows:
> >>
> >> device_driver_detach() ->
> >>   device_release_driver_internal() ->
> >>     __device_release_driver() ->
> >>       device_remove() ->
> >>         platform_remove() ->
> >> 	  dev_pm_domain_detach()
> >>
> >> In the upcoming Renesas RZ/G3S thermal driver, the
> >> struct thermal_zone_device_ops::change_mode API is implemented to
> >> start/stop the thermal sensor unit. Register settings are updated within
> >> the change_mode API.
> >>
> >> In case devres helpers are used for thermal zone register/unregister the
> >> struct thermal_zone_device_ops::change_mode API is invoked when the
> >> driver is unbound. The identified call stack is as follows:
> >>
> >> device_driver_detach() ->
> >>   device_release_driver_internal() ->
> >>     device_unbind_cleanup() ->
> >>       devres_release_all() ->
> >>         devm_thermal_of_zone_release() ->
> >> 	  thermal_zone_device_disable() ->
> >> 	    thermal_zone_device_set_mode() ->
> >> 	      rzg3s_thermal_change_mode()
> >>
> >> The device_unbind_cleanup() function is called after the thermal device is
> >> detached from the PM domain (via dev_pm_domain_detach()).
> >>
> >> The rzg3s_thermal_change_mode() implementation calls
> >> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
> >> accessing the registers. However, during the unbind scenario, the
> >> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> >> Consequently, the clocks are not enabled, as the device is removed from
> >> the PM domain at this time, leading to an Asynchronous SError Interrupt.
> >> The system cannot be used after this.
> > 
> > I've been through the driver before responding to this change. What is the
> > benefit of powering down / up (or clock off / on) the thermal sensor when
> > reading the temperature ?
> > 
> > I can understand for disable / enable but I don't get for the classic usage
> > where a governor will be reading the temperature regularly.
> 
> I tried to be as power saving as possible both at runtime and after the IP
> is not used anymore as the HW manual doesn't mentioned anything about
> accuracy or implications of disabling the IP clock at runtime. We use
> similar approach (of disabling clocks at runtime) for other IPs in the
> RZ/G3S SoC as well.
> 
> > 
> > Would the IP need some cycles to capture the temperature accurately after the
> > clock is enabled ?
> 
> There is nothing about this mentioned about this in the HW manual of the
> RZ/G3S SoC. The only points mentioned are as described in the driver code:
> - wait at least 3us after each IIO channel read
> - wait at least 30us after enabling the sensor
> - wait at least 50us after setting OE bit in TSU_SM
> 
> For this I chose to have it implemented as proposed.

IMO, disabling/enabling the clock between two reads through the pm runtime may
not be a good thing, especially if the system enters a thermal situation where
it has to mitigate.

Without any testing capturing the temperatures and compare between the always-on
and on/off, it is hard to say if it is true or not. Up to you to test that or
not. If you think it is fine, then let's go with it.
 
> If any, the HW manual is available here
> https://www.renesas.com/en/document/mah/rzg3s-group-users-manual-hardware?r=25458591
> (an archive is here; the manual is in Deliverables/r01uh1014ej0110-rzg3s.pdf)
> 
> Thank you for your review,
> Claudiu
> 
> > 
> >> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
> >> be used in the upcomming RZ/G3S thermal driver.
> >>
> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 

-- 

 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 10:07       ` Daniel Lezcano
@ 2025-01-30 10:30         ` Claudiu Beznea
  2025-01-30 10:50           ` Claudiu Beznea
  2025-01-30 17:24           ` Daniel Lezcano
  2025-01-30 10:33         ` Biju Das
  1 sibling, 2 replies; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-30 10:30 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea



On 30.01.2025 12:07, Daniel Lezcano wrote:
> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>> Hi, Daniel,
>>
>> On 29.01.2025 19:24, Daniel Lezcano wrote:
>>> Hi Claudiu,
>>>
>>> On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote:
>>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>>
>>>> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
>>>> clocks are managed through PM domains. These PM domains, registered on
>>>> behalf of the clock controller driver, are configured with
>>>> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
>>>> clocks are enabled/disabled using runtime PM APIs.
>>>>
>>>> During probe, devices are attached to the PM domain controlling their
>>>> clocks. Similarly, during removal, devices are detached from the PM domain.
>>>>
>>>> The detachment call stack is as follows:
>>>>
>>>> device_driver_detach() ->
>>>>   device_release_driver_internal() ->
>>>>     __device_release_driver() ->
>>>>       device_remove() ->
>>>>         platform_remove() ->
>>>> 	  dev_pm_domain_detach()
>>>>
>>>> In the upcoming Renesas RZ/G3S thermal driver, the
>>>> struct thermal_zone_device_ops::change_mode API is implemented to
>>>> start/stop the thermal sensor unit. Register settings are updated within
>>>> the change_mode API.
>>>>
>>>> In case devres helpers are used for thermal zone register/unregister the
>>>> struct thermal_zone_device_ops::change_mode API is invoked when the
>>>> driver is unbound. The identified call stack is as follows:
>>>>
>>>> device_driver_detach() ->
>>>>   device_release_driver_internal() ->
>>>>     device_unbind_cleanup() ->
>>>>       devres_release_all() ->
>>>>         devm_thermal_of_zone_release() ->
>>>> 	  thermal_zone_device_disable() ->
>>>> 	    thermal_zone_device_set_mode() ->
>>>> 	      rzg3s_thermal_change_mode()
>>>>
>>>> The device_unbind_cleanup() function is called after the thermal device is
>>>> detached from the PM domain (via dev_pm_domain_detach()).
>>>>
>>>> The rzg3s_thermal_change_mode() implementation calls
>>>> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
>>>> accessing the registers. However, during the unbind scenario, the
>>>> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
>>>> Consequently, the clocks are not enabled, as the device is removed from
>>>> the PM domain at this time, leading to an Asynchronous SError Interrupt.
>>>> The system cannot be used after this.
>>>
>>> I've been through the driver before responding to this change. What is the
>>> benefit of powering down / up (or clock off / on) the thermal sensor when
>>> reading the temperature ?
>>>
>>> I can understand for disable / enable but I don't get for the classic usage
>>> where a governor will be reading the temperature regularly.
>>
>> I tried to be as power saving as possible both at runtime and after the IP
>> is not used anymore as the HW manual doesn't mentioned anything about
>> accuracy or implications of disabling the IP clock at runtime. We use
>> similar approach (of disabling clocks at runtime) for other IPs in the
>> RZ/G3S SoC as well.
>>
>>>
>>> Would the IP need some cycles to capture the temperature accurately after the
>>> clock is enabled ?
>>
>> There is nothing about this mentioned about this in the HW manual of the
>> RZ/G3S SoC. The only points mentioned are as described in the driver code:
>> - wait at least 3us after each IIO channel read
>> - wait at least 30us after enabling the sensor
>> - wait at least 50us after setting OE bit in TSU_SM
>>
>> For this I chose to have it implemented as proposed.
> 
> IMO, disabling/enabling the clock between two reads through the pm runtime may
> not be a good thing, especially if the system enters a thermal situation where
> it has to mitigate.
> 
> Without any testing capturing the temperatures and compare between the always-on
> and on/off, it is hard to say if it is true or not. Up to you to test that or
> not. If you think it is fine, then let's go with it.

I tested it with and w/o the runtime PM and on/off support (so, everything
ON from the probe) and the reported temperature values were similar.

Thank you,
Claudiu

>  
>> If any, the HW manual is available here
>> https://www.renesas.com/en/document/mah/rzg3s-group-users-manual-hardware?r=25458591
>> (an archive is here; the manual is in Deliverables/r01uh1014ej0110-rzg3s.pdf)
>>
>> Thank you for your review,
>> Claudiu
>>
>>>
>>>> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
>>>> be used in the upcomming RZ/G3S thermal driver.
>>>>
>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* RE: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 10:07       ` Daniel Lezcano
  2025-01-30 10:30         ` Claudiu Beznea
@ 2025-01-30 10:33         ` Biju Das
  2025-01-30 17:31           ` Daniel Lezcano
  1 sibling, 1 reply; 39+ messages in thread
From: Biju Das @ 2025-01-30 10:33 UTC (permalink / raw)
  To: Daniel Lezcano, Claudiu.Beznea
  Cc: rafael@kernel.org, rui.zhang@intel.com, lukasz.luba@arm.com,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	geert+renesas@glider.be, magnus.damm@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de,
	ulf.hansson@linaro.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	Claudiu Beznea

Hi Daniel Lezcano, 

> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@linaro.org>
> Sent: 30 January 2025 10:07
> Subject: Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
> 
> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
> > Hi, Daniel,
> >
> > On 29.01.2025 19:24, Daniel Lezcano wrote:
> > > Hi Claudiu,
> > >
> > > On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote:
> > >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> > >>
> > >> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC,
> > >> UL}), clocks are managed through PM domains. These PM domains,
> > >> registered on behalf of the clock controller driver, are configured
> > >> with GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ
> > >> SoCs, the clocks are enabled/disabled using runtime PM APIs.
> > >>
> > >> During probe, devices are attached to the PM domain controlling
> > >> their clocks. Similarly, during removal, devices are detached from the PM domain.
> > >>
> > >> The detachment call stack is as follows:
> > >>
> > >> device_driver_detach() ->
> > >>   device_release_driver_internal() ->
> > >>     __device_release_driver() ->
> > >>       device_remove() ->
> > >>         platform_remove() ->
> > >> 	  dev_pm_domain_detach()
> > >>
> > >> In the upcoming Renesas RZ/G3S thermal driver, the struct
> > >> thermal_zone_device_ops::change_mode API is implemented to
> > >> start/stop the thermal sensor unit. Register settings are updated
> > >> within the change_mode API.
> > >>
> > >> In case devres helpers are used for thermal zone
> > >> register/unregister the struct thermal_zone_device_ops::change_mode
> > >> API is invoked when the driver is unbound. The identified call stack is as follows:
> > >>
> > >> device_driver_detach() ->
> > >>   device_release_driver_internal() ->
> > >>     device_unbind_cleanup() ->
> > >>       devres_release_all() ->
> > >>         devm_thermal_of_zone_release() ->
> > >> 	  thermal_zone_device_disable() ->
> > >> 	    thermal_zone_device_set_mode() ->
> > >> 	      rzg3s_thermal_change_mode()
> > >>
> > >> The device_unbind_cleanup() function is called after the thermal
> > >> device is detached from the PM domain (via dev_pm_domain_detach()).
> > >>
> > >> The rzg3s_thermal_change_mode() implementation calls
> > >> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend()
> > >> before/after accessing the registers. However, during the unbind
> > >> scenario, the
> > >> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> > >> Consequently, the clocks are not enabled, as the device is removed
> > >> from the PM domain at this time, leading to an Asynchronous SError Interrupt.
> > >> The system cannot be used after this.
> > >
> > > I've been through the driver before responding to this change. What
> > > is the benefit of powering down / up (or clock off / on) the thermal
> > > sensor when reading the temperature ?
> > >
> > > I can understand for disable / enable but I don't get for the
> > > classic usage where a governor will be reading the temperature regularly.
> >
> > I tried to be as power saving as possible both at runtime and after
> > the IP is not used anymore as the HW manual doesn't mentioned anything
> > about accuracy or implications of disabling the IP clock at runtime.
> > We use similar approach (of disabling clocks at runtime) for other IPs
> > in the RZ/G3S SoC as well.
> >
> > >
> > > Would the IP need some cycles to capture the temperature accurately
> > > after the clock is enabled ?
> >
> > There is nothing about this mentioned about this in the HW manual of
> > the RZ/G3S SoC. The only points mentioned are as described in the driver code:
> > - wait at least 3us after each IIO channel read
> > - wait at least 30us after enabling the sensor
> > - wait at least 50us after setting OE bit in TSU_SM
> >
> > For this I chose to have it implemented as proposed.
> 
> IMO, disabling/enabling the clock between two reads through the pm runtime may not be a good thing,
> especially if the system enters a thermal situation where it has to mitigate.

Just a question, You mean to avoid device destruction due to high temperature?? Assuming disabling the clk happens
when the temp reaches the boundary and re-enabling of the clk after a time(which involves monitoring the CLK ON
bit after enabling it, or a run time enable failure happens), where it exceeds the threshold??

Cheers,
Biju


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 10:30         ` Claudiu Beznea
@ 2025-01-30 10:50           ` Claudiu Beznea
  2025-01-30 17:24           ` Daniel Lezcano
  1 sibling, 0 replies; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-30 10:50 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea



On 30.01.2025 12:30, Claudiu Beznea wrote:
> 
> 
> On 30.01.2025 12:07, Daniel Lezcano wrote:
>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>> Hi, Daniel,
>>>
>>> On 29.01.2025 19:24, Daniel Lezcano wrote:
>>>> Hi Claudiu,
>>>>
>>>> On Fri, Jan 03, 2025 at 06:38:01PM +0200, Claudiu wrote:
>>>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>>>
>>>>> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
>>>>> clocks are managed through PM domains. These PM domains, registered on
>>>>> behalf of the clock controller driver, are configured with
>>>>> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
>>>>> clocks are enabled/disabled using runtime PM APIs.
>>>>>
>>>>> During probe, devices are attached to the PM domain controlling their
>>>>> clocks. Similarly, during removal, devices are detached from the PM domain.
>>>>>
>>>>> The detachment call stack is as follows:
>>>>>
>>>>> device_driver_detach() ->
>>>>>   device_release_driver_internal() ->
>>>>>     __device_release_driver() ->
>>>>>       device_remove() ->
>>>>>         platform_remove() ->
>>>>> 	  dev_pm_domain_detach()
>>>>>
>>>>> In the upcoming Renesas RZ/G3S thermal driver, the
>>>>> struct thermal_zone_device_ops::change_mode API is implemented to
>>>>> start/stop the thermal sensor unit. Register settings are updated within
>>>>> the change_mode API.
>>>>>
>>>>> In case devres helpers are used for thermal zone register/unregister the
>>>>> struct thermal_zone_device_ops::change_mode API is invoked when the
>>>>> driver is unbound. The identified call stack is as follows:
>>>>>
>>>>> device_driver_detach() ->
>>>>>   device_release_driver_internal() ->
>>>>>     device_unbind_cleanup() ->
>>>>>       devres_release_all() ->
>>>>>         devm_thermal_of_zone_release() ->
>>>>> 	  thermal_zone_device_disable() ->
>>>>> 	    thermal_zone_device_set_mode() ->
>>>>> 	      rzg3s_thermal_change_mode()
>>>>>
>>>>> The device_unbind_cleanup() function is called after the thermal device is
>>>>> detached from the PM domain (via dev_pm_domain_detach()).
>>>>>
>>>>> The rzg3s_thermal_change_mode() implementation calls
>>>>> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
>>>>> accessing the registers. However, during the unbind scenario, the
>>>>> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
>>>>> Consequently, the clocks are not enabled, as the device is removed from
>>>>> the PM domain at this time, leading to an Asynchronous SError Interrupt.
>>>>> The system cannot be used after this.
>>>>
>>>> I've been through the driver before responding to this change. What is the
>>>> benefit of powering down / up (or clock off / on) the thermal sensor when
>>>> reading the temperature ?
>>>>
>>>> I can understand for disable / enable but I don't get for the classic usage
>>>> where a governor will be reading the temperature regularly.
>>>
>>> I tried to be as power saving as possible both at runtime and after the IP
>>> is not used anymore as the HW manual doesn't mentioned anything about
>>> accuracy or implications of disabling the IP clock at runtime. We use
>>> similar approach (of disabling clocks at runtime) for other IPs in the
>>> RZ/G3S SoC as well.
>>>
>>>>
>>>> Would the IP need some cycles to capture the temperature accurately after the
>>>> clock is enabled ?
>>>
>>> There is nothing about this mentioned about this in the HW manual of the
>>> RZ/G3S SoC. The only points mentioned are as described in the driver code:
>>> - wait at least 3us after each IIO channel read
>>> - wait at least 30us after enabling the sensor
>>> - wait at least 50us after setting OE bit in TSU_SM
>>>
>>> For this I chose to have it implemented as proposed.
>>
>> IMO, disabling/enabling the clock between two reads through the pm runtime may
>> not be a good thing, especially if the system enters a thermal situation where
>> it has to mitigate.

If it's not 100% safe I can drop the runtime PM support.

>>
>> Without any testing capturing the temperatures and compare between the always-on
>> and on/off, it is hard to say if it is true or not. Up to you to test that or
>> not. If you think it is fine, then let's go with it.
> 
> I tested it with and w/o the runtime PM and on/off support (so, everything
> ON from the probe) and the reported temperature values were similar.
> 
> Thank you,
> Claudiu
> 
>>  
>>> If any, the HW manual is available here
>>> https://www.renesas.com/en/document/mah/rzg3s-group-users-manual-hardware?r=25458591
>>> (an archive is here; the manual is in Deliverables/r01uh1014ej0110-rzg3s.pdf)
>>>
>>> Thank you for your review,
>>> Claudiu
>>>
>>>>
>>>>> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
>>>>> be used in the upcomming RZ/G3S thermal driver.
>>>>>
>>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>
>>
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 10:30         ` Claudiu Beznea
  2025-01-30 10:50           ` Claudiu Beznea
@ 2025-01-30 17:24           ` Daniel Lezcano
  2025-01-30 17:32             ` Claudiu Beznea
  2025-01-30 20:53             ` Claudiu Beznea
  1 sibling, 2 replies; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-30 17:24 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

On 30/01/2025 11:30, Claudiu Beznea wrote:
> 
> 
> On 30.01.2025 12:07, Daniel Lezcano wrote:
>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>> Hi, Daniel,

[ ... ]

>>>> Would the IP need some cycles to capture the temperature accurately after the
>>>> clock is enabled ?
>>>
>>> There is nothing about this mentioned about this in the HW manual of the
>>> RZ/G3S SoC. The only points mentioned are as described in the driver code:
>>> - wait at least 3us after each IIO channel read
>>> - wait at least 30us after enabling the sensor
>>> - wait at least 50us after setting OE bit in TSU_SM
>>>
>>> For this I chose to have it implemented as proposed.
>>
>> IMO, disabling/enabling the clock between two reads through the pm runtime may
>> not be a good thing, especially if the system enters a thermal situation where
>> it has to mitigate.
>>
>> Without any testing capturing the temperatures and compare between the always-on
>> and on/off, it is hard to say if it is true or not. Up to you to test that or
>> not. If you think it is fine, then let's go with it.
> 
> I tested it with and w/o the runtime PM and on/off support (so, everything
> ON from the probe) and the reported temperature values were similar.


Did you remove the roundup to 0.5°C ?


-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 10:33         ` Biju Das
@ 2025-01-30 17:31           ` Daniel Lezcano
  2025-01-30 17:47             ` Biju Das
  0 siblings, 1 reply; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-30 17:31 UTC (permalink / raw)
  To: Biju Das, Claudiu.Beznea
  Cc: rafael@kernel.org, rui.zhang@intel.com, lukasz.luba@arm.com,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	geert+renesas@glider.be, magnus.damm@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de,
	ulf.hansson@linaro.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	Claudiu Beznea

On 30/01/2025 11:33, Biju Das wrote:
> Hi Daniel Lezcano,
> 
>> -----Original Message-----

[ ... ]

>>>> I've been through the driver before responding to this change. What
>>>> is the benefit of powering down / up (or clock off / on) the thermal
>>>> sensor when reading the temperature ?
>>>>
>>>> I can understand for disable / enable but I don't get for the
>>>> classic usage where a governor will be reading the temperature regularly.
>>>
>>> I tried to be as power saving as possible both at runtime and after
>>> the IP is not used anymore as the HW manual doesn't mentioned anything
>>> about accuracy or implications of disabling the IP clock at runtime.
>>> We use similar approach (of disabling clocks at runtime) for other IPs
>>> in the RZ/G3S SoC as well.
>>>
>>>>
>>>> Would the IP need some cycles to capture the temperature accurately
>>>> after the clock is enabled ?
>>>
>>> There is nothing about this mentioned about this in the HW manual of
>>> the RZ/G3S SoC. The only points mentioned are as described in the driver code:
>>> - wait at least 3us after each IIO channel read
>>> - wait at least 30us after enabling the sensor
>>> - wait at least 50us after setting OE bit in TSU_SM
>>>
>>> For this I chose to have it implemented as proposed.
>>
>> IMO, disabling/enabling the clock between two reads through the pm runtime may not be a good thing,
>> especially if the system enters a thermal situation where it has to mitigate.
> 
> Just a question, You mean to avoid device destruction due to high temperature?? Assuming disabling the clk happens
> when the temp reaches the boundary and re-enabling of the clk after a time(which involves monitoring the CLK ON
> bit after enabling it, or a run time enable failure happens), where it exceeds the threshold??


Well, I have some comments with the device tree thermal configuration 
which may answer your question but I'll wait for Claudiu to check the 
temperature read comparison without rounding to 0.5°C

What I meant is if the temperature read is inaccurate, the mitigation 
will be inaccurate too. It may not reach the critical temperature but it 
is possible the performance could be impacted negatively under thermal 
stress.



-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 17:24           ` Daniel Lezcano
@ 2025-01-30 17:32             ` Claudiu Beznea
  2025-01-30 20:53             ` Claudiu Beznea
  1 sibling, 0 replies; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-30 17:32 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea



On 30.01.2025 19:24, Daniel Lezcano wrote:
> On 30/01/2025 11:30, Claudiu Beznea wrote:
>>
>>
>> On 30.01.2025 12:07, Daniel Lezcano wrote:
>>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>>> Hi, Daniel,
> 
> [ ... ]
> 
>>>>> Would the IP need some cycles to capture the temperature accurately
>>>>> after the
>>>>> clock is enabled ?
>>>>
>>>> There is nothing about this mentioned about this in the HW manual of the
>>>> RZ/G3S SoC. The only points mentioned are as described in the driver code:
>>>> - wait at least 3us after each IIO channel read
>>>> - wait at least 30us after enabling the sensor
>>>> - wait at least 50us after setting OE bit in TSU_SM
>>>>
>>>> For this I chose to have it implemented as proposed.
>>>
>>> IMO, disabling/enabling the clock between two reads through the pm
>>> runtime may
>>> not be a good thing, especially if the system enters a thermal situation
>>> where
>>> it has to mitigate.
>>>
>>> Without any testing capturing the temperatures and compare between the
>>> always-on
>>> and on/off, it is hard to say if it is true or not. Up to you to test
>>> that or
>>> not. If you think it is fine, then let's go with it.
>>
>> I tested it with and w/o the runtime PM and on/off support (so, everything
>> ON from the probe) and the reported temperature values were similar.
> 
> 
> Did you remove the roundup to 0.5°C ?

No, the roundup was present in both tested versions.

Thank you,
Claudiu

> 
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* RE: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 17:31           ` Daniel Lezcano
@ 2025-01-30 17:47             ` Biju Das
  0 siblings, 0 replies; 39+ messages in thread
From: Biju Das @ 2025-01-30 17:47 UTC (permalink / raw)
  To: Daniel Lezcano, Claudiu.Beznea
  Cc: rafael@kernel.org, rui.zhang@intel.com, lukasz.luba@arm.com,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	geert+renesas@glider.be, magnus.damm@gmail.com,
	mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de,
	ulf.hansson@linaro.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	Claudiu Beznea

Hi Daniel Lezcano,

> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@linaro.org>
> Sent: 30 January 2025 17:32
> Subject: Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
> 
> On 30/01/2025 11:33, Biju Das wrote:
> > Hi Daniel Lezcano,
> >
> >> -----Original Message-----
> 
> [ ... ]
> 
> >>>> I've been through the driver before responding to this change. What
> >>>> is the benefit of powering down / up (or clock off / on) the
> >>>> thermal sensor when reading the temperature ?
> >>>>
> >>>> I can understand for disable / enable but I don't get for the
> >>>> classic usage where a governor will be reading the temperature regularly.
> >>>
> >>> I tried to be as power saving as possible both at runtime and after
> >>> the IP is not used anymore as the HW manual doesn't mentioned
> >>> anything about accuracy or implications of disabling the IP clock at runtime.
> >>> We use similar approach (of disabling clocks at runtime) for other
> >>> IPs in the RZ/G3S SoC as well.
> >>>
> >>>>
> >>>> Would the IP need some cycles to capture the temperature accurately
> >>>> after the clock is enabled ?
> >>>
> >>> There is nothing about this mentioned about this in the HW manual of
> >>> the RZ/G3S SoC. The only points mentioned are as described in the driver code:
> >>> - wait at least 3us after each IIO channel read
> >>> - wait at least 30us after enabling the sensor
> >>> - wait at least 50us after setting OE bit in TSU_SM
> >>>
> >>> For this I chose to have it implemented as proposed.
> >>
> >> IMO, disabling/enabling the clock between two reads through the pm
> >> runtime may not be a good thing, especially if the system enters a thermal situation where it has
> to mitigate.
> >
> > Just a question, You mean to avoid device destruction due to high
> > temperature?? Assuming disabling the clk happens when the temp reaches
> > the boundary and re-enabling of the clk after a time(which involves monitoring the CLK ON bit after
> enabling it, or a run time enable failure happens), where it exceeds the threshold??
> 
> 
> Well, I have some comments with the device tree thermal configuration which may answer your question
> but I'll wait for Claudiu to check the temperature read comparison without rounding to 0.5°C
> 
> What I meant is if the temperature read is inaccurate, the mitigation will be inaccurate too. It may
> not reach the critical temperature but it is possible the performance could be impacted negatively
> under thermal stress.

Thanks for the explanation. 

I thought you meant " disabling/enabling the clock between two reads through the pm
runtime may not be a good thing" under stress/hot condition, temperature raises, and
in those corner cases if runtime PM fails, then we cannot read temperature and
we cannot take any corrective action.

Cheers,
Biju



 

^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node
  2025-01-03 16:38 ` [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node Claudiu
  2025-01-22 10:31   ` Geert Uytterhoeven
@ 2025-01-30 17:53   ` Daniel Lezcano
  1 sibling, 0 replies; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-30 17:53 UTC (permalink / raw)
  To: Claudiu, rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson
  Cc: linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea, Biju Das

On 03/01/2025 17:38, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> Add TSU node along with thermal zones and keep it enabled in the SoC DTSI.
> The temperature reported by the TSU can only be read through channel 8 of
> the ADC. Therefore, enable the ADC by default.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>   arch/arm64/boot/dts/renesas/r9a08g045.dtsi    | 43 ++++++++++++++++++-
>   .../boot/dts/renesas/rzg3s-smarc-som.dtsi     |  4 --
>   2 files changed, 42 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
> index a9b98db9ef95..fd74138198a8 100644
> --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
> @@ -205,7 +205,6 @@ adc: adc@10058000 {
>   			#address-cells = <1>;
>   			#size-cells = <0>;
>   			#io-channel-cells = <1>;
> -			status = "disabled";
>   
>   			channel@0 {
>   				reg = <0>;
> @@ -244,6 +243,17 @@ channel@8 {
>   			};
>   		};
>   
> +		tsu: thermal@10059000 {
> +			compatible = "renesas,r9a08g045-tsu";
> +			reg = <0 0x10059000 0 0x1000>;
> +			clocks = <&cpg CPG_MOD R9A08G045_TSU_PCLK>;
> +			resets = <&cpg R9A08G045_TSU_PRESETN>;
> +			power-domains = <&cpg>;
> +			#thermal-sensor-cells = <0>;
> +			io-channels = <&adc 8>;
> +			io-channel-names = "tsu";
> +		};
> +
>   		vbattb: clock-controller@1005c000 {
>   			compatible = "renesas,r9a08g045-vbattb";
>   			reg = <0 0x1005c000 0 0x1000>;
> @@ -690,6 +700,37 @@ timer {
>   				  "hyp-virt";
>   	};
>   
> +	thermal-zones {
> +		cpu_thermal: cpu-thermal {
> +			polling-delay-passive = <250>;
> +			polling-delay = <1000>;
> +			thermal-sensors = <&tsu>;
> +			sustainable-power = <423>;
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&target>;
> +					cooling-device = <&cpu0 0 2>;
> +					contribution = <1024>;
> +				};
> +			};
> +
> +			trips {
> +				sensor_crit: sensor-crit {
> +					temperature = <125000>;
> +					hysteresis = <1000>;
> +					type = "critical";
> +				};
> +
> +				target: trip-point {
> +					temperature = <100000>;
> +					hysteresis = <1000>;
> +					type = "passive";
> +				};

1. As you specified the sustainable power, the power allocator would be 
used. However, it needs an intermediate passive trip point before 
reaching the mitigation because the governor has to collect data ahead 
of the passive mitigation trip point in order to feed the PID loop. This 
trip point is not bound to any cooling device

2. The mitigation temperature is set to 100°C. The MTBF decay factor of 
the semi-conductor will be increased by more the 100x times during the 
thermal episodes stress thus reducing its lifespan considerably if it 
hits this temperature often (but I doubt with a single Cortex-A55).

3. It would make sense to add a 'hot' trip point so the user space can 
take an action to reduce the thermal pressure before reaching the 
critical temperature

4. IIUC, the CPU does not do voltage scaling but only frequency scaling, 
right ? If it is the case, then it is even more true that the mitigation 
trip point should be reduced because the frequency scaling only may not 
suffice to provide a cooling effect


> +			};
> +		};
> +	};
> +
>   	vbattb_xtal: vbattb-xtal {
>   		compatible = "fixed-clock";
>   		#clock-cells = <0>;
> diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> index ef12c1c462a7..041d256d7b79 100644
> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> @@ -102,10 +102,6 @@ x3_clk: x3-clock {
>   	};
>   };
>   
> -&adc {
> -	status = "okay";
> -};
> -
>   #if SW_CONFIG3 == SW_ON
>   &eth0 {
>   	pinctrl-0 = <&eth0_pins>;


-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog


^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 17:24           ` Daniel Lezcano
  2025-01-30 17:32             ` Claudiu Beznea
@ 2025-01-30 20:53             ` Claudiu Beznea
  2025-01-30 22:33               ` Daniel Lezcano
  1 sibling, 1 reply; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-30 20:53 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

Hi, Daniel,

On 30.01.2025 19:24, Daniel Lezcano wrote:
> On 30/01/2025 11:30, Claudiu Beznea wrote:
>>
>>
>> On 30.01.2025 12:07, Daniel Lezcano wrote:
>>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>>> Hi, Daniel,
> 
> [ ... ]
> 
>>>>> Would the IP need some cycles to capture the temperature accurately
>>>>> after the
>>>>> clock is enabled ?
>>>>
>>>> There is nothing about this mentioned about this in the HW manual of the
>>>> RZ/G3S SoC. The only points mentioned are as described in the driver code:
>>>> - wait at least 3us after each IIO channel read
>>>> - wait at least 30us after enabling the sensor
>>>> - wait at least 50us after setting OE bit in TSU_SM
>>>>
>>>> For this I chose to have it implemented as proposed.
>>>
>>> IMO, disabling/enabling the clock between two reads through the pm
>>> runtime may
>>> not be a good thing, especially if the system enters a thermal situation
>>> where
>>> it has to mitigate.
>>>
>>> Without any testing capturing the temperatures and compare between the
>>> always-on
>>> and on/off, it is hard to say if it is true or not. Up to you to test
>>> that or
>>> not. If you think it is fine, then let's go with it.
>>
>> I tested it with and w/o the runtime PM and on/off support (so, everything
>> ON from the probe) and the reported temperature values were similar.
> 
> 
> Did you remove the roundup to 0.5°C ?

I did the testing as suggested and, this time, collected results and
compared side by side. I read the temperature for 10 minutes, 60 seconds
after the Linux prompt showed up. There is, indeed, a slight difference b/w
the 2 cases.

When the runtime PM doesn't touch the clocks on read the reported
temperature varies b/w 53-54 degrees while when the runtime PM
enables/disables the clocks a single read reported 55 degrees, the rest
reported 54 degrees.

I plotted the results side by side here:
https://i2.paste.pics/f07eaeddc2ccc3c6695fe5056b52f4a2.png?trs=0a0eaab99bb59ebcb10051eb298f437c7cd50c16437a87392aebc16cd9013e18&rand=vWXm2VTrbt

Please let me know how do you consider it.

Thank you,
Claudiu

> 
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 20:53             ` Claudiu Beznea
@ 2025-01-30 22:33               ` Daniel Lezcano
  2025-01-30 23:16                 ` Claudiu Beznea
  0 siblings, 1 reply; 39+ messages in thread
From: Daniel Lezcano @ 2025-01-30 22:33 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

On 30/01/2025 21:53, Claudiu Beznea wrote:
> Hi, Daniel,
> 
> On 30.01.2025 19:24, Daniel Lezcano wrote:
>> On 30/01/2025 11:30, Claudiu Beznea wrote:
>>>
>>>
>>> On 30.01.2025 12:07, Daniel Lezcano wrote:
>>>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>>>> Hi, Daniel,
>>
>> [ ... ]
>>
>>>>>> Would the IP need some cycles to capture the temperature accurately
>>>>>> after the
>>>>>> clock is enabled ?
>>>>>
>>>>> There is nothing about this mentioned about this in the HW manual of the
>>>>> RZ/G3S SoC. The only points mentioned are as described in the driver code:
>>>>> - wait at least 3us after each IIO channel read
>>>>> - wait at least 30us after enabling the sensor
>>>>> - wait at least 50us after setting OE bit in TSU_SM
>>>>>
>>>>> For this I chose to have it implemented as proposed.
>>>>
>>>> IMO, disabling/enabling the clock between two reads through the pm
>>>> runtime may
>>>> not be a good thing, especially if the system enters a thermal situation
>>>> where
>>>> it has to mitigate.
>>>>
>>>> Without any testing capturing the temperatures and compare between the
>>>> always-on
>>>> and on/off, it is hard to say if it is true or not. Up to you to test
>>>> that or
>>>> not. If you think it is fine, then let's go with it.
>>>
>>> I tested it with and w/o the runtime PM and on/off support (so, everything
>>> ON from the probe) and the reported temperature values were similar.
>>
>>
>> Did you remove the roundup to 0.5°C ?
> 
> I did the testing as suggested and, this time, collected results and
> compared side by side. I read the temperature for 10 minutes, 60 seconds
> after the Linux prompt showed up. There is, indeed, a slight difference b/w
> the 2 cases.
> 
> When the runtime PM doesn't touch the clocks on read the reported
> temperature varies b/w 53-54 degrees while when the runtime PM
> enables/disables the clocks a single read reported 55 degrees, the rest
> reported 54 degrees.
> 
> I plotted the results side by side here:
> https://i2.paste.pics/f07eaeddc2ccc3c6695fe5056b52f4a2.png?trs=0a0eaab99bb59ebcb10051eb298f437c7cd50c16437a87392aebc16cd9013e18&rand=vWXm2VTrbt
> 
> Please let me know how do you consider it.

Thanks for taking the time to provide a figure

Testing thermal can be painful because it should be done under certain 
conditions.

I guess there was no particular work load on the system when running the 
tests.

At the first glance, it seems, without the pm runtime, the measurement 
is more precise as it catches more thermal changes. But the test does 
not give information about the thermal behavior under stress. And one 
second sampling is too long to really figure it out.

In the kernel source tree, there is a tool to read the temperature in an 
optimized manner, you may want to use it to read the temperature at a 
higher rate. It is located in tools/thermal/thermometer

Compiling is a bit fuzzy ATM, so until it is fixed, here are the steps:

(you should install libconfig-dev and libnl-3-dev packages).

cd $LINUX_DIR/tools/thermal/lib
make
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$LINUX_DIR/tools/thermal/lib

cd $LINUX_DIR/tools
make thermometer



Then change directory:

cd $LINUX_DIR/tools/thermal/thermometer


Run the tool:

./thermometer -o out -c t.conf -l DEBUG -- <my_command>


The content of the configuration file t.conf is:

thermal-zones = (
	      {	name = "cpu[0_9].*-thermal";
		polling = 100; }
       )

All the captured data will be in the 'out' directory

For 'my_command', I suggest to use a script containing:

sleep 10; dhrystone -t 1 -r 120; sleep 10

If you need the dhrystone binary, let me know.

The thermal zone device tree configuration should be changed to use a 
65°C passive trip point instead of 100°C (and the kernel setup with the 
step wise governor as default).

The resulting figure from the temperature should show a flat temperature 
figure during 10 seconds, then the temperature increasing until reaching 
the temperature threshold of 65°C, the temperature stabilizing around 
it, then followed by a temperature decreasing when the test finishes.

If the temperature does not reach the limit, decrease the trip point 
temperature or increase the dhrystone duration (the -r 120 option)

At this point, you should the test with and without pm runtime but in 
order to have consistent results, you should wait ~20 minutes between 
two tests.

The shape of the figures will give the immediate information about how 
the mitigation vs thermal sensor vs cooling device behave.

Additionally, you can enable the thermal DEBUGFS option and add the 
collected information statistics from /sys/kernel/debug/thermal/*** in 
the results.


Hope that helps






-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 22:33               ` Daniel Lezcano
@ 2025-01-30 23:16                 ` Claudiu Beznea
  2025-02-03 16:30                   ` Claudiu Beznea
  0 siblings, 1 reply; 39+ messages in thread
From: Claudiu Beznea @ 2025-01-30 23:16 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

Hi, Daniel,

On 31.01.2025 00:33, Daniel Lezcano wrote:
> On 30/01/2025 21:53, Claudiu Beznea wrote:
>> Hi, Daniel,
>>
>> On 30.01.2025 19:24, Daniel Lezcano wrote:
>>> On 30/01/2025 11:30, Claudiu Beznea wrote:
>>>>
>>>>
>>>> On 30.01.2025 12:07, Daniel Lezcano wrote:
>>>>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>>>>> Hi, Daniel,
>>>
>>> [ ... ]
>>>
>>>>>>> Would the IP need some cycles to capture the temperature accurately
>>>>>>> after the
>>>>>>> clock is enabled ?
>>>>>>
>>>>>> There is nothing about this mentioned about this in the HW manual of the
>>>>>> RZ/G3S SoC. The only points mentioned are as described in the driver
>>>>>> code:
>>>>>> - wait at least 3us after each IIO channel read
>>>>>> - wait at least 30us after enabling the sensor
>>>>>> - wait at least 50us after setting OE bit in TSU_SM
>>>>>>
>>>>>> For this I chose to have it implemented as proposed.
>>>>>
>>>>> IMO, disabling/enabling the clock between two reads through the pm
>>>>> runtime may
>>>>> not be a good thing, especially if the system enters a thermal situation
>>>>> where
>>>>> it has to mitigate.
>>>>>
>>>>> Without any testing capturing the temperatures and compare between the
>>>>> always-on
>>>>> and on/off, it is hard to say if it is true or not. Up to you to test
>>>>> that or
>>>>> not. If you think it is fine, then let's go with it.
>>>>
>>>> I tested it with and w/o the runtime PM and on/off support (so, everything
>>>> ON from the probe) and the reported temperature values were similar.
>>>
>>>
>>> Did you remove the roundup to 0.5°C ?
>>
>> I did the testing as suggested and, this time, collected results and
>> compared side by side. I read the temperature for 10 minutes, 60 seconds
>> after the Linux prompt showed up. There is, indeed, a slight difference b/w
>> the 2 cases.
>>
>> When the runtime PM doesn't touch the clocks on read the reported
>> temperature varies b/w 53-54 degrees while when the runtime PM
>> enables/disables the clocks a single read reported 55 degrees, the rest
>> reported 54 degrees.
>>
>> I plotted the results side by side here:
>> https://i2.paste.pics/f07eaeddc2ccc3c6695fe5056b52f4a2.png?
>> trs=0a0eaab99bb59ebcb10051eb298f437c7cd50c16437a87392aebc16cd9013e18&rand=vWXm2VTrbt
>>
>> Please let me know how do you consider it.
> 

After sending this to you I figured it out that precision is lost somewhere
so I re-tested it with the following diff (multiplied parts of the equation
with 1000):

diff --git a/drivers/thermal/renesas/rzg3s_thermal.c
b/drivers/thermal/renesas/rzg3s_thermal.c
index 6719f9ca05eb..84e18ff69d7c 100644
--- a/drivers/thermal/renesas/rzg3s_thermal.c
+++ b/drivers/thermal/renesas/rzg3s_thermal.c
@@ -83,7 +83,7 @@ static int rzg3s_thermal_get_temp(struct
thermal_zone_device *tz, int *temp)
        }

        ret = 0;
-       ts_code_ave = DIV_ROUND_CLOSEST(ts_code_ave, TSU_READ_STEPS);
+       ts_code_ave = DIV_ROUND_CLOSEST(MCELSIUS(ts_code_ave), TSU_READ_STEPS);

        /*
         * According to the HW manual (section 40.4.4 Procedure for
Measuring the Temperature)
@@ -91,11 +91,8 @@ static int rzg3s_thermal_get_temp(struct
thermal_zone_device *tz, int *temp)
         *
         * Tj = (ts_code_ave - priv->calib0) * 165 / (priv->calib0 -
priv->calib1) - 40
         */
-       *temp = DIV_ROUND_CLOSEST((ts_code_ave - priv->calib1) * 165,
-                                 (priv->calib0 - priv->calib1)) - 40;
-
-       /* Report it in mili degrees Celsius and round it up to 0.5 degrees
Celsius. */
-       *temp = roundup(MCELSIUS(*temp), 500);
+       *temp = DIV_ROUND_CLOSEST((u64)(ts_code_ave -
MCELSIUS(priv->calib1)) * MCELSIUS(165),
+                                 MCELSIUS(priv->calib0 - priv->calib1)) -
MCELSIUS(40);

 rpm_put:
        pm_runtime_mark_last_busy(dev);

With this, the results seems similar b/w runtime PM and no runtime PM cases.

The tests were executed after the board was off for few hours. The
first test was with runtime PM suspend/resume on each read. Then the board
was rebooted and re-run the test w/o runtime PM suspend/resume on reads.

Figure with results is here:
https://i2.paste.pics/5f353a4f04b07b4bead3086624aba23f.png?trs=0a0eaab99bb59ebcb10051eb298f437c7cd50c16437a87392aebc16cd9013e18&rand=5n34QNjWID


> Thanks for taking the time to provide a figure
> 
> Testing thermal can be painful because it should be done under certain
> conditions.
> 
> I guess there was no particular work load on the system when running the
> tests.

No load, indeed.

> 
> At the first glance, it seems, without the pm runtime, the measurement is
> more precise as it catches more thermal changes. But the test does not give
> information about the thermal behavior under stress. And one second
> sampling is too long to really figure it out.
> 
> In the kernel source tree, there is a tool to read the temperature in an
> optimized manner, you may want to use it to read the temperature at a
> higher rate. It is located in tools/thermal/thermometer
> 
> Compiling is a bit fuzzy ATM, so until it is fixed, here are the steps:
> 
> (you should install libconfig-dev and libnl-3-dev packages).
> 
> cd $LINUX_DIR/tools/thermal/lib
> make
> LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$LINUX_DIR/tools/thermal/lib
> 
> cd $LINUX_DIR/tools
> make thermometer
> 
> 
> 
> Then change directory:
> 
> cd $LINUX_DIR/tools/thermal/thermometer
> 
> 
> Run the tool:
> 
> ./thermometer -o out -c t.conf -l DEBUG -- <my_command>
> 
> 
> The content of the configuration file t.conf is:
> 
> thermal-zones = (
>           {    name = "cpu[0_9].*-thermal";
>         polling = 100; }
>       )
> 
> All the captured data will be in the 'out' directory
> 
> For 'my_command', I suggest to use a script containing:
> 
> sleep 10; dhrystone -t 1 -r 120; sleep 10
> 
> If you need the dhrystone binary, let me know.
> 
> The thermal zone device tree configuration should be changed to use a 65°C
> passive trip point instead of 100°C (and the kernel setup with the step
> wise governor as default).
> 
> The resulting figure from the temperature should show a flat temperature
> figure during 10 seconds, then the temperature increasing until reaching
> the temperature threshold of 65°C, the temperature stabilizing around it,
> then followed by a temperature decreasing when the test finishes.
> 
> If the temperature does not reach the limit, decrease the trip point
> temperature or increase the dhrystone duration (the -r 120 option)
> 
> At this point, you should the test with and without pm runtime but in order
> to have consistent results, you should wait ~20 minutes between two tests.
> 
> The shape of the figures will give the immediate information about how the
> mitigation vs thermal sensor vs cooling device behave.
> 
> Additionally, you can enable the thermal DEBUGFS option and add the
> collected information statistics from /sys/kernel/debug/thermal/*** in the
> results.
> 
> 
> Hope that helps

Thank you for all these details. I'll have a look on it but starting with
Monday as I won't have access to setup in the following days.

Thank you,
Claudiu

> 
> 
> 
> 
> 
> 



^ permalink raw reply related	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-30 23:16                 ` Claudiu Beznea
@ 2025-02-03 16:30                   ` Claudiu Beznea
  0 siblings, 0 replies; 39+ messages in thread
From: Claudiu Beznea @ 2025-02-03 16:30 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: rafael, rui.zhang, lukasz.luba, robh, krzk+dt, conor+dt,
	geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	ulf.hansson, linux-pm, devicetree, linux-kernel,
	linux-renesas-soc, linux-arm-kernel, linux-clk, Claudiu Beznea

Hi, Daniel,

On 31.01.2025 01:16, Claudiu Beznea wrote:
> Hi, Daniel,
> 
> On 31.01.2025 00:33, Daniel Lezcano wrote:
>> On 30/01/2025 21:53, Claudiu Beznea wrote:
>>> Hi, Daniel,
>>>
>>> On 30.01.2025 19:24, Daniel Lezcano wrote:
>>>> On 30/01/2025 11:30, Claudiu Beznea wrote:
>>>>>
>>>>>
>>>>> On 30.01.2025 12:07, Daniel Lezcano wrote:
>>>>>> On Thu, Jan 30, 2025 at 11:08:03AM +0200, Claudiu Beznea wrote:
>>>>>>> Hi, Daniel,
>>>>
>>>> [ ... ]
>>>>
>>>>>>>> Would the IP need some cycles to capture the temperature accurately
>>>>>>>> after the
>>>>>>>> clock is enabled ?
>>>>>>>
>>>>>>> There is nothing about this mentioned about this in the HW manual of the
>>>>>>> RZ/G3S SoC. The only points mentioned are as described in the driver
>>>>>>> code:
>>>>>>> - wait at least 3us after each IIO channel read
>>>>>>> - wait at least 30us after enabling the sensor
>>>>>>> - wait at least 50us after setting OE bit in TSU_SM
>>>>>>>
>>>>>>> For this I chose to have it implemented as proposed.
>>>>>>
>>>>>> IMO, disabling/enabling the clock between two reads through the pm
>>>>>> runtime may
>>>>>> not be a good thing, especially if the system enters a thermal situation
>>>>>> where
>>>>>> it has to mitigate.
>>>>>>
>>>>>> Without any testing capturing the temperatures and compare between the
>>>>>> always-on
>>>>>> and on/off, it is hard to say if it is true or not. Up to you to test
>>>>>> that or
>>>>>> not. If you think it is fine, then let's go with it.
>>>>>
>>>>> I tested it with and w/o the runtime PM and on/off support (so, everything
>>>>> ON from the probe) and the reported temperature values were similar.
>>>>
>>>>
>>>> Did you remove the roundup to 0.5°C ?
>>>
>>> I did the testing as suggested and, this time, collected results and
>>> compared side by side. I read the temperature for 10 minutes, 60 seconds
>>> after the Linux prompt showed up. There is, indeed, a slight difference b/w
>>> the 2 cases.
>>>
>>> When the runtime PM doesn't touch the clocks on read the reported
>>> temperature varies b/w 53-54 degrees while when the runtime PM
>>> enables/disables the clocks a single read reported 55 degrees, the rest
>>> reported 54 degrees.
>>>
>>> I plotted the results side by side here:
>>> https://i2.paste.pics/f07eaeddc2ccc3c6695fe5056b52f4a2.png?
>>> trs=0a0eaab99bb59ebcb10051eb298f437c7cd50c16437a87392aebc16cd9013e18&rand=vWXm2VTrbt
>>>
>>> Please let me know how do you consider it.
>>
> 
> After sending this to you I figured it out that precision is lost somewhere
> so I re-tested it with the following diff (multiplied parts of the equation
> with 1000):
> 
> diff --git a/drivers/thermal/renesas/rzg3s_thermal.c
> b/drivers/thermal/renesas/rzg3s_thermal.c
> index 6719f9ca05eb..84e18ff69d7c 100644
> --- a/drivers/thermal/renesas/rzg3s_thermal.c
> +++ b/drivers/thermal/renesas/rzg3s_thermal.c
> @@ -83,7 +83,7 @@ static int rzg3s_thermal_get_temp(struct
> thermal_zone_device *tz, int *temp)
>         }
> 
>         ret = 0;
> -       ts_code_ave = DIV_ROUND_CLOSEST(ts_code_ave, TSU_READ_STEPS);
> +       ts_code_ave = DIV_ROUND_CLOSEST(MCELSIUS(ts_code_ave), TSU_READ_STEPS);
> 
>         /*
>          * According to the HW manual (section 40.4.4 Procedure for
> Measuring the Temperature)
> @@ -91,11 +91,8 @@ static int rzg3s_thermal_get_temp(struct
> thermal_zone_device *tz, int *temp)
>          *
>          * Tj = (ts_code_ave - priv->calib0) * 165 / (priv->calib0 -
> priv->calib1) - 40
>          */
> -       *temp = DIV_ROUND_CLOSEST((ts_code_ave - priv->calib1) * 165,
> -                                 (priv->calib0 - priv->calib1)) - 40;
> -
> -       /* Report it in mili degrees Celsius and round it up to 0.5 degrees
> Celsius. */
> -       *temp = roundup(MCELSIUS(*temp), 500);
> +       *temp = DIV_ROUND_CLOSEST((u64)(ts_code_ave -
> MCELSIUS(priv->calib1)) * MCELSIUS(165),
> +                                 MCELSIUS(priv->calib0 - priv->calib1)) -
> MCELSIUS(40);
> 
>  rpm_put:
>         pm_runtime_mark_last_busy(dev);
> 
> With this, the results seems similar b/w runtime PM and no runtime PM cases.
> 
> The tests were executed after the board was off for few hours. The
> first test was with runtime PM suspend/resume on each read. Then the board
> was rebooted and re-run the test w/o runtime PM suspend/resume on reads.
> 
> Figure with results is here:
> https://i2.paste.pics/5f353a4f04b07b4bead3086624aba23f.png?trs=0a0eaab99bb59ebcb10051eb298f437c7cd50c16437a87392aebc16cd9013e18&rand=5n34QNjWID
> 
> 
>> Thanks for taking the time to provide a figure
>>
>> Testing thermal can be painful because it should be done under certain
>> conditions.
>>
>> I guess there was no particular work load on the system when running the
>> tests.
> 
> No load, indeed.
> 
>>
>> At the first glance, it seems, without the pm runtime, the measurement is
>> more precise as it catches more thermal changes. But the test does not give
>> information about the thermal behavior under stress. And one second
>> sampling is too long to really figure it out.
>>
>> In the kernel source tree, there is a tool to read the temperature in an
>> optimized manner, you may want to use it to read the temperature at a
>> higher rate. It is located in tools/thermal/thermometer
>>
>> Compiling is a bit fuzzy ATM, so until it is fixed, here are the steps:
>>
>> (you should install libconfig-dev and libnl-3-dev packages).
>>
>> cd $LINUX_DIR/tools/thermal/lib
>> make
>> LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$LINUX_DIR/tools/thermal/lib
>>
>> cd $LINUX_DIR/tools
>> make thermometer
>>
>>
>>
>> Then change directory:
>>
>> cd $LINUX_DIR/tools/thermal/thermometer
>>
>>
>> Run the tool:
>>
>> ./thermometer -o out -c t.conf -l DEBUG -- <my_command>
>>
>>
>> The content of the configuration file t.conf is:
>>
>> thermal-zones = (
>>           {    name = "cpu[0_9].*-thermal";
>>         polling = 100; }
>>       )
>>
>> All the captured data will be in the 'out' directory
>>
>> For 'my_command', I suggest to use a script containing:
>>
>> sleep 10; dhrystone -t 1 -r 120; sleep 10
>>
>> If you need the dhrystone binary, let me know.
>>
>> The thermal zone device tree configuration should be changed to use a 65°C
>> passive trip point instead of 100°C (and the kernel setup with the step
>> wise governor as default).
>>>> The resulting figure from the temperature should show a flat temperature
>> figure during 10 seconds, then the temperature increasing until reaching
>> the temperature threshold of 65°C, the temperature stabilizing around it,
>> then followed by a temperature decreasing when the test finishes.
>>
>> If the temperature does not reach the limit, decrease the trip point
>> temperature or increase the dhrystone duration (the -r 120 option)
>>
>> At this point, you should the test with and without pm runtime but in order
>> to have consistent results, you should wait ~20 minutes between two tests.
>>
>> The shape of the figures will give the immediate information about how the
>> mitigation vs thermal sensor vs cooling device behave.
>>
>> Additionally, you can enable the thermal DEBUGFS option and add the
>> collected information statistics from /sys/kernel/debug/thermal/*** in the
>> results.
>>
>>
>> Hope that helps
> 
> Thank you for all these details. I'll have a look on it but starting with
> Monday as I won't have access to setup in the following days.

I re-run the tests with the thermometer application that you indicated.

This is the conf I used:

thermal-zones = (
          {    name = "cpu-thermal";
        polling = 100; }
      )

The used device tree is as follows:

	thermal-zones {
		cpu_thermal: cpu-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;
			thermal-sensors = <&tsu>;
			sustainable-power = <423>;

			cooling-maps {
				map0 {
					trip = <&target>;
					cooling-device = <&cpu0 0 2>;
					contribution = <1024>;
				};
			};

			trips {
				sensor_crit: sensor-crit {
					temperature = <125000>;
					hysteresis = <1000>;
					type = "critical";
				};

				target: trip-point {
					temperature = <56000>;
					hysteresis = <1000>;
					type = "passive";
				};
			};
		};
	};

I executed with:

time ./thermometer -o out -l DEBUG -c t.conf -- ./test.sh

where test.sh is:

sleep 10; time echo 100000000 | dhry; sleep 10

My dhry has no -t or -r option so I passed the number of runs checking that
the test executes for 120 seconds.

I executed first the thermometer application with runtime PM suspend/resume
on temperature read, then wait for ~25 minutes then executed the tests w/o
runtime PM suspend/resume on temperature read.

The output of the thermometer application is as follows:

- runtime PM suspend/resume when reading: https://p.fr33tux.org/5bbb4d
- no runtime PM suspend/resumes when reading: https://p.fr33tux.org/c9a7cf
- full console log while testing: https://p.fr33tux.org/ace3a6

I also plotted the results for visual comparison as follows:

1/ RPM + no-RPM (continuous time base):
https://i2.paste.pics/c3956d15a7a889a9e1ee5b60529b42f6.png?rand=axUi4IsA1C

2/ RPM + no-RPM (first samples, for side by side comparison):
https://i2.paste.pics/e2a30af590e28a091415e3afb74eb0ac.png?rand=XQhoxUe1EM

3/ RPM only:
https://i2.paste.pics/977d4de070b8e2a19694ae2b4ba3c5fc.png?rand=IfZOkonRd9

4/ no-RPM only:
https://i2.paste.pics/5d6e3d0a124e5e4b3b8b397d7b5b057c.png?rand=UaigrMRNvy

Please let me know how your input.

Thank you,
Claudiu


> 
> Thank you,
> Claudiu
> 
>>
>>
>>
>>
>>
>>
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-01-15 15:42     ` Ulf Hansson
@ 2025-02-04 14:33       ` Jonathan Cameron
  2025-02-05  8:33         ` Claudiu Beznea
  0 siblings, 1 reply; 39+ messages in thread
From: Jonathan Cameron @ 2025-02-04 14:33 UTC (permalink / raw)
  To: Ulf Hansson
  Cc: Daniel Lezcano, Claudiu, rafael, rui.zhang, lukasz.luba, robh,
	krzk+dt, conor+dt, geert+renesas, magnus.damm, mturquette, sboyd,
	p.zabel, linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

On Wed, 15 Jan 2025 16:42:37 +0100
Ulf Hansson <ulf.hansson@linaro.org> wrote:

> On Thu, 9 Jan 2025 at 18:34, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
> >
> >
> > Ulf,
> >
> > can you have a look at this particular patch please ?
> >
> > Perhaps this scenario already happened in the past and there is an
> > alternative to fix it instead of this proposed change  
> 
> I think the patch makes sense.
> 
> If there is a PM domain that is attached to the device that is
> managing the clocks for the thermal zone, the detach procedure
> certainly needs to be well controlled/synchronized.
> 
Does this boil down to the same issue as
https://lore.kernel.org/linux-iio/20250128105908.0000353b@huawei.com/
?

Just to point out there is another way like is done in i2c:
https://elixir.bootlin.com/linux/v6.12.6/source/drivers/i2c/i2c-core-base.c#L630

Register a devres_release_group() in bus probe() and release it before
the dev_pm_domain_detach() call.  That keeps the detach procedure well
controlled and synchronized as it is entirely in control of the driver.

That IIO thread has kind of died out for now though with no resolution
so far.

Jonathan


> >
> >
> > On 03/01/2025 17:38, Claudiu wrote:  
> > > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> > >
> > > On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
> > > clocks are managed through PM domains. These PM domains, registered on
> > > behalf of the clock controller driver, are configured with
> > > GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
> > > clocks are enabled/disabled using runtime PM APIs.
> > >
> > > During probe, devices are attached to the PM domain controlling their
> > > clocks. Similarly, during removal, devices are detached from the PM domain.
> > >
> > > The detachment call stack is as follows:
> > >
> > > device_driver_detach() ->
> > >    device_release_driver_internal() ->
> > >      __device_release_driver() ->
> > >        device_remove() ->
> > >          platform_remove() ->
> > >         dev_pm_domain_detach()
> > >
> > > In the upcoming Renesas RZ/G3S thermal driver, the
> > > struct thermal_zone_device_ops::change_mode API is implemented to
> > > start/stop the thermal sensor unit. Register settings are updated within
> > > the change_mode API.
> > >
> > > In case devres helpers are used for thermal zone register/unregister the
> > > struct thermal_zone_device_ops::change_mode API is invoked when the
> > > driver is unbound. The identified call stack is as follows:
> > >
> > > device_driver_detach() ->
> > >    device_release_driver_internal() ->
> > >      device_unbind_cleanup() ->
> > >        devres_release_all() ->
> > >          devm_thermal_of_zone_release() ->
> > >         thermal_zone_device_disable() ->
> > >           thermal_zone_device_set_mode() ->
> > >             rzg3s_thermal_change_mode()
> > >
> > > The device_unbind_cleanup() function is called after the thermal device is
> > > detached from the PM domain (via dev_pm_domain_detach()).
> > >
> > > The rzg3s_thermal_change_mode() implementation calls
> > > pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
> > > accessing the registers. However, during the unbind scenario, the
> > > devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> > > Consequently, the clocks are not enabled, as the device is removed from
> > > the PM domain at this time, leading to an Asynchronous SError Interrupt.
> > > The system cannot be used after this.
> > >
> > > Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
> > > be used in the upcomming RZ/G3S thermal driver.
> > >
> > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>  
> 
> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
> 
> Kind regards
> Uffe
> 
> > > ---
> > >   drivers/thermal/thermal_of.c |  8 +++++---
> > >   include/linux/thermal.h      | 14 ++++++++++++++
> > >   2 files changed, 19 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c
> > > index fab11b98ca49..8fc35d20db60 100644
> > > --- a/drivers/thermal/thermal_of.c
> > > +++ b/drivers/thermal/thermal_of.c
> > > @@ -329,11 +329,12 @@ static bool thermal_of_should_bind(struct thermal_zone_device *tz,
> > >    *
> > >    * @tz: a pointer to the thermal zone structure
> > >    */
> > > -static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> > > +void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> > >   {
> > >       thermal_zone_device_disable(tz);
> > >       thermal_zone_device_unregister(tz);
> > >   }
> > > +EXPORT_SYMBOL_GPL(thermal_of_zone_unregister);
> > >
> > >   /**
> > >    * thermal_of_zone_register - Register a thermal zone with device node
> > > @@ -355,8 +356,8 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> > >    *  - ENOMEM: if one structure can not be allocated
> > >    *  - Other negative errors are returned by the underlying called functions
> > >    */
> > > -static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > > -                                                         const struct thermal_zone_device_ops *ops)
> > > +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > > +                                                  const struct thermal_zone_device_ops *ops)
> > >   {
> > >       struct thermal_zone_device_ops of_ops = *ops;
> > >       struct thermal_zone_device *tz;
> > > @@ -429,6 +430,7 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node *
> > >
> > >       return ERR_PTR(ret);
> > >   }
> > > +EXPORT_SYMBOL_GPL(thermal_of_zone_register);
> > >
> > >   static void devm_thermal_of_zone_release(struct device *dev, void *res)
> > >   {
> > > diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> > > index 69f9bedd0ee8..adbb4092a064 100644
> > > --- a/include/linux/thermal.h
> > > +++ b/include/linux/thermal.h
> > > @@ -195,13 +195,23 @@ struct thermal_zone_params {
> > >
> > >   /* Function declarations */
> > >   #ifdef CONFIG_THERMAL_OF
> > > +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > > +                                                  const struct thermal_zone_device_ops *ops);
> > >   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
> > >                                                         const struct thermal_zone_device_ops *ops);
> > >
> > > +void thermal_of_zone_unregister(struct thermal_zone_device *tz);
> > >   void devm_thermal_of_zone_unregister(struct device *dev, struct thermal_zone_device *tz);
> > >
> > >   #else
> > >
> > > +static inline
> > > +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> > > +                                                  const struct thermal_zone_device_ops *ops)
> > > +{
> > > +     return ERR_PTR(-ENOTSUPP);
> > > +}
> > > +
> > >   static inline
> > >   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
> > >                                                         const struct thermal_zone_device_ops *ops)
> > > @@ -209,6 +219,10 @@ struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, in
> > >       return ERR_PTR(-ENOTSUPP);
> > >   }
> > >
> > > +static inline void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> > > +{
> > > +}
> > > +
> > >   static inline void devm_thermal_of_zone_unregister(struct device *dev,
> > >                                                  struct thermal_zone_device *tz)
> > >   {  
> >
> >
> > --
> > <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
> >
> > Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
> > <http://twitter.com/#!/linaroorg> Twitter |
> > <http://www.linaro.org/linaro-blog/> Blog  
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-02-04 14:33       ` Jonathan Cameron
@ 2025-02-05  8:33         ` Claudiu Beznea
  2025-02-05 11:39           ` Jonathan Cameron
  0 siblings, 1 reply; 39+ messages in thread
From: Claudiu Beznea @ 2025-02-05  8:33 UTC (permalink / raw)
  To: Jonathan Cameron, Ulf Hansson
  Cc: Daniel Lezcano, rafael, rui.zhang, lukasz.luba, robh, krzk+dt,
	conor+dt, geert+renesas, magnus.damm, mturquette, sboyd, p.zabel,
	linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

Hi, Jonathan,

On 04.02.2025 16:33, Jonathan Cameron wrote:
> On Wed, 15 Jan 2025 16:42:37 +0100
> Ulf Hansson <ulf.hansson@linaro.org> wrote:
> 
>> On Thu, 9 Jan 2025 at 18:34, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>>>
>>>
>>> Ulf,
>>>
>>> can you have a look at this particular patch please ?
>>>
>>> Perhaps this scenario already happened in the past and there is an
>>> alternative to fix it instead of this proposed change  
>>
>> I think the patch makes sense.
>>
>> If there is a PM domain that is attached to the device that is
>> managing the clocks for the thermal zone, the detach procedure
>> certainly needs to be well controlled/synchronized.
>>
> Does this boil down to the same issue as
> https://lore.kernel.org/linux-iio/20250128105908.0000353b@huawei.com/
> ?

Yes, as described in the cover letter.

> 
> Just to point out there is another way like is done in i2c:
> https://elixir.bootlin.com/linux/v6.12.6/source/drivers/i2c/i2c-core-base.c#L630
> 
> Register a devres_release_group() in bus probe() and release it before
> the dev_pm_domain_detach() call.  That keeps the detach procedure well
> controlled and synchronized as it is entirely in control of the driver.

From the IIO thread I got that Ulf doesn't consider it a good approach for
all the cases.

Thank you,
Claudiu

> 
> That IIO thread has kind of died out for now though with no resolution
> so far.
> 
> Jonathan
> 
> 
>>>
>>>
>>> On 03/01/2025 17:38, Claudiu wrote:  
>>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>>
>>>> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
>>>> clocks are managed through PM domains. These PM domains, registered on
>>>> behalf of the clock controller driver, are configured with
>>>> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
>>>> clocks are enabled/disabled using runtime PM APIs.
>>>>
>>>> During probe, devices are attached to the PM domain controlling their
>>>> clocks. Similarly, during removal, devices are detached from the PM domain.
>>>>
>>>> The detachment call stack is as follows:
>>>>
>>>> device_driver_detach() ->
>>>>    device_release_driver_internal() ->
>>>>      __device_release_driver() ->
>>>>        device_remove() ->
>>>>          platform_remove() ->
>>>>         dev_pm_domain_detach()
>>>>
>>>> In the upcoming Renesas RZ/G3S thermal driver, the
>>>> struct thermal_zone_device_ops::change_mode API is implemented to
>>>> start/stop the thermal sensor unit. Register settings are updated within
>>>> the change_mode API.
>>>>
>>>> In case devres helpers are used for thermal zone register/unregister the
>>>> struct thermal_zone_device_ops::change_mode API is invoked when the
>>>> driver is unbound. The identified call stack is as follows:
>>>>
>>>> device_driver_detach() ->
>>>>    device_release_driver_internal() ->
>>>>      device_unbind_cleanup() ->
>>>>        devres_release_all() ->
>>>>          devm_thermal_of_zone_release() ->
>>>>         thermal_zone_device_disable() ->
>>>>           thermal_zone_device_set_mode() ->
>>>>             rzg3s_thermal_change_mode()
>>>>
>>>> The device_unbind_cleanup() function is called after the thermal device is
>>>> detached from the PM domain (via dev_pm_domain_detach()).
>>>>
>>>> The rzg3s_thermal_change_mode() implementation calls
>>>> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
>>>> accessing the registers. However, during the unbind scenario, the
>>>> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
>>>> Consequently, the clocks are not enabled, as the device is removed from
>>>> the PM domain at this time, leading to an Asynchronous SError Interrupt.
>>>> The system cannot be used after this.
>>>>
>>>> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
>>>> be used in the upcomming RZ/G3S thermal driver.
>>>>
>>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>  
>>
>> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
>>
>> Kind regards
>> Uffe
>>
>>>> ---
>>>>   drivers/thermal/thermal_of.c |  8 +++++---
>>>>   include/linux/thermal.h      | 14 ++++++++++++++
>>>>   2 files changed, 19 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c
>>>> index fab11b98ca49..8fc35d20db60 100644
>>>> --- a/drivers/thermal/thermal_of.c
>>>> +++ b/drivers/thermal/thermal_of.c
>>>> @@ -329,11 +329,12 @@ static bool thermal_of_should_bind(struct thermal_zone_device *tz,
>>>>    *
>>>>    * @tz: a pointer to the thermal zone structure
>>>>    */
>>>> -static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
>>>> +void thermal_of_zone_unregister(struct thermal_zone_device *tz)
>>>>   {
>>>>       thermal_zone_device_disable(tz);
>>>>       thermal_zone_device_unregister(tz);
>>>>   }
>>>> +EXPORT_SYMBOL_GPL(thermal_of_zone_unregister);
>>>>
>>>>   /**
>>>>    * thermal_of_zone_register - Register a thermal zone with device node
>>>> @@ -355,8 +356,8 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
>>>>    *  - ENOMEM: if one structure can not be allocated
>>>>    *  - Other negative errors are returned by the underlying called functions
>>>>    */
>>>> -static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
>>>> -                                                         const struct thermal_zone_device_ops *ops)
>>>> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
>>>> +                                                  const struct thermal_zone_device_ops *ops)
>>>>   {
>>>>       struct thermal_zone_device_ops of_ops = *ops;
>>>>       struct thermal_zone_device *tz;
>>>> @@ -429,6 +430,7 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node *
>>>>
>>>>       return ERR_PTR(ret);
>>>>   }
>>>> +EXPORT_SYMBOL_GPL(thermal_of_zone_register);
>>>>
>>>>   static void devm_thermal_of_zone_release(struct device *dev, void *res)
>>>>   {
>>>> diff --git a/include/linux/thermal.h b/include/linux/thermal.h
>>>> index 69f9bedd0ee8..adbb4092a064 100644
>>>> --- a/include/linux/thermal.h
>>>> +++ b/include/linux/thermal.h
>>>> @@ -195,13 +195,23 @@ struct thermal_zone_params {
>>>>
>>>>   /* Function declarations */
>>>>   #ifdef CONFIG_THERMAL_OF
>>>> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
>>>> +                                                  const struct thermal_zone_device_ops *ops);
>>>>   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
>>>>                                                         const struct thermal_zone_device_ops *ops);
>>>>
>>>> +void thermal_of_zone_unregister(struct thermal_zone_device *tz);
>>>>   void devm_thermal_of_zone_unregister(struct device *dev, struct thermal_zone_device *tz);
>>>>
>>>>   #else
>>>>
>>>> +static inline
>>>> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
>>>> +                                                  const struct thermal_zone_device_ops *ops)
>>>> +{
>>>> +     return ERR_PTR(-ENOTSUPP);
>>>> +}
>>>> +
>>>>   static inline
>>>>   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
>>>>                                                         const struct thermal_zone_device_ops *ops)
>>>> @@ -209,6 +219,10 @@ struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, in
>>>>       return ERR_PTR(-ENOTSUPP);
>>>>   }
>>>>
>>>> +static inline void thermal_of_zone_unregister(struct thermal_zone_device *tz)
>>>> +{
>>>> +}
>>>> +
>>>>   static inline void devm_thermal_of_zone_unregister(struct device *dev,
>>>>                                                  struct thermal_zone_device *tz)
>>>>   {  
>>>
>>>
>>> --
>>> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>>>
>>> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
>>> <http://twitter.com/#!/linaroorg> Twitter |
>>> <http://www.linaro.org/linaro-blog/> Blog  
>>
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

* Re: [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone
  2025-02-05  8:33         ` Claudiu Beznea
@ 2025-02-05 11:39           ` Jonathan Cameron
  0 siblings, 0 replies; 39+ messages in thread
From: Jonathan Cameron @ 2025-02-05 11:39 UTC (permalink / raw)
  To: Claudiu Beznea
  Cc: Ulf Hansson, Daniel Lezcano, rafael, rui.zhang, lukasz.luba, robh,
	krzk+dt, conor+dt, geert+renesas, magnus.damm, mturquette, sboyd,
	p.zabel, linux-pm, devicetree, linux-kernel, linux-renesas-soc,
	linux-arm-kernel, linux-clk, Claudiu Beznea

On Wed, 5 Feb 2025 10:33:39 +0200
Claudiu Beznea <claudiu.beznea@tuxon.dev> wrote:

> Hi, Jonathan,
> 
> On 04.02.2025 16:33, Jonathan Cameron wrote:
> > On Wed, 15 Jan 2025 16:42:37 +0100
> > Ulf Hansson <ulf.hansson@linaro.org> wrote:
> >   
> >> On Thu, 9 Jan 2025 at 18:34, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:  
> >>>
> >>>
> >>> Ulf,
> >>>
> >>> can you have a look at this particular patch please ?
> >>>
> >>> Perhaps this scenario already happened in the past and there is an
> >>> alternative to fix it instead of this proposed change    
> >>
> >> I think the patch makes sense.
> >>
> >> If there is a PM domain that is attached to the device that is
> >> managing the clocks for the thermal zone, the detach procedure
> >> certainly needs to be well controlled/synchronized.
> >>  
> > Does this boil down to the same issue as
> > https://lore.kernel.org/linux-iio/20250128105908.0000353b@huawei.com/
> > ?  
> 
> Yes, as described in the cover letter.
> 
> > 
> > Just to point out there is another way like is done in i2c:
> > https://elixir.bootlin.com/linux/v6.12.6/source/drivers/i2c/i2c-core-base.c#L630
> > 
> > Register a devres_release_group() in bus probe() and release it before
> > the dev_pm_domain_detach() call.  That keeps the detach procedure well
> > controlled and synchronized as it is entirely in control of the driver.  
> 
> From the IIO thread I got that Ulf doesn't consider it a good approach for
> all the cases.
> 

Maybe true (I'll let Ulf comment!) and I think the solution proposed here is
not great because it is putting the cost on every driver rather than solving
the basic problem in one place (and there is clear precedence in other
bus subsystems). Ideally I'd like more people to get involved in that discussion.

Jonathan



> Thank you,
> Claudiu
> 
> > 
> > That IIO thread has kind of died out for now though with no resolution
> > so far.
> > 
> > Jonathan
> > 
> >   
> >>>
> >>>
> >>> On 03/01/2025 17:38, Claudiu wrote:    
> >>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>>>
> >>>> On the Renesas RZ/G3S (and other Renesas SoCs, e.g., RZ/G2{L, LC, UL}),
> >>>> clocks are managed through PM domains. These PM domains, registered on
> >>>> behalf of the clock controller driver, are configured with
> >>>> GENPD_FLAG_PM_CLK. In most of the Renesas drivers used by RZ SoCs, the
> >>>> clocks are enabled/disabled using runtime PM APIs.
> >>>>
> >>>> During probe, devices are attached to the PM domain controlling their
> >>>> clocks. Similarly, during removal, devices are detached from the PM domain.
> >>>>
> >>>> The detachment call stack is as follows:
> >>>>
> >>>> device_driver_detach() ->
> >>>>    device_release_driver_internal() ->
> >>>>      __device_release_driver() ->
> >>>>        device_remove() ->
> >>>>          platform_remove() ->
> >>>>         dev_pm_domain_detach()
> >>>>
> >>>> In the upcoming Renesas RZ/G3S thermal driver, the
> >>>> struct thermal_zone_device_ops::change_mode API is implemented to
> >>>> start/stop the thermal sensor unit. Register settings are updated within
> >>>> the change_mode API.
> >>>>
> >>>> In case devres helpers are used for thermal zone register/unregister the
> >>>> struct thermal_zone_device_ops::change_mode API is invoked when the
> >>>> driver is unbound. The identified call stack is as follows:
> >>>>
> >>>> device_driver_detach() ->
> >>>>    device_release_driver_internal() ->
> >>>>      device_unbind_cleanup() ->
> >>>>        devres_release_all() ->
> >>>>          devm_thermal_of_zone_release() ->
> >>>>         thermal_zone_device_disable() ->
> >>>>           thermal_zone_device_set_mode() ->
> >>>>             rzg3s_thermal_change_mode()
> >>>>
> >>>> The device_unbind_cleanup() function is called after the thermal device is
> >>>> detached from the PM domain (via dev_pm_domain_detach()).
> >>>>
> >>>> The rzg3s_thermal_change_mode() implementation calls
> >>>> pm_runtime_resume_and_get()/pm_runtime_put_autosuspend() before/after
> >>>> accessing the registers. However, during the unbind scenario, the
> >>>> devm_thermal_of_zone_release() is invoked after dev_pm_domain_detach().
> >>>> Consequently, the clocks are not enabled, as the device is removed from
> >>>> the PM domain at this time, leading to an Asynchronous SError Interrupt.
> >>>> The system cannot be used after this.
> >>>>
> >>>> Add thermal_of_zone_register()/thermal_of_zone_unregister(). These will
> >>>> be used in the upcomming RZ/G3S thermal driver.
> >>>>
> >>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>    
> >>
> >> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
> >>
> >> Kind regards
> >> Uffe
> >>  
> >>>> ---
> >>>>   drivers/thermal/thermal_of.c |  8 +++++---
> >>>>   include/linux/thermal.h      | 14 ++++++++++++++
> >>>>   2 files changed, 19 insertions(+), 3 deletions(-)
> >>>>
> >>>> diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c
> >>>> index fab11b98ca49..8fc35d20db60 100644
> >>>> --- a/drivers/thermal/thermal_of.c
> >>>> +++ b/drivers/thermal/thermal_of.c
> >>>> @@ -329,11 +329,12 @@ static bool thermal_of_should_bind(struct thermal_zone_device *tz,
> >>>>    *
> >>>>    * @tz: a pointer to the thermal zone structure
> >>>>    */
> >>>> -static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> >>>> +void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> >>>>   {
> >>>>       thermal_zone_device_disable(tz);
> >>>>       thermal_zone_device_unregister(tz);
> >>>>   }
> >>>> +EXPORT_SYMBOL_GPL(thermal_of_zone_unregister);
> >>>>
> >>>>   /**
> >>>>    * thermal_of_zone_register - Register a thermal zone with device node
> >>>> @@ -355,8 +356,8 @@ static void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> >>>>    *  - ENOMEM: if one structure can not be allocated
> >>>>    *  - Other negative errors are returned by the underlying called functions
> >>>>    */
> >>>> -static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> >>>> -                                                         const struct thermal_zone_device_ops *ops)
> >>>> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> >>>> +                                                  const struct thermal_zone_device_ops *ops)
> >>>>   {
> >>>>       struct thermal_zone_device_ops of_ops = *ops;
> >>>>       struct thermal_zone_device *tz;
> >>>> @@ -429,6 +430,7 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node *
> >>>>
> >>>>       return ERR_PTR(ret);
> >>>>   }
> >>>> +EXPORT_SYMBOL_GPL(thermal_of_zone_register);
> >>>>
> >>>>   static void devm_thermal_of_zone_release(struct device *dev, void *res)
> >>>>   {
> >>>> diff --git a/include/linux/thermal.h b/include/linux/thermal.h
> >>>> index 69f9bedd0ee8..adbb4092a064 100644
> >>>> --- a/include/linux/thermal.h
> >>>> +++ b/include/linux/thermal.h
> >>>> @@ -195,13 +195,23 @@ struct thermal_zone_params {
> >>>>
> >>>>   /* Function declarations */
> >>>>   #ifdef CONFIG_THERMAL_OF
> >>>> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> >>>> +                                                  const struct thermal_zone_device_ops *ops);
> >>>>   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
> >>>>                                                         const struct thermal_zone_device_ops *ops);
> >>>>
> >>>> +void thermal_of_zone_unregister(struct thermal_zone_device *tz);
> >>>>   void devm_thermal_of_zone_unregister(struct device *dev, struct thermal_zone_device *tz);
> >>>>
> >>>>   #else
> >>>>
> >>>> +static inline
> >>>> +struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
> >>>> +                                                  const struct thermal_zone_device_ops *ops)
> >>>> +{
> >>>> +     return ERR_PTR(-ENOTSUPP);
> >>>> +}
> >>>> +
> >>>>   static inline
> >>>>   struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int id, void *data,
> >>>>                                                         const struct thermal_zone_device_ops *ops)
> >>>> @@ -209,6 +219,10 @@ struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, in
> >>>>       return ERR_PTR(-ENOTSUPP);
> >>>>   }
> >>>>
> >>>> +static inline void thermal_of_zone_unregister(struct thermal_zone_device *tz)
> >>>> +{
> >>>> +}
> >>>> +
> >>>>   static inline void devm_thermal_of_zone_unregister(struct device *dev,
> >>>>                                                  struct thermal_zone_device *tz)
> >>>>   {    
> >>>
> >>>
> >>> --
> >>> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
> >>>
> >>> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
> >>> <http://twitter.com/#!/linaroorg> Twitter |
> >>> <http://www.linaro.org/linaro-blog/> Blog    
> >>  
> >   
> 



^ permalink raw reply	[flat|nested] 39+ messages in thread

end of thread, other threads:[~2025-02-05 11:41 UTC | newest]

Thread overview: 39+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-01-03 16:37 [PATCH 0/6] thermal: renesas: Add support for RZ/G3S Claudiu
2025-01-03 16:38 ` [PATCH 1/6] clk: renesas: r9a08g045: Add clocks, resets and power domain support for the TSU IP Claudiu
2025-01-10 14:16   ` Geert Uytterhoeven
2025-01-03 16:38 ` [PATCH 2/6] thermal: of: Export non-devres helper to register/unregister thermal zone Claudiu
2025-01-09 17:34   ` Daniel Lezcano
2025-01-15 15:42     ` Ulf Hansson
2025-02-04 14:33       ` Jonathan Cameron
2025-02-05  8:33         ` Claudiu Beznea
2025-02-05 11:39           ` Jonathan Cameron
2025-01-29 17:24   ` Daniel Lezcano
2025-01-30  9:08     ` Claudiu Beznea
2025-01-30 10:07       ` Daniel Lezcano
2025-01-30 10:30         ` Claudiu Beznea
2025-01-30 10:50           ` Claudiu Beznea
2025-01-30 17:24           ` Daniel Lezcano
2025-01-30 17:32             ` Claudiu Beznea
2025-01-30 20:53             ` Claudiu Beznea
2025-01-30 22:33               ` Daniel Lezcano
2025-01-30 23:16                 ` Claudiu Beznea
2025-02-03 16:30                   ` Claudiu Beznea
2025-01-30 10:33         ` Biju Das
2025-01-30 17:31           ` Daniel Lezcano
2025-01-30 17:47             ` Biju Das
2025-01-03 16:38 ` [PATCH 3/6] dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit Claudiu
2025-01-08 23:43   ` Rob Herring (Arm)
2025-01-22 10:12   ` Geert Uytterhoeven
2025-01-03 16:38 ` [PATCH 4/6] thermal: renesas: rzg3s: Add thermal driver for the Renesas RZ/G3S SoC Claudiu
2025-01-22 10:29   ` Geert Uytterhoeven
2025-01-25 12:18     ` Jonathan Cameron
2025-01-27  8:32       ` Claudiu Beznea
2025-01-27  8:54         ` Geert Uytterhoeven
2025-01-27  9:11           ` Biju Das
2025-01-27  9:15             ` Claudiu Beznea
2025-01-27  9:17               ` Biju Das
2025-01-03 16:38 ` [PATCH 5/6] arm64: dts: renesas: r9a08g045: Add TSU node Claudiu
2025-01-22 10:31   ` Geert Uytterhoeven
2025-01-30 17:53   ` Daniel Lezcano
2025-01-03 16:38 ` [PATCH 6/6] arm64: defconfig: Enable RZ/G3S thermal Claudiu
2025-01-22 10:33   ` Geert Uytterhoeven

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