From: Wilson Ding <dingwei@marvell.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: <andrew@lunn.ch>, <gregory.clement@bootlin.com>,
<sebastian.hesselbarth@gmail.com>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<p.zabel@pengutronix.de>, <salee@marvell.com>,
<gakula@marvell.com>, Wilson Ding <dingwei@marvell.com>
Subject: [PATCH v2 2/4] dt-bindings: cp110: Document the reset controller
Date: Thu, 20 Feb 2025 15:25:25 -0800 [thread overview]
Message-ID: <20250220232527.882888-3-dingwei@marvell.com> (raw)
In-Reply-To: <20250220232527.882888-1-dingwei@marvell.com>
Add reset-controller sub-node into the system controller node, and
document the supported reset lines.
Signed-off-by: Wilson Ding <dingwei@marvell.com>
---
.../arm/marvell/cp110-system-controller.txt | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
index 9d5d70c98058..5e2c2f2b147c 100644
--- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
@@ -164,6 +164,43 @@ Required properties:
- offset: offset address inside the syscon block
+Reset Controller:
+-----------------
+
+For common binding part and usage, refer to
+Documentation/devicetree/bindings/reset/marvell,armada8k-reset.yaml.
+
+The Device Tree node representing this System Controller 0 provides a
+number of reset lines:
+
+The following reset lines are available:
+
+- 0: Audio Software RESETn
+- 1: TDM Software RESETn
+- 2: Interrupt controller unit Software RESETn
+- 3: Packet processor Software RESETn
+- 4: SDIO Software RESETn
+- 7: XOR-1 engine Software RESETn
+- 8: XOR-0 engine Software RESETn
+- 11: PCIe-0 Gen.3 x1 Software RESETn
+- 12: PCIe-1 Gen.3 x1 Software RESETn
+- 13: PCIe Gen.3 x4 Software RESETn
+- 15: SATA port 0 and port 1 Software RESETn
+- 22: USB3 Host 0 Software RESETn
+- 23: USB3 Host 1 Software RESETn
+- 24: USB3 Device Software RESETn
+- 25: EIP150F Software RESETn
+- 26: EIP197 Software RESETn
+- 29: MSS Software RESETn
+
+Required properties:
+
+ - compatible: "marvell,armada8k-reset"
+
+ - offset: offset address inside the syscon block
+
+ - #reset-cells: must be set to 1
+
Example:
CP110_LABEL(syscon0): system-controller@440000 {
@@ -188,6 +225,12 @@ CP110_LABEL(syscon0): system-controller@440000 {
gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>;
};
+ CP11X_LABEL(unit_swrst): reset-controller@268 {
+ compatible = "marvell,armada8k-reset";
+ offset = <0x268>;
+ #reset-cells = <1>;
+ };
+
};
SYSTEM CONTROLLER 1
--
2.43.0
next prev parent reply other threads:[~2025-02-20 23:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 23:25 [PATCH v2 0/4] Add Armada8K reset controller support Wilson Ding
2025-02-20 23:25 ` [PATCH v2 1/4] dt-bindings: reset: Add Armada8K reset controller Wilson Ding
2025-02-21 3:11 ` Rob Herring (Arm)
2025-02-21 8:46 ` Krzysztof Kozlowski
2025-02-21 23:40 ` Rob Herring
2025-02-22 20:57 ` Wilson Ding
2025-02-23 8:48 ` Krzysztof Kozlowski
2025-02-24 18:19 ` Wilson Ding
2025-02-20 23:25 ` Wilson Ding [this message]
2025-02-21 8:46 ` [PATCH v2 2/4] dt-bindings: cp110: Document the " Krzysztof Kozlowski
2025-02-22 21:02 ` [EXTERNAL] " Wilson Ding
2025-02-23 8:46 ` Krzysztof Kozlowski
2025-02-20 23:25 ` [PATCH v2 3/4] reset: Add support for Armada8K " Wilson Ding
2025-02-20 23:25 ` [PATCH v2 4/4] arm64: dts: marvell: cp11x: Add reset controller node Wilson Ding
2025-02-21 8:47 ` Krzysztof Kozlowski
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