From: Frank Li <Frank.Li@nxp.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
imx@lists.linux.dev (open list:ARM/FREESCALE IMX / MXC ARM
ARCHITECTURE),
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE),
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
Date: Tue, 25 Feb 2025 12:08:02 -0500 [thread overview]
Message-ID: <20250225170802.2671972-1-Frank.Li@nxp.com> (raw)
Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change from v2 - v3
- fix typo 1000000
change from v1 - v2
- rebase to dt/dt64
- add clock 100mhz
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 51625bc9154ec..9bb26b466a061 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
clock-output-names = "sai5_mclk";
};
+ clk_sys100m: clock-sys100m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "clk_sys100m";
+ };
+
osc_24m: clock-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 {
};
};
+ hsio_blk_ctl: syscon@4c0100c0 {
+ compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
+ reg = <0x0 0x4c0100c0 0x0 0x1>;
+ #clock-cells = <1>;
+ clocks = <&clk_sys100m>;
+ power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
+ };
+
usb3_phy: phy@4c1f0040 {
compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
reg = <0x0 0x4c1f0040 0x0 0x40>,
@@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 {
clocks = <&scmi_clk IMX95_CLK_HSIO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
- <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
+ <&hsio_blk_ctl 0>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
@@ -1706,8 +1722,9 @@ pcie1: pcie@4c380000 {
clocks = <&scmi_clk IMX95_CLK_HSIO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
- <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
+ <&hsio_blk_ctl 0>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
--
2.34.1
next reply other threads:[~2025-02-25 17:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-25 17:08 Frank Li [this message]
2025-02-26 8:30 ` [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes Alexander Stein
2025-02-26 16:32 ` Frank Li
2025-03-11 2:50 ` Shawn Guo
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