From: Andre Przywara <andre.przywara@arm.com>
To: Andras Szemzo <szemzo.andras@gmail.com>
Cc: "Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Maxime Ripard" <mripard@kernel.org>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org, linux-gpio@vger.kernel.org,
linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 02/10] pinctrl: sunxi: add driver for Allwinner V853
Date: Thu, 27 Feb 2025 21:57:32 +0000 [thread overview]
Message-ID: <20250227215732.5f5753d9@minigeek.lan> (raw)
In-Reply-To: <20250205125225.1152849-3-szemzo.andras@gmail.com>
On Wed, 5 Feb 2025 13:52:17 +0100
Andras Szemzo <szemzo.andras@gmail.com> wrote:
Hi,
> The V853 family has multiple package variants, from BGA to QFN88.
> The latter has co-packaged DRAM and fewer pins, and less features (pin muxes).
> All family members can be supported by a single driver, as the available pins
> with allowed muxes is the same across the devices.
>
> This new pinctrl driver depends on the new sunxi device-tree based mux support
> patch series [1].
>
> [1]: https://lore.kernel.org/linux-sunxi/20241111005750.13071-1-andre.przywara@arm.com/T/
>
> Signed-off-by: Andras Szemzo <szemzo.andras@gmail.com>
> ---
> drivers/pinctrl/sunxi/Kconfig | 5 ++
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun8i-v853.c | 53 ++++++++++++++++++++++
> 3 files changed, 59 insertions(+)
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-v853.c
>
> diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
> index a78fdbbdfc0c..fac9c61039e2 100644
> --- a/drivers/pinctrl/sunxi/Kconfig
> +++ b/drivers/pinctrl/sunxi/Kconfig
> @@ -81,6 +81,11 @@ config PINCTRL_SUN9I_A80_R
> default MACH_SUN9I
> select PINCTRL_SUNXI
>
> +config PINCTRL_SUN8I_V853
> + bool "Support for the Allwinner V853/V851S/V851SE PIO"
> + default MACH_SUN8I
> + select PINCTRL_SUNXI
> +
> config PINCTRL_SUN20I_D1
> bool "Support for the Allwinner D1 PIO"
> default MACH_SUN8I || (RISCV && ARCH_SUNXI)
> diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
> index 2ff5a55927ad..8937b56b2ef4 100644
> --- a/drivers/pinctrl/sunxi/Makefile
> +++ b/drivers/pinctrl/sunxi/Makefile
> @@ -20,6 +20,7 @@ obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o
> obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o
> obj-$(CONFIG_PINCTRL_SUN8I_H3_R) += pinctrl-sun8i-h3-r.o
> obj-$(CONFIG_PINCTRL_SUN8I_V3S) += pinctrl-sun8i-v3s.o
> +obj-$(CONFIG_PINCTRL_SUN8I_V853) += pinctrl-sun8i-v853.o
> obj-$(CONFIG_PINCTRL_SUN20I_D1) += pinctrl-sun20i-d1.o
> obj-$(CONFIG_PINCTRL_SUN50I_H5) += pinctrl-sun50i-h5.o
> obj-$(CONFIG_PINCTRL_SUN50I_H6) += pinctrl-sun50i-h6.o
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v853.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v853.c
> new file mode 100644
> index 000000000000..fb2112ee12d0
> --- /dev/null
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v853.c
> @@ -0,0 +1,53 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Allwinner V853 SoC pinctrl driver.
> + *
> + * Copyright (c) 2025 Andras Szemzo <szemzo.andras@gmail.com>
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/pinctrl/pinctrl.h>
> +
> +#include "pinctrl-sunxi.h"
> +
> +static const u8 v853_nr_bank_pins[SUNXI_PINCTRL_MAX_BANKS] =
> +/* PA PB PC PD PE PF PG PH PI */
> + { 22, 0, 12, 23, 18, 7, 8, 16, 5 };
> +
> +static const unsigned int v853_irq_bank_map[] = { 0, 2, 3, 4, 5, 6, 7, 8 };
> +
> +static const u8 v853_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =
> +/* PA PB PC PD PE PF PG PH PI */
> + { 14, 0, 14, 14, 14, 14, 14, 14, 14 };
> +
> +static struct sunxi_pinctrl_desc v853_pinctrl_data = {
> + .irq_banks = ARRAY_SIZE(v853_irq_bank_map),
> + .irq_bank_map = v853_irq_bank_map,
> + .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
> +};
> +
> +static int v853_pinctrl_probe(struct platform_device *pdev)
> +{
> + return sunxi_pinctrl_dt_table_init(pdev, v853_nr_bank_pins,
> + v853_irq_bank_muxes,
> + &v853_pinctrl_data,
> + SUNXI_PINCTRL_NEW_REG_LAYOUT |
> + SUNXI_PINCTRL_ELEVEN_BANKS);
This last flag doesn't apply: it would put the offset for the
POW_MOD_SEL registers at 0x380, but the manual says it's 0x340, as with
the previous SoCs.
I compared the rest against the A523 driver, and the V853 specific bits
against the manual: they match, so with that line removed:
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> +}
> +
> +static const struct of_device_id v853_pinctrl_match[] = {
> + { .compatible = "allwinner,sun8i-v853-pinctrl", },
> + {}
> +};
> +
> +static struct platform_driver v853_pinctrl_driver = {
> + .probe = v853_pinctrl_probe,
> + .driver = {
> + .name = "sun8i-v853-pinctrl",
> + .of_match_table = v853_pinctrl_match,
> + },
> +};
> +builtin_platform_driver(v853_pinctrl_driver);
next prev parent reply other threads:[~2025-02-27 22:02 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-05 12:52 [PATCH v2 00/10] Support for Allwinner V853 SoC Andras Szemzo
2025-02-05 12:52 ` [PATCH v2 01/10] clk: sunxi-ng: allow key feature in ccu reset and gate Andras Szemzo
2025-02-05 12:52 ` [PATCH v2 02/10] pinctrl: sunxi: add driver for Allwinner V853 Andras Szemzo
2025-02-27 21:57 ` Andre Przywara [this message]
2025-02-05 12:52 ` [PATCH v2 03/10] dt-bindings: clock: sunxi-ng: add compatibles for V853 Andras Szemzo
2025-02-11 21:02 ` Rob Herring
2025-02-12 10:18 ` András Szemző
2025-02-05 12:52 ` [PATCH v2 04/10] clk: sunxi-ng: add CCU drivers " Andras Szemzo
2025-02-19 20:21 ` Jernej Škrabec
2025-02-20 9:28 ` András Szemző
2025-02-20 16:02 ` Jernej Škrabec
2025-02-05 12:52 ` [PATCH v2 05/10] dt-bindings: power: add V853 ppu bindings Andras Szemzo
2025-02-11 21:02 ` Rob Herring (Arm)
2025-02-05 12:52 ` [PATCH v2 06/10] pmdomain: sunxi: add V853 ppu support Andras Szemzo
2025-02-19 20:23 ` Jernej Škrabec
2025-02-05 12:52 ` [PATCH v2 07/10] dt-bindings: phy: allwinner: add v853 usb phy Andras Szemzo
2025-02-11 21:04 ` Rob Herring
2025-02-05 12:52 ` [PATCH v2 08/10] phy: allwinner: add v853 usb phy compatible Andras Szemzo
2025-02-19 20:25 ` Jernej Škrabec
2025-02-05 12:52 ` [PATCH v2 09/10] ARM: dts: sun8i: add DTSI file for V853 Andras Szemzo
2025-02-06 16:19 ` Andre Przywara
2025-02-11 21:08 ` Rob Herring
2025-02-12 10:07 ` András Szemző
2025-02-07 1:02 ` Andre Przywara
2025-02-12 10:17 ` András Szemző
2025-02-05 12:52 ` [PATCH v2 10/10] ARM: dts: sun8i: add DTS file for yuzuki-lizard V851s Andras Szemzo
2025-02-05 19:17 ` [PATCH v2 00/10] Support for Allwinner V853 SoC Rob Herring (Arm)
2025-02-14 11:25 ` Ulf Hansson
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