[PATCH v3 0/4] Add GPIO interrupt support for Amlogic A4 and A5 SoCs

[PATCH v3 0/4] Add GPIO interrupt support for Amlogic A4 and A5 SoCs

[Xianwei Zhao via B4 Relay]

This patch adds GPIO interrupt support for Amlogic A4 and A5 SoCs

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
Changes in v3:
- Fix warning when run 'make ARCH=arm64 dtbs_check'.
- Fix warning when run 'make ARCH=arm64 Image W=1'.
- Rebase file amlogic-a4.dtsi.
- Link to v2: https://lore.kernel.org/r/20250226-irqchip-gpio-a4-a5-v2-0-c55b1050cb55@amlogic.com

Changes in v2:
- Use if/then instead of direct modification minimum value for property 'amlogic,channel-interrupts'.
- Add register offsets to the parameter structure to reduce definition of a function.
- Link to v1: https://lore.kernel.org/r/20250219-irqchip-gpio-a4-a5-v1-0-3c8e44ae42df@amlogic.com

---
Xianwei Zhao (4):
      dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCs
      irqchip: Add support for Amlogic A4 and A5 SoCs
      arm64: dts: Add gpio_intc node for Amlogic A4 SoCs
      arm64: dts: Add gpio_intc node for Amlogic A5 SoCs

 .../amlogic,meson-gpio-intc.yaml                   | 21 ++++++++++--
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi        | 19 ++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi        | 12 +++++++
 drivers/irqchip/irq-meson-gpio.c                   | 40 +++++++++++++++++++---
 4 files changed, 85 insertions(+), 7 deletions(-)
---
base-commit: 73e4ffb27bb8a093d557bb2dac1a271474cca99c
change-id: 20241213-irqchip-gpio-a4-a5-80c50a1456c4

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@amlogic.com>

[PATCH v3 1/4] dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCs

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Update dt-binding document for GPIO interrupt controller
of Amlogic A4 and A5 SoCs

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 .../amlogic,meson-gpio-intc.yaml                    | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
index a93744763787..3c5853c71efa 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
@@ -35,6 +35,9 @@ properties:
               - amlogic,meson-sm1-gpio-intc
               - amlogic,meson-a1-gpio-intc
               - amlogic,meson-s4-gpio-intc
+              - amlogic,a4-gpio-intc
+              - amlogic,a4-gpio-ao-intc
+              - amlogic,a5-gpio-intc
               - amlogic,c3-gpio-intc
               - amlogic,t7-gpio-intc
           - const: amlogic,meson-gpio-intc
@@ -49,8 +52,6 @@ properties:
 
   amlogic,channel-interrupts:
     description: Array with the upstream hwirq numbers
-    minItems: 8
-    maxItems: 12
     $ref: /schemas/types.yaml#/definitions/uint32-array
 
 required:
@@ -60,6 +61,22 @@ required:
   - "#interrupt-cells"
   - amlogic,channel-interrupts
 
+if:
+  properties:
+    compatible:
+      contains:
+        const: amlogic,a4-gpio-ao-intc
+then:
+  properties:
+    amlogic,channel-interrupts:
+      minItems: 2
+      maxItems: 12
+else:
+  properties:
+    amlogic,channel-interrupts:
+      minItems: 8
+      maxItems: 12
+
 additionalProperties: false
 
 examples:

-- 
2.37.1

[PATCH v3 2/4] irqchip: Add support for Amlogic A4 and A5 SoCs

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

The Amlogic A4 SoCs support 12 GPIO IRQ lines and 2 AO GPIO IRQ lines,
A5 SoCs support 12 GPIO IRQ lines, details are as below.

A4 IRQ Number:
- 72:55   18 pins on bank T
- 54:32   23 pins on bank X
- 31:16   16 pins on bank D
- 15:14    2 pins on bank E
- 13:0    14 pins on bank B

A4 AO IRQ Number:
- 7       1 pin  on bank TESTN
- 6:0     7 pins on bank AO

A5 IRQ Number:
- 98      1 pin  on bank TESTN
- 97:82   16 pins on bank Z
- 81:62   20 pins on bank X
- 61:48   14 pins on bank T
- 47:32   16 pins on bank D
- 31:27    5 pins on bank H
- 26:25    2 pins on bank E
- 24:14   11 pins on bank C
- 13:0    14 pins on bank B

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 drivers/irqchip/irq-meson-gpio.c | 40 +++++++++++++++++++++++++++++++++++-----
 1 file changed, 35 insertions(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c
index cd789fa51519..1cc12f5b52d5 100644
--- a/drivers/irqchip/irq-meson-gpio.c
+++ b/drivers/irqchip/irq-meson-gpio.c
@@ -26,8 +26,6 @@
 
 /* use for A1 like chips */
 #define REG_PIN_A1_SEL	0x04
-/* Used for s4 chips */
-#define REG_EDGE_POL_S4	0x1c
 
 /*
  * Note: The S905X3 datasheet reports that BOTH_EDGE is controlled by
@@ -72,6 +70,7 @@ struct meson_gpio_irq_params {
 	bool support_edge_both;
 	unsigned int edge_both_offset;
 	unsigned int edge_single_offset;
+	unsigned int edge_pol_reg;
 	unsigned int pol_low_offset;
 	unsigned int pin_sel_mask;
 	struct irq_ctl_ops ops;
@@ -105,6 +104,18 @@ struct meson_gpio_irq_params {
 	.pin_sel_mask = 0x7f,					\
 	.nr_channels = 8,					\
 
+#define INIT_MESON_A4_AO_COMMON_DATA(irqs)			\
+	INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init,		\
+			  meson_a1_gpio_irq_sel_pin,		\
+			  meson_s4_gpio_irq_set_type)		\
+	.support_edge_both = true,				\
+	.edge_both_offset = 0,					\
+	.edge_single_offset = 12,				\
+	.edge_pol_reg = 0x8,					\
+	.pol_low_offset = 0,					\
+	.pin_sel_mask = 0xff,					\
+	.nr_channels = 2,					\
+
 #define INIT_MESON_S4_COMMON_DATA(irqs)				\
 	INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init,		\
 			  meson_a1_gpio_irq_sel_pin,		\
@@ -112,6 +123,7 @@ struct meson_gpio_irq_params {
 	.support_edge_both = true,				\
 	.edge_both_offset = 0,					\
 	.edge_single_offset = 12,				\
+	.edge_pol_reg = 0x1c,					\
 	.pol_low_offset = 0,					\
 	.pin_sel_mask = 0xff,					\
 	.nr_channels = 12,					\
@@ -146,6 +158,18 @@ static const struct meson_gpio_irq_params a1_params = {
 	INIT_MESON_A1_COMMON_DATA(62)
 };
 
+static const struct meson_gpio_irq_params a4_params = {
+	INIT_MESON_S4_COMMON_DATA(81)
+};
+
+static const struct meson_gpio_irq_params a4_ao_params = {
+	INIT_MESON_A4_AO_COMMON_DATA(8)
+};
+
+static const struct meson_gpio_irq_params a5_params = {
+	INIT_MESON_S4_COMMON_DATA(99)
+};
+
 static const struct meson_gpio_irq_params s4_params = {
 	INIT_MESON_S4_COMMON_DATA(82)
 };
@@ -168,6 +192,9 @@ static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = {
 	{ .compatible = "amlogic,meson-sm1-gpio-intc", .data = &sm1_params },
 	{ .compatible = "amlogic,meson-a1-gpio-intc", .data = &a1_params },
 	{ .compatible = "amlogic,meson-s4-gpio-intc", .data = &s4_params },
+	{ .compatible = "amlogic,a4-gpio-ao-intc", .data = &a4_ao_params },
+	{ .compatible = "amlogic,a4-gpio-intc", .data = &a4_params },
+	{ .compatible = "amlogic,a5-gpio-intc", .data = &a5_params },
 	{ .compatible = "amlogic,c3-gpio-intc", .data = &c3_params },
 	{ .compatible = "amlogic,t7-gpio-intc", .data = &t7_params },
 	{ }
@@ -358,16 +385,19 @@ static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
 {
 	u32 val = 0;
 	unsigned int idx;
+	const struct meson_gpio_irq_params *params;
+
+	params = ctl->params;
 
 	idx = meson_gpio_irq_get_channel_idx(ctl, channel_hwirq);
 
 	type &= IRQ_TYPE_SENSE_MASK;
 
-	meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_S4, BIT(idx), 0);
+	meson_gpio_irq_update_bits(ctl, params->edge_pol_reg, BIT(idx), 0);
 
 	if (type == IRQ_TYPE_EDGE_BOTH) {
 		val |= BIT(ctl->params->edge_both_offset + idx);
-		meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_S4,
+		meson_gpio_irq_update_bits(ctl, params->edge_pol_reg,
 					   BIT(ctl->params->edge_both_offset + idx), val);
 		return 0;
 	}
@@ -378,7 +408,7 @@ static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
 	if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
 		val |= BIT(ctl->params->edge_single_offset + idx);
 
-	meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,
+	meson_gpio_irq_update_bits(ctl, params->edge_pol_reg,
 				   BIT(idx) | BIT(12 + idx), val);
 	return 0;
 };

-- 
2.37.1

[PATCH v3 3/4] arm64: dts: Add gpio_intc node for Amlogic A4 SoCs

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add GPIO interrupt controller device.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
index efba8565af3c..fa80fa365f13 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -51,6 +51,25 @@ pwrc: power-controller {
 };
 
 &apb {
+	gpio_intc: interrupt-controller@4080 {
+		compatible = "amlogic,a4-gpio-intc",
+			     "amlogic,meson-gpio-intc";
+		reg = <0x0 0x4080 0x0 0x20>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		amlogic,channel-interrupts =
+			<10 11 12 13 14 15 16 17 18 19 20 21>;
+	};
+
+	gpio_ao_intc: interrupt-controller@8e72c {
+		compatible = "amlogic,a4-gpio-ao-intc",
+			     "amlogic,meson-gpio-intc";
+		reg = <0x0 0x8e72c 0x0 0x0c>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		amlogic,channel-interrupts = <140 141>;
+	};
+
 	periphs_pinctrl: pinctrl {
 		compatible = "amlogic,pinctrl-a4";
 		#address-cells = <2>;

-- 
2.37.1

[PATCH v3 4/4] arm64: dts: Add gpio_intc node for Amlogic A5 SoCs

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add GPIO interrupt controller device.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
index 17a6316de891..32ed1776891b 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
@@ -48,3 +48,15 @@ pwrc: power-controller {
 		};
 	};
 };
+
+&apb {
+	gpio_intc: interrupt-controller@4080 {
+		compatible = "amlogic,a5-gpio-intc",
+			     "amlogic,meson-gpio-intc";
+		reg = <0x0 0x4080 0x0 0x20>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		amlogic,channel-interrupts =
+			<10 11 12 13 14 15 16 17 18 19 20 21>;
+	};
+};

-- 
2.37.1

Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCsy

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2138 bytes --]

On Wed, Mar 05, 2025 at 06:02:56PM +0800, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao@amlogic.com>
> 
> Update dt-binding document for GPIO interrupt controller
> of Amlogic A4 and A5 SoCs
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> ---
>  .../amlogic,meson-gpio-intc.yaml                    | 21 +++++++++++++++++++--
>  1 file changed, 19 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> index a93744763787..3c5853c71efa 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> @@ -35,6 +35,9 @@ properties:
>                - amlogic,meson-sm1-gpio-intc
>                - amlogic,meson-a1-gpio-intc
>                - amlogic,meson-s4-gpio-intc
> +              - amlogic,a4-gpio-intc
> +              - amlogic,a4-gpio-ao-intc
> +              - amlogic,a5-gpio-intc
>                - amlogic,c3-gpio-intc
>                - amlogic,t7-gpio-intc
>            - const: amlogic,meson-gpio-intc
> @@ -49,8 +52,6 @@ properties:
>  
>    amlogic,channel-interrupts:
>      description: Array with the upstream hwirq numbers
> -    minItems: 8
> -    maxItems: 12

Please leave the widest constraints here, and let the more restricted
ones in your if/else below.

>      $ref: /schemas/types.yaml#/definitions/uint32-array
>  
>  required:
> @@ -60,6 +61,22 @@ required:
>    - "#interrupt-cells"
>    - amlogic,channel-interrupts
>  
> +if:
> +  properties:
> +    compatible:
> +      contains:
> +        const: amlogic,a4-gpio-ao-intc
> +then:
> +  properties:
> +    amlogic,channel-interrupts:
> +      minItems: 2
> +      maxItems: 12
> +else:
> +  properties:
> +    amlogic,channel-interrupts:
> +      minItems: 8
> +      maxItems: 12
> +
>  additionalProperties: false
>  
>  examples:
> 
> -- 
> 2.37.1
> 
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCsy

[Rob Herring]

On Wed, Mar 05, 2025 at 04:28:16PM +0000, Conor Dooley wrote:
> On Wed, Mar 05, 2025 at 06:02:56PM +0800, Xianwei Zhao via B4 Relay wrote:
> > From: Xianwei Zhao <xianwei.zhao@amlogic.com>
> > 
> > Update dt-binding document for GPIO interrupt controller
> > of Amlogic A4 and A5 SoCs
> > 
> > Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> > ---
> >  .../amlogic,meson-gpio-intc.yaml                    | 21 +++++++++++++++++++--
> >  1 file changed, 19 insertions(+), 2 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> > index a93744763787..3c5853c71efa 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
> > @@ -35,6 +35,9 @@ properties:
> >                - amlogic,meson-sm1-gpio-intc
> >                - amlogic,meson-a1-gpio-intc
> >                - amlogic,meson-s4-gpio-intc
> > +              - amlogic,a4-gpio-intc
> > +              - amlogic,a4-gpio-ao-intc
> > +              - amlogic,a5-gpio-intc
> >                - amlogic,c3-gpio-intc
> >                - amlogic,t7-gpio-intc
> >            - const: amlogic,meson-gpio-intc
> > @@ -49,8 +52,6 @@ properties:
> >  
> >    amlogic,channel-interrupts:
> >      description: Array with the upstream hwirq numbers
> > -    minItems: 8
> > -    maxItems: 12
> 
> Please leave the widest constraints here, and let the more restricted
> ones in your if/else below.
> 
> >      $ref: /schemas/types.yaml#/definitions/uint32-array
> >  
> >  required:
> > @@ -60,6 +61,22 @@ required:
> >    - "#interrupt-cells"
> >    - amlogic,channel-interrupts
> >  
> > +if:
> > +  properties:
> > +    compatible:
> > +      contains:
> > +        const: amlogic,a4-gpio-ao-intc
> > +then:
> > +  properties:
> > +    amlogic,channel-interrupts:
> > +      minItems: 2
> > +      maxItems: 12

And then you don't need this clause as 2-12 is the full range.

> > +else:
> > +  properties:
> > +    amlogic,channel-interrupts:
> > +      minItems: 8
> > +      maxItems: 12

And 12 is already the max, so you only need 'minItems: 8'.

> > +
> >  additionalProperties: false
> >  
> >  examples:
> > 
> > -- 
> > 2.37.1
> > 
> > 

Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCsy

[Xianwei Zhao]

Hi Conor,
     Thanks for your advice.

On 2025/3/6 00:28, Conor Dooley wrote:
> On Wed, Mar 05, 2025 at 06:02:56PM +0800, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>
>> Update dt-binding document for GPIO interrupt controller
>> of Amlogic A4 and A5 SoCs
>>
>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>> ---
>>   .../amlogic,meson-gpio-intc.yaml                    | 21 +++++++++++++++++++--
>>   1 file changed, 19 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
>> index a93744763787..3c5853c71efa 100644
>> --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
>> @@ -35,6 +35,9 @@ properties:
>>                 - amlogic,meson-sm1-gpio-intc
>>                 - amlogic,meson-a1-gpio-intc
>>                 - amlogic,meson-s4-gpio-intc
>> +              - amlogic,a4-gpio-intc
>> +              - amlogic,a4-gpio-ao-intc
>> +              - amlogic,a5-gpio-intc
>>                 - amlogic,c3-gpio-intc
>>                 - amlogic,t7-gpio-intc
>>             - const: amlogic,meson-gpio-intc
>> @@ -49,8 +52,6 @@ properties:
>>   
>>     amlogic,channel-interrupts:
>>       description: Array with the upstream hwirq numbers
>> -    minItems: 8
>> -    maxItems: 12
> Please leave the widest constraints here, and let the more restricted
> ones in your if/else below.
> 

Will do.

>>       $ref: /schemas/types.yaml#/definitions/uint32-array
>>   
>>   required:
>> @@ -60,6 +61,22 @@ required:
>>     - "#interrupt-cells"
>>     - amlogic,channel-interrupts
>>   
>> +if:
>> +  properties:
>> +    compatible:
>> +      contains:
>> +        const: amlogic,a4-gpio-ao-intc
>> +then:
>> +  properties:
>> +    amlogic,channel-interrupts:
>> +      minItems: 2
>> +      maxItems: 12
>> +else:
>> +  properties:
>> +    amlogic,channel-interrupts:
>> +      minItems: 8
>> +      maxItems: 12
>> +
>>   additionalProperties: false
>>   
>>   examples:
>>
>> -- 
>> 2.37.1
>>
>>

Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCsy

[Xianwei Zhao]

Hi Rob,
    Thanks for your advice.

On 2025/3/6 01:07, Rob Herring wrote:
> [ EXTERNAL EMAIL ]
> 
> On Wed, Mar 05, 2025 at 04:28:16PM +0000, Conor Dooley wrote:
>> On Wed, Mar 05, 2025 at 06:02:56PM +0800, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao <xianwei.zhao@amlogic.com>
>>>
>>> Update dt-binding document for GPIO interrupt controller
>>> of Amlogic A4 and A5 SoCs
>>>
>>> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
>>> ---
>>>   .../amlogic,meson-gpio-intc.yaml                    | 21 +++++++++++++++++++--
>>>   1 file changed, 19 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
>>> index a93744763787..3c5853c71efa 100644
>>> --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
>>> +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml
>>> @@ -35,6 +35,9 @@ properties:
>>>                 - amlogic,meson-sm1-gpio-intc
>>>                 - amlogic,meson-a1-gpio-intc
>>>                 - amlogic,meson-s4-gpio-intc
>>> +              - amlogic,a4-gpio-intc
>>> +              - amlogic,a4-gpio-ao-intc
>>> +              - amlogic,a5-gpio-intc
>>>                 - amlogic,c3-gpio-intc
>>>                 - amlogic,t7-gpio-intc
>>>             - const: amlogic,meson-gpio-intc
>>> @@ -49,8 +52,6 @@ properties:
>>>
>>>     amlogic,channel-interrupts:
>>>       description: Array with the upstream hwirq numbers
>>> -    minItems: 8
>>> -    maxItems: 12
>>
>> Please leave the widest constraints here, and let the more restricted
>> ones in your if/else below.
>>
>>>       $ref: /schemas/types.yaml#/definitions/uint32-array
>>>
>>>   required:
>>> @@ -60,6 +61,22 @@ required:
>>>     - "#interrupt-cells"
>>>     - amlogic,channel-interrupts
>>>
>>> +if:
>>> +  properties:
>>> +    compatible:
>>> +      contains:
>>> +        const: amlogic,a4-gpio-ao-intc
>>> +then:
>>> +  properties:
>>> +    amlogic,channel-interrupts:
>>> +      minItems: 2
>>> +      maxItems: 12
> 
> And then you don't need this clause as 2-12 is the full range.
> 

Indeed only 2. Will fix it.

>>> +else:
>>> +  properties:
>>> +    amlogic,channel-interrupts:
>>> +      minItems: 8
>>> +      maxItems: 12
> 
> And 12 is already the max, so you only need 'minItems: 8'.
> 

Will do.

>>> +
>>>   additionalProperties: false
>>>
>>>   examples:
>>>
>>> --
>>> 2.37.1
>>>
>>>
> 
> 

Re: [PATCH v3 2/4] irqchip: Add support for Amlogic A4 and A5 SoCs

[Thomas Gleixner]

On Wed, Mar 05 2025 at 18:02, Xianwei Zhao via wrote:
> @@ -358,16 +385,19 @@ static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
>  {
>  	u32 val = 0;
>  	unsigned int idx;
> +	const struct meson_gpio_irq_params *params;
> +
> +	params = ctl->params;

Please fix up the variable declaration according to

  https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#variable-declarations

and initialize params right in the declaration. 

Thanks,

        tglx

Re: [PATCH v3 2/4] irqchip: Add support for Amlogic A4 and A5 SoCs

[Xianwei Zhao]

Hi Thomas,
    Thanks for your advice.

On 2025/3/7 16:01, Thomas Gleixner wrote:
> [ EXTERNAL EMAIL ]
> 
> On Wed, Mar 05 2025 at 18:02, Xianwei Zhao via wrote:
>> @@ -358,16 +385,19 @@ static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl,
>>   {
>>        u32 val = 0;
>>        unsigned int idx;
>> +     const struct meson_gpio_irq_params *params;
>> +
>> +     params = ctl->params;
> 
> Please fix up the variable declaration according to
> 
>    https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#variable-declarations
> 
> and initialize params right in the declaration.
> 

Will fix.

> Thanks,
> 
>          tglx