From: Zhenyu Ye <yezhenyu2@huawei.com>
To: <maz@kernel.org>, <yuzenghui@huawei.com>, <will@kernel.org>,
<oliver.upton@linux.dev>, <catalin.marinas@arm.com>,
<joey.gouly@arm.com>
Cc: <linux-kernel@vger.kernel.org>, <yezhenyu2@huawei.com>,
<xiexiangyou@huawei.com>, <zhengchuan@huawei.com>,
<wangzhou1@hisilicon.com>, <linux-arm-kernel@lists.infradead.org>,
<kvm@vger.kernel.org>, <kvmarm@lists.linux.dev>
Subject: [PATCH v1 1/5] arm64/sysreg: add HDBSS related register information
Date: Tue, 11 Mar 2025 12:03:17 +0800 [thread overview]
Message-ID: <20250311040321.1460-2-yezhenyu2@huawei.com> (raw)
In-Reply-To: <20250311040321.1460-1-yezhenyu2@huawei.com>
From: eillon <yezhenyu2@huawei.com>
The ARM architecture added the HDBSS feature and descriptions of
related registers (HDBSSBR/HDBSSPROD) in the DDI0601(ID121123) version,
add them to Linux.
Signed-off-by: eillon <yezhenyu2@huawei.com>
---
arch/arm64/include/asm/esr.h | 2 ++
arch/arm64/include/asm/kvm_arm.h | 1 +
arch/arm64/include/asm/sysreg.h | 4 ++++
arch/arm64/tools/sysreg | 28 +++++++++++++++++++++++++++
tools/arch/arm64/include/asm/sysreg.h | 4 ++++
5 files changed, 39 insertions(+)
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
index d1b1a33f9a8b..a33befe0999a 100644
--- a/arch/arm64/include/asm/esr.h
+++ b/arch/arm64/include/asm/esr.h
@@ -147,6 +147,8 @@
#define ESR_ELx_CM (UL(1) << ESR_ELx_CM_SHIFT)
/* ISS2 field definitions for Data Aborts */
+#define ESR_ELx_HDBSSF_SHIFT (11)
+#define ESR_ELx_HDBSSF (UL(1) << ESR_ELx_HDBSSF_SHIFT)
#define ESR_ELx_TnD_SHIFT (10)
#define ESR_ELx_TnD (UL(1) << ESR_ELx_TnD_SHIFT)
#define ESR_ELx_TagAccess_SHIFT (9)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index c2417a424b98..80793ef57f8b 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -122,6 +122,7 @@
TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK)
/* VTCR_EL2 Registers bits */
+#define VTCR_EL2_HDBSS (1UL << 45)
#define VTCR_EL2_DS TCR_EL2_DS
#define VTCR_EL2_RES1 (1U << 31)
#define VTCR_EL2_HD (1 << 22)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 05ea5223d2d5..b727772c06fb 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -522,6 +522,10 @@
#define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2)
#define SYS_VNCR_EL2 sys_reg(3, 4, 2, 2, 0)
+
+#define SYS_HDBSSBR_EL2 sys_reg(3, 4, 2, 3, 2)
+#define SYS_HDBSSPROD_EL2 sys_reg(3, 4, 2, 3, 3)
+
#define SYS_HAFGRTR_EL2 sys_reg(3, 4, 3, 1, 6)
#define SYS_SPSR_EL2 sys_reg(3, 4, 4, 0, 0)
#define SYS_ELR_EL2 sys_reg(3, 4, 4, 0, 1)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 762ee084b37c..c2aea1e7fd22 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2876,6 +2876,34 @@ Sysreg GCSPR_EL2 3 4 2 5 1
Fields GCSPR_ELx
EndSysreg
+Sysreg HDBSSBR_EL2 3 4 2 3 2
+Res0 63:56
+Field 55:12 BADDR
+Res0 11:4
+Enum 3:0 SZ
+ 0b0001 8KB
+ 0b0010 16KB
+ 0b0011 32KB
+ 0b0100 64KB
+ 0b0101 128KB
+ 0b0110 256KB
+ 0b0111 512KB
+ 0b1000 1MB
+ 0b1001 2MB
+EndEnum
+EndSysreg
+
+Sysreg HDBSSPROD_EL2 3 4 2 3 3
+Res0 63:32
+Enum 31:26 FSC
+ 0b000000 OK
+ 0b010000 ExternalAbort
+ 0b101000 GPF
+EndEnum
+Res0 25:19
+Field 18:0 INDEX
+EndSysreg
+
Sysreg DACR32_EL2 3 4 3 0 0
Res0 63:32
Field 31:30 D15
diff --git a/tools/arch/arm64/include/asm/sysreg.h b/tools/arch/arm64/include/asm/sysreg.h
index 150416682e2c..95fc6a4ee655 100644
--- a/tools/arch/arm64/include/asm/sysreg.h
+++ b/tools/arch/arm64/include/asm/sysreg.h
@@ -518,6 +518,10 @@
#define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2)
#define SYS_VNCR_EL2 sys_reg(3, 4, 2, 2, 0)
+
+#define SYS_HDBSSBR_EL2 sys_reg(3, 4, 2, 3, 2)
+#define SYS_HDBSSPROD_EL2 sys_reg(3, 4, 2, 3, 3)
+
#define SYS_HAFGRTR_EL2 sys_reg(3, 4, 3, 1, 6)
#define SYS_SPSR_EL2 sys_reg(3, 4, 4, 0, 0)
#define SYS_ELR_EL2 sys_reg(3, 4, 4, 0, 1)
--
2.39.3
next prev parent reply other threads:[~2025-03-11 4:05 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-11 4:03 [PATCH v1 0/5] Support the FEAT_HDBSS introduced in Armv9.5 Zhenyu Ye
2025-03-11 4:03 ` Zhenyu Ye [this message]
2025-03-11 9:41 ` [PATCH v1 1/5] arm64/sysreg: add HDBSS related register information Marc Zyngier
2025-03-11 4:03 ` [PATCH v1 2/5] arm64/kvm: support set the DBM attr during memory abort Zhenyu Ye
2025-03-11 9:47 ` Marc Zyngier
2025-03-11 4:03 ` [PATCH v1 3/5] arm64/kvm: using ioctl to enable/disable the HDBSS feature Zhenyu Ye
2025-03-11 8:05 ` Oliver Upton
2025-03-11 9:59 ` Marc Zyngier
2025-03-11 4:03 ` [PATCH v1 4/5] arm64/kvm: support to handle the HDBSSF event Zhenyu Ye
2025-03-11 10:34 ` Marc Zyngier
2025-03-11 4:03 ` [PATCH v1 5/5] arm64/config: add config to control whether enable HDBSS feature Zhenyu Ye
2025-03-11 9:53 ` Marc Zyngier
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