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From: "Krzysztof Wilczyński" <kw@linux.com>
To: Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: lpieralisi@kernel.org, vigneshr@ti.com,
	manivannan.sadhasivam@linaro.org, robh@kernel.org,
	bhelgaas@google.com, rogerq@kernel.org,
	linux-omap@vger.kernel.org, linux-pci@vger.kernel.org,
	stable@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, srk@ti.com
Subject: Re: [PATCH] PCI: j721e: Fix the value of linkdown_irq_regfield for J784S4
Date: Wed, 12 Mar 2025 00:00:00 +0900	[thread overview]
Message-ID: <20250311150000.GB1381004@rocinante> (raw)
In-Reply-To: <20250305132018.2260771-1-s-vadapalli@ti.com>

Hello,

> Commit under Fixes assigned the value of 'linkdown_irq_regfield' for the
> J784S4 SoC as 'LINK_DOWN' which corresponds to BIT(1). However, according
> to the Technical Reference Manual and Register Documentation for the J784S4
> SoC [0], BIT(1) corresponds to "ENABLE_SYS_EN_PCIE_DPA_1" which is __NOT__
> the field for the link-state interrupt. Instead, it is BIT(10) of the
> "PCIE_INTD_ENABLE_REG_SYS_2" register that corresponds to the link-state
> field named as "ENABLE_SYS_EN_PCIE_LINK_STATE".
> 
> Hence, set 'linkdown_irq_regfield' to the macro 'J7200_LINK_DOWN' which
> expands to BIT(10) and was first defined for the J7200 SoC. Other SoCs
> already reuse this macro since it accurately represents the link-state
> field in their respective "PCIE_INTD_ENABLE_REG_SYS_2" register.
> 
> [0]: https://www.ti.com/lit/zip/spruj52

Applied to controller/j721e, thank you!

	Krzysztof


  parent reply	other threads:[~2025-03-11 15:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-05 13:20 [PATCH] PCI: j721e: Fix the value of linkdown_irq_regfield for J784S4 Siddharth Vadapalli
2025-03-10 21:07 ` Krzysztof Wilczyński
2025-03-11  5:18   ` Siddharth Vadapalli
2025-03-11  7:25     ` Krzysztof Wilczyński
2025-03-11  7:32       ` Siddharth Vadapalli
2025-03-11 15:21         ` Krzysztof Wilczyński
2025-03-11 15:29           ` Siddharth Vadapalli
2025-03-11 15:34             ` Krzysztof Wilczyński
2025-03-11 15:00 ` Krzysztof Wilczyński [this message]
2025-03-12 16:16 ` Bjorn Helgaas
2025-03-13  5:55   ` Siddharth Vadapalli
2025-03-13 16:02     ` Bjorn Helgaas
2025-03-14  4:17       ` Siddharth Vadapalli
2025-03-26  6:54         ` Krzysztof Wilczyński
2025-03-26  7:01           ` Siddharth Vadapalli
2025-03-26  7:08             ` Krzysztof Wilczyński

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