From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 481B0C35FFF for ; Fri, 21 Mar 2025 09:45:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To: Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Zsmdh6nu+UJnS8Y882xvMrX/hRslcMdqQk91zAyTeUM=; b=bIY3Nknnv/Iksh Ay9jFmMtfJh/91kUOwlF4O3AKqUeSRdRrg1O3kwhbwVSQWCP3A87JTNIkyV7G+Yt0mHimZf4BcDvF 3ZMYJUcd2jtr2K1D99sU+tB1pI6yOZQzDyBWtRsSHXxHkab3sTXcMYrlehL3PlHhYJT3xcFVGx41r mPCGIJVKBrP8uDOC4AhyyRHOSnGddkQ3EftPTyOHjVVGE3/igdsP0K6emK8BkDm9CCUoH3TMIr4RI EGCiZtgjtZaH4m8FYL5ZHQt7ZKgz4BTLr/chJxAjZX/VkRqnkM87zAXfZwEvBi/Xb5S1X1QZI2zwn GqHWf2cUQM8TarYSQlNg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tvYvq-0000000EPzt-2ZBC; Fri, 21 Mar 2025 09:44:50 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tvYm3-0000000ENS3-3CVm for linux-arm-kernel@lists.infradead.org; Fri, 21 Mar 2025 09:34:45 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 52L6aNsT022716; Fri, 21 Mar 2025 10:34:29 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=selector1; bh=Zsmdh6nu+UJnS8Y882xvMr X/hRslcMdqQk91zAyTeUM=; b=gduAHBk4A5DkYZP8H9MJxdny5IxbEc+HE0AKO7 hSvYtEzqqlETpW4tCPVZwQO9wsFZrIGWfZ3jHkhldYWox/DjoXvlBPWS96uYVbBM jRhvgaNf1XeocXPkJvKQaO75AU2GRIzFPyfLB9qiiiRn3R8tPFtpy1OFOH1fAV8G avNooEz47mic31BbnHb2JU2/teejiD6YiLtPsLaQXNcMlRRxNlWE+w9SWy4fNaiD WjBJnn9lS1U02xLvOEGMvgJTkTILGt+gewTpr8qGmGjw2qSGa8xthbQh0BDXgE+0 0SRAhEG3lPgO9Q3bJe4xF5zs70gZeW/mEsrkbDc9lwewCnpA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 45ght64hse-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 21 Mar 2025 10:34:29 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 4CFBA40059; Fri, 21 Mar 2025 10:33:16 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id BA87F7B7160; Fri, 21 Mar 2025 10:32:25 +0100 (CET) Received: from localhost (10.252.27.50) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 21 Mar 2025 10:32:25 +0100 From: Patrice Chotard Subject: [PATCH v6 0/7] Add STM32MP25 SPI NOR support Date: Fri, 21 Mar 2025 10:32:20 +0100 Message-ID: <20250321-upstream_ospi_v6-v6-0-37bbcab43439@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIACQy3WcC/x3MSwqAMAwA0atI1hZq/OJVRErRqFmopdEiFO9uc fkWMxGEPJNAn0XwFFj4PBKaPINps8dKiudkQI21LlGr28nlye7mFMcmNGquSrRd0WKha0iZ87T w8y+H8X0/Axy0L2IAAAA= X-Change-ID: 20250320-upstream_ospi_v6-d432a8172105 To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Krzysztof Kozlowski , Catalin Marinas , Will Deacon CC: , , , , , Patrice Chotard X-Mailer: b4 0.14.2 X-Originating-IP: [10.252.27.50] X-ClientProxiedBy: SAFCAS1NODE2.st.com (10.75.90.13) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-21_03,2025-03-20_01,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250321_023444_108636_B1BCE72A X-CRM114-Status: GOOD ( 13.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series adds SPI NOR support for STM32MP25 SoCs from STMicroelectronics. On STM32MP25 SoCs family, an Octo Memory Manager block manages the muxing, the memory area split, the chip select override and the time constraint between its 2 Octo SPI children. Due to these depedencies, this series adds support for: - Octo Memory Manager driver. - Octo SPI driver. - yaml schema for Octo Memory Manager and Octo SPI drivers. The device tree files adds Octo Memory Manager and its 2 associated Octo SPI chidren in stm32mp251.dtsi and adds SPI NOR support in stm32mp257f-ev1 board. Signed-off-by: Patrice Chotard Changes in v6: - Update MAINTAINERS file. - Remove previous patch 1/8 and 2/8, merged by Mark Brown in spi git tree. - Fix Signed-off-by order for patch 3. - OMM driver: - Add dev_err_probe() in error path. - Rename stm32_omm_enable_child_clock() to stm32_omm_toggle_child_clock(). - Reorder initialised/non-initialized variable in stm32_omm_configure() and stm32_omm_probe(). - Move pm_runtime_disable() calls from stm32_omm_configure() to stm32_omm_probe(). - Update children's clocks and reset management. - Use of_platform_populate() to probe children. - Add missing pm_runtime_disable(). - Remove useless stm32_omm_check_access's first parameter. - Update OMM's dt-bindings by adding OSPI's clocks and resets. - Update stm32mp251.dtsi by adding OSPI's clock and reset in OMM's node. Changes in v5: - Add Reviewed-by Krzysztof Kozlowski for patch 1 and 3. Changes in v4: - Add default value requested by Krzysztof for st,omm-req2ack-ns, st,omm-cssel-ovr and st,omm-mux properties in st,stm32mp25-omm.yaml - Remove constraint in free form test for st,omm-mux property. - Fix drivers/memory/Kconfig by replacing TEST_COMPILE_ by COMPILE_TEST. - Fix SPDX-License-Identifier for stm32-omm.c. - Fix Kernel test robot by fixing dev_err() format in stm32-omm.c. - Add missing pm_runtime_disable() in the error handling path in stm32-omm.c. - Replace an int by an unsigned int in stm32-omm.c - Remove uneeded "," after terminator in stm32-omm.c. - Update cover letter description to explain dependecies between Octo Memory Manager and its 2 Octo SPI children. Changes in v3: - Squash defconfig patches 8 and 9. - Update STM32 Octo Memory Manager controller bindings. - Rename st,stm32-omm.yaml to st,stm32mp25-omm.yaml. - Update STM32 OSPI controller bindings. - Reorder DT properties in .dtsi and .dts files. - Replace devm_reset_control_get_optional() by devm_reset_control_get_optional_exclusive() in stm32_omm.c. - Reintroduce region-memory-names management in stm32_omm.c. - Rename stm32_ospi_tx_poll() and stm32_ospi_tx() to respectively to stm32_ospi_poll() and stm32_ospi_xfer() in spi-stm32-ospi.c. - Set SPI_CONTROLLER_HALF_DUPLEX in controller flags in spi-stm32-ospi.c. Changes in v2: - Move STM32 Octo Memory Manager controller driver and bindings from misc to memory-controllers. - Update STM32 OSPI controller bindings. - Update STM32 Octo Memory Manager controller bindings. - Update STM32 Octo Memory Manager driver to match bindings update. - Update DT to match bindings update. Signed-off-by: Patrice Chotard --- Patrice Chotard (7): MAINTAINERS: add entry for STM32 OCTO MEMORY MANAGER driver dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller memory: Add STM32 Octo Memory Manager driver arm64: dts: st: Add OMM node on stm32mp251 arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver .../memory-controllers/st,stm32mp25-omm.yaml | 227 ++++++++++ MAINTAINERS | 6 + arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 51 +++ arch/arm64/boot/dts/st/stm32mp251.dtsi | 54 +++ arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 32 ++ arch/arm64/configs/defconfig | 2 + drivers/memory/Kconfig | 17 + drivers/memory/Makefile | 1 + drivers/memory/stm32_omm.c | 474 +++++++++++++++++++++ 9 files changed, 864 insertions(+) --- base-commit: 88424abd55ab36c3565898a656589a0a25ecd92f change-id: 20250320-upstream_ospi_v6-d432a8172105 Best regards, -- Patrice Chotard