From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH v2 5/6] KVM: arm64: Handle out-of-bound write to HDCR_EL2.HPMN
Date: Wed, 9 Apr 2025 17:01:05 +0100 [thread overview]
Message-ID: <20250409160106.6445-6-maz@kernel.org> (raw)
In-Reply-To: <20250409160106.6445-1-maz@kernel.org>
We don't really pay attention to what gets written to MDCR_EL2.HPMN,
and funky guests could play ugly games on us.
Restrict what gets written there, and limit the number of counters
to what the PMU is allowed to have.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/sys_regs.c | 34 +++++++++++++++++++++++++---------
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 00b5396492d51..e53b8f82ca7f8 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2571,17 +2571,33 @@ static bool access_mdcr(struct kvm_vcpu *vcpu,
struct sys_reg_params *p,
const struct sys_reg_desc *r)
{
- u64 old = __vcpu_sys_reg(vcpu, MDCR_EL2);
+ if (!p->is_write) {
+ p->regval = __vcpu_sys_reg(vcpu, MDCR_EL2);
+ } else {
+ u64 hpmn = FIELD_GET(MDCR_EL2_HPMN, p->regval);
+ u64 old = __vcpu_sys_reg(vcpu, MDCR_EL2);
+ u64 val = p->regval;
- if (!access_rw(vcpu, p, r))
- return false;
+ /*
+ * If HPMN is out of bounds, limit it to what we actually
+ * support. This matches the UNKNOWN definition of the field
+ * in that case, and keeps the emulation simple. Sort of.
+ */
+ if (hpmn > vcpu->kvm->arch.pmcr_n) {
+ hpmn = vcpu->kvm->arch.pmcr_n;
+ u64_replace_bits(val, hpmn, MDCR_EL2_HPMN);
+ }
- /*
- * Request a reload of the PMU to enable/disable the counters affected
- * by HPME.
- */
- if ((old ^ __vcpu_sys_reg(vcpu, MDCR_EL2)) & MDCR_EL2_HPME)
- kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);
+ vcpu_write_sys_reg(vcpu, val, r->reg);
+
+ /*
+ * Request a reload of the PMU to enable/disable the
+ * counters affected by HPME.
+ */
+
+ if ((old ^ __vcpu_sys_reg(vcpu, MDCR_EL2)) & MDCR_EL2_HPME)
+ kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);
+ }
return true;
}
--
2.39.2
next prev parent reply other threads:[~2025-04-09 16:12 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-09 16:01 [PATCH v2 0/6] KVM: arm64: EL2 PMU handling fixes Marc Zyngier
2025-04-09 16:01 ` [PATCH v2 1/6] KVM: arm64: Fix MDCR_EL2.HPMN reset value Marc Zyngier
2025-04-09 20:21 ` Oliver Upton
2025-04-10 10:54 ` Marc Zyngier
2025-04-10 17:38 ` Oliver Upton
2025-04-09 16:01 ` [PATCH v2 2/6] KVM: arm64: Contextualise the handling of PMCR_EL0.P writes Marc Zyngier
2025-04-09 16:01 ` [PATCH v2 3/6] KVM: arm64: Allow userspace to limit the number of PMU counters for EL2 VMs Marc Zyngier
2025-04-09 20:25 ` Oliver Upton
2025-04-09 16:01 ` [PATCH v2 4/6] KVM: arm64: Don't let userspace write to PMCR_EL0.N when the vcpu has EL2 Marc Zyngier
2025-04-09 16:01 ` Marc Zyngier [this message]
2025-04-09 20:29 ` [PATCH v2 5/6] KVM: arm64: Handle out-of-bound write to HDCR_EL2.HPMN Oliver Upton
2025-04-09 16:01 ` [PATCH v2 6/6] KVM: arm64: Let kvm_vcpu_read_pmcr() return an EL-dependent value for PMCR_EL0.N Marc Zyngier
2025-04-09 20:31 ` [PATCH v2 0/6] KVM: arm64: EL2 PMU handling fixes Oliver Upton
2025-04-11 12:00 ` Marc Zyngier
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