* [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access
@ 2025-04-09 3:29 yiru zhang
2025-04-10 7:25 ` kernel test robot
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: yiru zhang @ 2025-04-09 3:29 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Alexander Shishkin,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: coresight, linux-arm-kernel, linux-kernel, linux-mediatek,
yiru zhang
Due to ETE supported, so add ETE devarch condition in etm4_init_iomem_access.
Signed-off-by: yiru zhang <yiru.zhang@mediatek.com>
v1->v2: use switch case way
---
drivers/hwtracing/coresight/coresight-etm4x-core.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 2b8f10463840..366d11e038de 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -1135,11 +1135,15 @@ static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata,
* with MMIO. But we cannot touch the OSLK until we are
* sure this is an ETM. So rely only on the TRCDEVARCH.
*/
- if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) {
- pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n");
+ switch (devarch & ETM_DEVARCH_ID_MASK) {
+ case ETM_DEVARCH_ETMv4x_ARCH:
+ case ETM_DEVARCH_ETE_ARCH:
+ break;
+ default:
+ pr_warn_once("Unknown ETM architecture: %x\n",
+ devarch & ETM_DEVARCH_ID_MASK);
return false;
}
-
drvdata->arch = etm_devarch_to_arch(devarch);
*csa = CSDEV_ACCESS_IOMEM(drvdata->base);
return true;
--
2.46.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access
2025-04-09 3:29 [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access yiru zhang
@ 2025-04-10 7:25 ` kernel test robot
2025-04-10 9:28 ` kernel test robot
2025-04-10 9:51 ` [PATCH] [Patch v3]Add " yiru zhang
2 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2025-04-10 7:25 UTC (permalink / raw)
To: yiru zhang, Suzuki K Poulose, Mike Leach, James Clark,
Alexander Shishkin, Matthias Brugger, AngeloGioacchino Del Regno
Cc: oe-kbuild-all, coresight, linux-arm-kernel, linux-kernel,
linux-mediatek, yiru zhang
Hi yiru,
kernel test robot noticed the following build warnings:
[auto build test WARNING on soc/for-next]
[also build test WARNING on linus/master v6.15-rc1 next-20250409]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/yiru-zhang/Add-ETE-devarch-condition-in-etm4_init_iomem_access/20250409-113037
base: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
patch link: https://lore.kernel.org/r/20250409032917.7580-1-yiru.zhang%40mediatek.com
patch subject: [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access
config: arm64-randconfig-004-20250410 (https://download.01.org/0day-ci/archive/20250410/202504101502.T3kUYupS-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250410/202504101502.T3kUYupS-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504101502.T3kUYupS-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from include/asm-generic/bug.h:22,
from arch/arm64/include/asm/bug.h:26,
from include/linux/bug.h:5,
from include/linux/thread_info.h:13,
from arch/arm64/include/asm/preempt.h:6,
from include/linux/preempt.h:79,
from include/linux/spinlock.h:56,
from include/linux/mmzone.h:8,
from include/linux/gfp.h:7,
from include/linux/slab.h:16,
from include/linux/resource_ext.h:11,
from include/linux/acpi.h:13,
from drivers/hwtracing/coresight/coresight-etm4x-core.c:6:
drivers/hwtracing/coresight/coresight-etm4x-core.c: In function 'etm4_init_iomem_access':
>> include/linux/kern_levels.h:5:18: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'long unsigned int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^~~~~~
include/linux/printk.h:473:11: note: in definition of macro 'printk_index_wrap'
_p_func(_fmt, ##__VA_ARGS__); \
^~~~
include/linux/once_lite.h:31:4: note: in expansion of macro 'printk'
func(__VA_ARGS__); \
^~~~
include/linux/once_lite.h:11:2: note: in expansion of macro 'DO_ONCE_LITE_IF'
DO_ONCE_LITE_IF(true, func, ##__VA_ARGS__)
^~~~~~~~~~~~~~~
include/linux/printk.h:640:2: note: in expansion of macro 'DO_ONCE_LITE'
DO_ONCE_LITE(printk, fmt, ##__VA_ARGS__)
^~~~~~~~~~~~
include/linux/printk.h:659:2: note: in expansion of macro 'printk_once'
printk_once(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~
include/linux/kern_levels.h:12:22: note: in expansion of macro 'KERN_SOH'
#define KERN_WARNING KERN_SOH "4" /* warning conditions */
^~~~~~~~
include/linux/printk.h:659:14: note: in expansion of macro 'KERN_WARNING'
printk_once(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~~
drivers/hwtracing/coresight/coresight-etm4x-core.c:1143:3: note: in expansion of macro 'pr_warn_once'
pr_warn_once("Unknown ETM architecture: %x\n",
^~~~~~~~~~~~
drivers/hwtracing/coresight/coresight-etm4x-core.c:1143:44: note: format string is defined here
pr_warn_once("Unknown ETM architecture: %x\n",
~^
%lx
vim +5 include/linux/kern_levels.h
314ba3520e513a Joe Perches 2012-07-30 4
04d2c8c83d0e3a Joe Perches 2012-07-30 @5 #define KERN_SOH "\001" /* ASCII Start Of Header */
04d2c8c83d0e3a Joe Perches 2012-07-30 6 #define KERN_SOH_ASCII '\001'
04d2c8c83d0e3a Joe Perches 2012-07-30 7
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access
2025-04-09 3:29 [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access yiru zhang
2025-04-10 7:25 ` kernel test robot
@ 2025-04-10 9:28 ` kernel test robot
2025-04-10 9:51 ` [PATCH] [Patch v3]Add " yiru zhang
2 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2025-04-10 9:28 UTC (permalink / raw)
To: yiru zhang, Suzuki K Poulose, Mike Leach, James Clark,
Alexander Shishkin, Matthias Brugger, AngeloGioacchino Del Regno
Cc: llvm, oe-kbuild-all, coresight, linux-arm-kernel, linux-kernel,
linux-mediatek, yiru zhang
Hi yiru,
kernel test robot noticed the following build warnings:
[auto build test WARNING on soc/for-next]
[also build test WARNING on linus/master v6.15-rc1 next-20250410]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/yiru-zhang/Add-ETE-devarch-condition-in-etm4_init_iomem_access/20250409-113037
base: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
patch link: https://lore.kernel.org/r/20250409032917.7580-1-yiru.zhang%40mediatek.com
patch subject: [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access
config: arm64-randconfig-002-20250410 (https://download.01.org/0day-ci/archive/20250410/202504101759.7Ls0Uy4o-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 92c93f5286b9ff33f27ff694d2dc33da1c07afdd)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250410/202504101759.7Ls0Uy4o-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504101759.7Ls0Uy4o-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/hwtracing/coresight/coresight-etm4x-core.c:1144:9: warning: format specifies type 'unsigned int' but the argument has type 'unsigned long' [-Wformat]
1143 | pr_warn_once("Unknown ETM architecture: %x\n",
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| %lx
1144 | devarch & ETM_DEVARCH_ID_MASK);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:659:42: note: expanded from macro 'pr_warn_once'
659 | printk_once(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
include/linux/printk.h:640:30: note: expanded from macro 'printk_once'
640 | DO_ONCE_LITE(printk, fmt, ##__VA_ARGS__)
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
include/linux/once_lite.h:11:32: note: expanded from macro 'DO_ONCE_LITE'
11 | DO_ONCE_LITE_IF(true, func, ##__VA_ARGS__)
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
include/linux/once_lite.h:31:9: note: expanded from macro 'DO_ONCE_LITE_IF'
31 | func(__VA_ARGS__); \
| ~~~~~^~~~~~~~~~~~
include/linux/printk.h:501:60: note: expanded from macro 'printk'
501 | #define printk(fmt, ...) printk_index_wrap(_printk, fmt, ##__VA_ARGS__)
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~
include/linux/printk.h:473:19: note: expanded from macro 'printk_index_wrap'
473 | _p_func(_fmt, ##__VA_ARGS__); \
| ~~~~ ^~~~~~~~~~~
1 warning generated.
vim +1144 drivers/hwtracing/coresight/coresight-etm4x-core.c
1121
1122 static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata,
1123 struct csdev_access *csa)
1124 {
1125 u32 devarch = readl_relaxed(drvdata->base + TRCDEVARCH);
1126
1127 if (!is_coresight_device(drvdata->base) || !is_devtype_cpu_trace(drvdata->base))
1128 return false;
1129
1130 /*
1131 * All ETMs must implement TRCDEVARCH to indicate that
1132 * the component is an ETMv4. Even though TRCIDR1 also
1133 * contains the information, it is part of the "Trace"
1134 * register and must be accessed with the OSLK cleared,
1135 * with MMIO. But we cannot touch the OSLK until we are
1136 * sure this is an ETM. So rely only on the TRCDEVARCH.
1137 */
1138 switch (devarch & ETM_DEVARCH_ID_MASK) {
1139 case ETM_DEVARCH_ETMv4x_ARCH:
1140 case ETM_DEVARCH_ETE_ARCH:
1141 break;
1142 default:
1143 pr_warn_once("Unknown ETM architecture: %x\n",
> 1144 devarch & ETM_DEVARCH_ID_MASK);
1145 return false;
1146 }
1147 drvdata->arch = etm_devarch_to_arch(devarch);
1148 *csa = CSDEV_ACCESS_IOMEM(drvdata->base);
1149 return true;
1150 }
1151
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] [Patch v3]Add ETE devarch condition in etm4_init_iomem_access
2025-04-09 3:29 [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access yiru zhang
2025-04-10 7:25 ` kernel test robot
2025-04-10 9:28 ` kernel test robot
@ 2025-04-10 9:51 ` yiru zhang
2025-04-10 13:21 ` Mike Leach
2 siblings, 1 reply; 5+ messages in thread
From: yiru zhang @ 2025-04-10 9:51 UTC (permalink / raw)
To: yiru.zhang
Cc: alexander.shishkin, angelogioacchino.delregno, coresight,
james.clark, linux-arm-kernel, linux-kernel, linux-mediatek,
matthias.bgg, mike.leach, suzuki.poulose, kernel test robot
Due to ETE supported, so add ETE devarch condition in etm4_init_iomem_access.
Signed-off-by: yiru zhang <yiru.zhang@mediatek.com>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202504101759.7Ls0Uy4o-lkp@intel.com/
v1->v2: use switch case way
v2->v3: clean build warning
---
drivers/hwtracing/coresight/coresight-etm4x-core.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 2b8f10463840..4002a2823fd0 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -1135,11 +1135,15 @@ static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata,
* with MMIO. But we cannot touch the OSLK until we are
* sure this is an ETM. So rely only on the TRCDEVARCH.
*/
- if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) {
- pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n");
+ switch (devarch & ETM_DEVARCH_ID_MASK) {
+ case ETM_DEVARCH_ETMv4x_ARCH:
+ case ETM_DEVARCH_ETE_ARCH:
+ break;
+ default:
+ pr_warn_once("Unknown ETM architecture: 0x%lx\n",
+ devarch & ETM_DEVARCH_ID_MASK);
return false;
}
-
drvdata->arch = etm_devarch_to_arch(devarch);
*csa = CSDEV_ACCESS_IOMEM(drvdata->base);
return true;
--
2.46.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] [Patch v3]Add ETE devarch condition in etm4_init_iomem_access
2025-04-10 9:51 ` [PATCH] [Patch v3]Add " yiru zhang
@ 2025-04-10 13:21 ` Mike Leach
0 siblings, 0 replies; 5+ messages in thread
From: Mike Leach @ 2025-04-10 13:21 UTC (permalink / raw)
To: yiru zhang
Cc: alexander.shishkin, angelogioacchino.delregno, coresight,
james.clark, linux-arm-kernel, linux-kernel, linux-mediatek,
matthias.bgg, suzuki.poulose, kernel test robot
Hi,
Please stop using the unusual title format of [PATCH}[Patch v3] - use
the git command line options to ensure the format is e.g. [PATCH v3]
What is the reason that your device cannot use the system instructions
to access the ETE? Using a memory interface, if implemented, is only
recommended for external debuggers, or on systems where the
implementation of system register access is not working.
On Thu, 10 Apr 2025 at 10:52, yiru zhang <yiru.zhang@mediatek.com> wrote:
>
> Due to ETE supported, so add ETE devarch condition in etm4_init_iomem_access.
>
> Signed-off-by: yiru zhang <yiru.zhang@mediatek.com>
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202504101759.7Ls0Uy4o-lkp@intel.com/
>
> v1->v2: use switch case way
> v2->v3: clean build warning
> ---
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index 2b8f10463840..4002a2823fd0 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1135,11 +1135,15 @@ static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata,
> * with MMIO. But we cannot touch the OSLK until we are
> * sure this is an ETM. So rely only on the TRCDEVARCH.
> */
> - if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH) {
> - pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n");
> + switch (devarch & ETM_DEVARCH_ID_MASK) {
> + case ETM_DEVARCH_ETMv4x_ARCH:
> + case ETM_DEVARCH_ETE_ARCH:
> + break;
> + default:
> + pr_warn_once("Unknown ETM architecture: 0x%lx\n",
> + devarch & ETM_DEVARCH_ID_MASK);
> return false;
> }
> -
> drvdata->arch = etm_devarch_to_arch(devarch);
> *csa = CSDEV_ACCESS_IOMEM(drvdata->base);
> return true;
> --
> 2.46.0
>
Otherwise -
Reviewed-by: Mike Leach <mike.leach@linaro.org>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
^ permalink raw reply [flat|nested] 5+ messages in thread
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2025-04-09 3:29 [PATCH] [Patch v2]Add ETE devarch condition in etm4_init_iomem_access yiru zhang
2025-04-10 7:25 ` kernel test robot
2025-04-10 9:28 ` kernel test robot
2025-04-10 9:51 ` [PATCH] [Patch v3]Add " yiru zhang
2025-04-10 13:21 ` Mike Leach
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