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From: Frank Wunderlich <linux@fw-web.de>
To: Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: Frank Wunderlich <frank-w@public-files.de>,
	Daniel Golle <daniel@makrotopia.org>,
	Sam Shih <sam.shih@mediatek.com>,
	MandyJH Liu <mandyjh.liu@mediatek.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [RFC 2/5] dt-bindings: phy: mtk-xs-phy: support type switch by pericfg
Date: Sun, 13 Apr 2025 10:58:02 +0200	[thread overview]
Message-ID: <20250413085806.8544-3-linux@fw-web.de> (raw)
In-Reply-To: <20250413085806.8544-1-linux@fw-web.de>

From: Frank Wunderlich <frank-w@public-files.de>

Add support for type switch by pericfg register between USB3, PCIe, ...

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 .../devicetree/bindings/phy/mediatek,xsphy.yaml  | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
index 3b5253659e6f..5033d77c1239 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
@@ -151,6 +151,22 @@ patternProperties:
         minimum: 1
         maximum: 31
 
+      mediatek,syscon-type:
+        $ref: /schemas/types.yaml#/definitions/phandle-array
+        maxItems: 1
+        description:
+          A phandle to syscon used to access the register of type switch,
+          the field should always be 3 cells long.
+        items:
+          items:
+            - description:
+                The first cell represents a phandle to syscon
+            - description:
+                The second cell represents the register offset
+            - description:
+                The third cell represents the index of config segment
+              enum: [0, 1, 2, 3]
+
     required:
       - reg
       - clocks
-- 
2.43.0



  parent reply	other threads:[~2025-04-13  9:04 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-13  8:58 [RFC 0/5] Add mt7988 XS-PHY Frank Wunderlich
2025-04-13  8:58 ` [RFC 1/5] dt-bindings: phy: mtk-xs-phy: Add mt7988 compatible Frank Wunderlich
2025-04-13  8:58 ` Frank Wunderlich [this message]
2025-04-13  8:58 ` [RFC 3/5] dt-bindings: power: Add binding for MediaTek MT7988 topmisc power controller Frank Wunderlich
2025-04-13 10:42   ` Rob Herring (Arm)
2025-04-14 10:25   ` AngeloGioacchino Del Regno
2025-04-15  9:52     ` Frank Wunderlich
2025-04-15  9:59       ` AngeloGioacchino Del Regno
2025-04-15 11:33         ` Frank Wunderlich
2025-04-15 14:03         ` Frank Wunderlich
2025-04-15 14:12           ` AngeloGioacchino Del Regno
2025-04-13  8:58 ` [RFC 4/5] phy: mediatek: xsphy: support type switch by pericfg Frank Wunderlich
2025-04-14 10:25   ` AngeloGioacchino Del Regno
2025-04-13  8:58 ` [RFC 5/5] arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2 Frank Wunderlich
2025-04-14 10:27   ` AngeloGioacchino Del Regno
2025-04-14 10:57     ` Frank Wunderlich

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