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Mon, 14 Apr 2025 07:09:30 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 14 Apr 2025 07:09:30 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 14 Apr 2025 07:09:30 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53EC9Uic090737; Mon, 14 Apr 2025 07:09:30 -0500 Date: Mon, 14 Apr 2025 07:09:30 -0500 From: Nishanth Menon To: Siddharth Vadapalli CC: , , , , , , , , , Subject: Re: [PATCH 0/2] J722S: DT Node cleanup for serdes0 and serdes1 Message-ID: <20250414120930.m7x7zfmyby22urpo@ultimate> References: <20250412052712.927626-1-s-vadapalli@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250412052712.927626-1-s-vadapalli@ti.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250414_050937_365937_6FF75519 X-CRM114-Status: GOOD ( 17.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10:57-20250412, Siddharth Vadapalli wrote: > Hello, > > This series is based on the following series: > https://patchwork.kernel.org/project/linux-arm-kernel/cover/20250408103606.3679505-1-s-vadapalli@ti.com/ > Based on the discussion in the above series which disabled 'serdes_wiz0' > and 'serdes_wiz1' nodes in the SoC file and enabled them in the board > file, Udit pointed out that it wasn't necessary to disable 'serdes0' and > 'serdes1' in the SoC file anymore, since that is not a working > configuration - serdes_wizX enabled and serdesX disabled doesn't work. > > Hence, this series aims to cleanup the serdesX nodes after the changes > made by the above series. > > Regards, > Siddharth. > > Siddharth Vadapalli (2): > arm64: dts: ti: k3-j722s-main: don't disable serdes0 and serdes1 > arm64: dts: ti: k3-j722s-evm: drop redundant status within > serdes0/serdes1 > > arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 2 -- > arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 4 ---- > 2 files changed, 6 deletions(-) > > -- > 2.34.1 > I do not understand the logic here. serdes cannot operate without wiz nodes, correct? why would we leave serdes on by default? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D