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Thu, 17 Apr 2025 10:47:49 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 53HAlnYJ019982 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Apr 2025 10:47:49 GMT Received: from nsssdc-sh01-lnx.ap.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 17 Apr 2025 03:47:44 -0700 From: Luo Jie Date: Thu, 17 Apr 2025 18:47:13 +0800 Subject: [PATCH v3 6/6] arm64: mm: Convert the opencoded field modify MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20250417-field_modify-v3-6-6f7992aafcb7@quicinc.com> References: <20250417-field_modify-v3-0-6f7992aafcb7@quicinc.com> In-Reply-To: <20250417-field_modify-v3-0-6f7992aafcb7@quicinc.com> To: Yury Norov , Rasmus Villemoes , Julia Lawall , "Nicolas Palix" , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu CC: , , , , , , , , , , Luo Jie X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1744886837; l=1033; i=quic_luoj@quicinc.com; s=20250209; h=from:subject:message-id; bh=xpPeM78AeyqXzMwrmF8QDTx6un/IOmdC2J/f9RaIfLg=; b=PovyH1yn6CXrPEB8yE8i6Rq7KANbmp7tfi2kcTCp1H73IAAf+83n1NFGWDqg4gqVeGsr9aufS P7DuOUkQd0PDv1BUaLL+/x4PnkP/yg+Cnzrn5gq9Lomp5wV/P2DcQuE X-Developer-Key: i=quic_luoj@quicinc.com; a=ed25519; pk=pzwy8bU5tJZ5UKGTv28n+QOuktaWuriznGmriA9Qkfc= X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=WecMa1hX c=1 sm=1 tr=0 ts=6800dc55 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=ZOzjf2MOAAAA:8 a=COk6AnOGAAAA:8 a=7DCMZFnr-hN-Ju-LsH8A:9 a=QEXdDO2ut3YA:10 a=1Mhi-5-LkjG4w5oc0yAU:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: X5Cpp14XJ6JiT4u5RFYLsXdjNIPLMfKb X-Proofpoint-ORIG-GUID: X5Cpp14XJ6JiT4u5RFYLsXdjNIPLMfKb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-17_03,2025-04-15_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 mlxscore=0 impostorscore=0 mlxlogscore=596 spamscore=0 malwarescore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504170080 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250417_034810_988502_C67B7035 X-CRM114-Status: GOOD ( 11.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Replaced below code with the wrapper FIELD_MODIFY(MASK, ®, val) - reg &= ~MASK; - reg |= FIELD_PREP(MASK, val); The semantic patch that makes this change is available in scripts/coccinelle/misc/field_modify.cocci. More information about semantic patching is available at https://coccinelle.gitlabpages.inria.fr/website Signed-off-by: Luo Jie --- arch/arm64/mm/context.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index b2ac06246327..4fbac8e74149 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -361,8 +361,7 @@ void cpu_do_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm) ttbr0 |= FIELD_PREP(TTBR_ASID_MASK, asid); /* Set ASID in TTBR1 since TCR.A1 is set */ - ttbr1 &= ~TTBR_ASID_MASK; - ttbr1 |= FIELD_PREP(TTBR_ASID_MASK, asid); + FIELD_MODIFY(TTBR_ASID_MASK, &ttbr1, asid); cpu_set_reserved_ttbr0_nosync(); write_sysreg(ttbr1, ttbr1_el1); -- 2.34.1