From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <srk@ti.com>,
<s-vadapalli@ti.com>
Subject: [PATCH 3/7] arm64: dts: ti: k3-j721e: add ranges for PCIe0 DAT1 and PCIe1 DAT1
Date: Thu, 17 Apr 2025 17:34:03 +0530 [thread overview]
Message-ID: <20250417120407.2646929-4-s-vadapalli@ti.com> (raw)
In-Reply-To: <20250417120407.2646929-1-s-vadapalli@ti.com>
The PCIe0 DAT1 and PCIe1 DAT1 are 4 GB address regions in the 64-bit
address space of the respective PCIe Controllers. Hence, update the
ranges to include them.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
index a7f2f52f42f7..4f5d277c97a4 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi
@@ -126,6 +126,8 @@ cbass_main: bus@100000 {
<0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
<0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71 */
<0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000>, /* A72 PERIPHBASE */
+ <0x40 0x00000000 0x40 0x00000000 0x00 0x08000000>, /* PCIe0 DAT1 */
+ <0x41 0x00000000 0x41 0x00000000 0x00 0x08000000>, /* PCIe1 DAT1 */
<0x44 0x00000000 0x44 0x00000000 0x00 0x08000000>, /* PCIe2 DAT */
<0x44 0x10000000 0x44 0x10000000 0x00 0x08000000>, /* PCIe3 DAT */
<0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
--
2.34.1
next prev parent reply other threads:[~2025-04-17 12:26 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 12:04 [PATCH 0/7] AM64 and J7X DT: Enable PCIe 64-bit Address Space Siddharth Vadapalli
2025-04-17 12:04 ` [PATCH 1/7] arm64: dts: ti: k3-am64-main: switch to 64-bit address space for PCIe0 Siddharth Vadapalli
2025-04-17 12:04 ` [PATCH 2/7] arm64: dts: ti: k3-j7200-main: switch to 64-bit address space for PCIe1 Siddharth Vadapalli
2025-04-19 18:05 ` Kumar, Udit
2025-04-20 3:03 ` Siddharth Vadapalli
2025-04-20 4:47 ` Kumar, Udit
2025-04-20 14:18 ` Siddharth Vadapalli
2025-04-21 7:59 ` Kumar, Udit
2025-04-22 10:27 ` Siddharth Vadapalli
2025-04-17 12:04 ` Siddharth Vadapalli [this message]
2025-04-19 18:09 ` [PATCH 3/7] arm64: dts: ti: k3-j721e: add ranges for PCIe0 DAT1 and PCIe1 DAT1 Kumar, Udit
2025-04-20 3:05 ` Siddharth Vadapalli
2025-04-17 12:04 ` [PATCH 4/7] arm64: dts: ti: k3-j721e-main: switch to 64-bit address space for PCIe0 and PCIe1 Siddharth Vadapalli
2025-04-17 12:04 ` [PATCH 5/7] arm64: dts: ti: k3-j721s2-main: switch to 64-bit address space for PCIe1 Siddharth Vadapalli
2025-04-17 12:04 ` [PATCH 6/7] arm64: dts: ti: k3-j722s-main: switch to 64-bit address space for PCIe0 Siddharth Vadapalli
2025-04-17 12:04 ` [PATCH 7/7] arm64: dts: ti: k3-j784s4-j742s2-main-common: switch to 64-bit address space for PCIe0 and PCIe1 Siddharth Vadapalli
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