From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9167DC369BD for ; Sat, 19 Apr 2025 15:07:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:CC:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=YZi3aRqovSBiCU2ni0veKe9QUcmpB/gRS81ieaxuMGc=; b=KI5Jx1pHSF4duv/4nm4YJ6+4cy GiJFRQxS9z5zRiedX5fDAgDJXv6TbZd/DHNmrDzKOo7jhBPAPBhhsTG4AjTKCznHfJKUn++xz157v WuiGcePdIzRySzdaCCkImBk6w4G0JMfAlqhfI7EunP+M8biY5LBPgmHCd/FeknW4ad3qJtmyhdtQ+ ACv2bCUmTNzFkDbdMJfi4sUd1UsP5uAcBftOjjA4rRxOuQOHjVNfkDBdl5t+29ZikiXAKAPYu36K7 bcKfFSegqZa8Y8ydp0xIRrwCUCf3DaNn9Xceq3L0yakOC64sm1BgmdAzmvALoAqRjwNb2/YRtwoKy AiQ1wy9Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u69mU-00000001S0W-0oRV; Sat, 19 Apr 2025 15:06:58 +0000 Received: from fllvem-ot04.ext.ti.com ([198.47.19.246]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1u69kc-00000001Ru4-21AN for linux-arm-kernel@lists.infradead.org; Sat, 19 Apr 2025 15:05:03 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 53JF4pdn1163692 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 19 Apr 2025 10:04:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1745075091; bh=YZi3aRqovSBiCU2ni0veKe9QUcmpB/gRS81ieaxuMGc=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=ZhxSbp1Jao/FmrWgP8kr0092Ms5IAQSn1hsIknCYGGssfwr3snl1aogedd7/0duVf U0mYKQ2Vy/nZGUC4jsrOca41OlV0zWSWBLfsta++ufqwkrcOkVfy645ag64MznTlsX xADdtKOLva+tdK+qIiccvKahmwadwJf5wtiNAN2k= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 53JF4pG2015624 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 19 Apr 2025 10:04:51 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 19 Apr 2025 10:04:51 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 19 Apr 2025 10:04:51 -0500 Received: from localhost (bb.dhcp.ti.com [128.247.81.12]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53JF4plT016844; Sat, 19 Apr 2025 10:04:51 -0500 Date: Sat, 19 Apr 2025 10:04:51 -0500 From: Bryan Brattlof To: Judith Mendez CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Hari Nagalla , Beleswar Prasad , Andrew Davis , Markus Schneider-Pargmann , Devarsh Thakkar Subject: Re: [PATCH v7 06/11] arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors Message-ID: <20250419150451.v3jgtgp4yisou65u@bryanbrattlof.com> X-PGP-Fingerprint: D3D1 77E4 0A38 DF4D 1853 FEEF 41B9 0D5D 71D5 6CE0 References: <20250415153147.1844076-1-jm@ti.com> <20250415153147.1844076-7-jm@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: <20250415153147.1844076-7-jm@ti.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250419_080502_612756_944326D7 X-CRM114-Status: GOOD ( 21.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On April 15, 2025 thus sayeth Judith Mendez: > From: Devarsh Thakkar > > For each remote proc, reserve memory for IPC and bind the mailbox > assignments. Two memory regions are reserved for each remote processor. > The first region of 1MB of memory is used for Vring shared buffers > and the second region is used as external memory to the remote processor > for the resource table and for tracebuffer allocations. > > Signed-off-by: Devarsh Thakkar > Signed-off-by: Hari Nagalla > Signed-off-by: Judith Mendez > Acked-by: Andrew Davis > Reviewed-by: Beleswar Padhi > Reviewed-by: Jai Luthra > --- > arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 96 +++++++++++++++++++++++-- > 1 file changed, 90 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > index 1c9d95696c839..7d817b447c1d0 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts > @@ -52,6 +52,42 @@ linux,cma { > linux,cma-default; > }; > > + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99800000 0x00 0x100000>; > + no-map; > + }; > + > + c7x_0_memory_region: c7x-memory@99900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x99900000 0x00 0xf00000>; > + no-map; > + }; > + I know this has been a push for our IPC and MCU+ teams for a couple windows now, though I do want to point out that some AM62A devices (AM62A12AQMSIAMBRQ1) will not even have a C7x. It's relatively easy to cut nodes out that describe the hardware in the bootloaders, but once we start configuring them to demo something it becomes impossible to unwind that during boot. We can clam we only support the superset devices but I just wanted to make this email so I could point people to it when they inevitably ask why their parts do not work out of the box with Linux. Naked-by: Bryan Brattlof ~Bryan > + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b800000 0x00 0x100000>; > + no-map; > + }; > + > + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9b900000 0x00 0xf00000>; > + no-map; > + }; > + > + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c800000 0x00 0x100000>; > + no-map; > + }; > + > + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > + compatible = "shared-dma-pool"; > + reg = <0x00 0x9c900000 0x00 0xf00000>; > + no-map; > + }; > + > secure_tfa_ddr: tfa@9e780000 { > reg = <0x00 0x9e780000 0x00 0x80000>; > alignment = <0x1000>; > @@ -63,12 +99,6 @@ secure_ddr: optee@9e800000 { > alignment = <0x1000>; > no-map; > }; > - > - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { > - compatible = "shared-dma-pool"; > - reg = <0x00 0x9c900000 0x00 0x01e00000>; > - no-map; > - }; > }; > > opp-table { > @@ -741,3 +771,57 @@ dpi1_out: endpoint { > }; > }; > }; > + > +&mailbox0_cluster0 { > + status = "okay"; > + > + mbox_r5_0: mbox-r5-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&mailbox0_cluster1 { > + status = "okay"; > + > + mbox_c7x_0: mbox-c7x-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&mailbox0_cluster2 { > + status = "okay"; > + > + mbox_mcu_r5_0: mbox-mcu-r5-0 { > + ti,mbox-rx = <0 0 0>; > + ti,mbox-tx = <1 0 0>; > + }; > +}; > + > +&wkup_r5fss0 { > + status = "okay"; > +}; > + > +&wkup_r5fss0_core0 { > + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; > + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, > + <&wkup_r5fss0_core0_memory_region>; > +}; > + > +&mcu_r5fss0 { > + status = "okay"; > +}; > + > +&mcu_r5fss0_core0 { > + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; > + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, > + <&mcu_r5fss0_core0_memory_region>; > +}; > + > +&c7x_0 { > + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; > + memory-region = <&c7x_0_dma_memory_region>, > + <&c7x_0_memory_region>; > + status = "okay"; > +}; > -- > 2.49.0 >