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From: carlos.song@nxp.com
To: miquel.raynal@bootlin.com, Frank.Li@nxp.com,
	alexandre.belloni@bootlin.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, kernel@pengutronix.de,
	festevam@gmail.com, conor.culhane@silvaco.com
Cc: linux-i3c@lists.infradead.org, imx@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 3/3] arm64: dts: imx95: correct i3c node in imx95
Date: Mon, 21 Apr 2025 19:15:13 +0800	[thread overview]
Message-ID: <20250421111513.2651797-4-carlos.song@nxp.com> (raw)
In-Reply-To: <20250421111513.2651797-1-carlos.song@nxp.com>

From: Carlos Song <carlos.song@nxp.com>

I.MX95 I3C only need two clocks. Add "nxp,imx95-i3c" compatible string for
all I3Cs. And correct I3C2 pclk in wakeup domain to IMX95_CLK_BUSWAKEUP.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
---
- No change for V2
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 9bb26b466a06..fe28c0c46eb6 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -681,15 +681,14 @@ tpm6: pwm@42510000 {
 			};
 
 			i3c2: i3c@42520000 {
-				compatible = "silvaco,i3c-master-v1";
+				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
 				reg = <0x42520000 0x10000>;
 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <3>;
 				#size-cells = <0>;
-				clocks = <&scmi_clk IMX95_CLK_BUSAON>,
-					 <&scmi_clk IMX95_CLK_I3C2>,
+				clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
 					 <&scmi_clk IMX95_CLK_I3C2SLOW>;
-				clock-names = "pclk", "fast_clk", "slow_clk";
+				clock-names = "pclk", "fast_clk";
 				status = "disabled";
 			};
 
@@ -1266,15 +1265,14 @@ tpm2: pwm@44320000 {
 			};
 
 			i3c1: i3c@44330000 {
-				compatible = "silvaco,i3c-master-v1";
+				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
 				reg = <0x44330000 0x10000>;
 				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <3>;
 				#size-cells = <0>;
 				clocks = <&scmi_clk IMX95_CLK_BUSAON>,
-					 <&scmi_clk IMX95_CLK_I3C1>,
 					 <&scmi_clk IMX95_CLK_I3C1SLOW>;
-				clock-names = "pclk", "fast_clk", "slow_clk";
+				clock-names = "pclk", "fast_clk";
 				status = "disabled";
 			};
 
-- 
2.34.1



  parent reply	other threads:[~2025-04-21 11:11 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-21 11:15 [PATCH V2 0/3] support different number of clocks for svc i3c controller carlos.song
2025-04-21 11:15 ` [PATCH V2 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C carlos.song
2025-04-21 17:55   ` Frank Li
2025-04-21 11:15 ` [PATCH V2 2/3] i3c: master: svc: switch to bulk clk API for flexible clock support carlos.song
2025-04-21 17:58   ` Frank Li
2025-04-21 11:15 ` carlos.song [this message]
2025-04-21 18:00   ` [PATCH V2 3/3] arm64: dts: imx95: correct i3c node in imx95 Frank Li

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