[PATCH 0/3] support different numbers of clocks for svc i3c controller

[PATCH 0/3] support different numbers of clocks for svc i3c controller

[carlos.song]

From: Carlos Song <carlos.song@nxp.com>

I.MX94 and I.MX95 I3C only need two clocks and Legacy I3C needs three clocks.
So add restrictions for clock and clock-names properties for different Socs.
In driver, use the clk_bulk API to handle clocks to support different numbers
of clocks more easily. Make the code cleaner and more flexible.

Carlos Song (3):
  dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C
  i3c: master: svc: switch to bulk clk API for flexible clock support
  arm64: dts: imx95: correct i3c node in imx95

 .../bindings/i3c/silvaco,i3c-master.yaml      | 45 +++++++++--
 arch/arm64/boot/dts/freescale/imx95.dtsi      | 12 ++-
 drivers/i3c/master/svc-i3c-master.c           | 74 +++++++------------
 3 files changed, 69 insertions(+), 62 deletions(-)

-- 
2.34.1

[PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C

[carlos.song]

From: Carlos Song <carlos.song@nxp.com>

Add compatible string "nxp,imx94-i3c" and "nxp,imx95-i3c" for the i.MX94
chip and i.MX95 chip. Backward is compatible with "silvaco,i3c-master-v1".

Also i.MX94 and i.MX95 I3C only need two clocks and Legacy I3C needs
three clocks. So add restrictions for clock and clock-names properties
for different Socs.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
---
 .../bindings/i3c/silvaco,i3c-master.yaml      | 45 ++++++++++++++++---
 1 file changed, 39 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
index 4fbdcdac0aee..9255d35e2854 100644
--- a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
+++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
@@ -9,14 +9,17 @@ title: Silvaco I3C master
 maintainers:
   - Conor Culhane <conor.culhane@silvaco.com>
 
-allOf:
-  - $ref: i3c.yaml#
-
 properties:
   compatible:
-    enum:
-      - nuvoton,npcm845-i3c
-      - silvaco,i3c-master-v1
+    oneOf:
+      - enum:
+        - nuvoton,npcm845-i3c
+        - silvaco,i3c-master-v1
+      - items:
+        - enum:
+            - nxp,imx94-i3c
+            - nxp,imx95-i3c
+        - const: silvaco,i3c-master-v1
 
   reg:
     maxItems: 1
@@ -25,12 +28,14 @@ properties:
     maxItems: 1
 
   clocks:
+    minItems: 2
     items:
       - description: system clock
       - description: bus clock
       - description: other (slower) events clock
 
   clock-names:
+    minItems: 2
     items:
       - const: pclk
       - const: fast_clk
@@ -46,6 +51,34 @@ required:
   - clock-names
   - clocks
 
+allOf:
+  - $ref: i3c.yaml#
+  # Legacy Socs need three clocks
+  - if:
+      properties:
+        compatible:
+          const: silvaco,i3c-master-v1
+    then:
+      properties:
+        clocks:
+          minItems: 3
+        clock-names:
+          minItems: 3
+  # imx94 and imx95 Soc need two clocks
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - nxp,imx94-i3c
+              - nxp,imx95-i3c
+    then:
+      properties:
+        clocks:
+          maxItems: 2
+        clock-names:
+          maxItems: 2
+
 unevaluatedProperties: false
 
 examples:
-- 
2.34.1

[PATCH 2/3] i3c: master: svc: switch to bulk clk API for flexible clock support

[carlos.song]

From: Carlos Song <carlos.song@nxp.com>

Use the clk_bulk API to handle clocks, so the code can support different
numbers of clocks more easily. Make the code cleaner and more flexible.

No change in functionality.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
---
 drivers/i3c/master/svc-i3c-master.c | 74 ++++++++++-------------------
 1 file changed, 25 insertions(+), 49 deletions(-)

diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c
index 85e16de208d3..47031aa54f11 100644
--- a/drivers/i3c/master/svc-i3c-master.c
+++ b/drivers/i3c/master/svc-i3c-master.c
@@ -203,9 +203,9 @@ struct svc_i3c_drvdata {
  * @hj_work: Hot-join work
  * @ibi_work: IBI work
  * @irq: Main interrupt
- * @pclk: System clock
+ * @num_clks: I3C clock number
  * @fclk: Fast clock (bus)
- * @sclk: Slow clock (other events)
+ * @clks: I3C clock array
  * @xferqueue: Transfer queue structure
  * @xferqueue.list: List member
  * @xferqueue.cur: Current ongoing transfer
@@ -231,9 +231,9 @@ struct svc_i3c_master {
 	struct work_struct hj_work;
 	struct work_struct ibi_work;
 	int irq;
-	struct clk *pclk;
+	int num_clks;
 	struct clk *fclk;
-	struct clk *sclk;
+	struct clk_bulk_data *clks;
 	struct {
 		struct list_head list;
 		struct svc_i3c_xfer *cur;
@@ -1875,42 +1875,11 @@ static const struct i3c_master_controller_ops svc_i3c_master_ops = {
 	.set_speed = svc_i3c_master_set_speed,
 };
 
-static int svc_i3c_master_prepare_clks(struct svc_i3c_master *master)
-{
-	int ret = 0;
-
-	ret = clk_prepare_enable(master->pclk);
-	if (ret)
-		return ret;
-
-	ret = clk_prepare_enable(master->fclk);
-	if (ret) {
-		clk_disable_unprepare(master->pclk);
-		return ret;
-	}
-
-	ret = clk_prepare_enable(master->sclk);
-	if (ret) {
-		clk_disable_unprepare(master->pclk);
-		clk_disable_unprepare(master->fclk);
-		return ret;
-	}
-
-	return 0;
-}
-
-static void svc_i3c_master_unprepare_clks(struct svc_i3c_master *master)
-{
-	clk_disable_unprepare(master->pclk);
-	clk_disable_unprepare(master->fclk);
-	clk_disable_unprepare(master->sclk);
-}
-
 static int svc_i3c_master_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct svc_i3c_master *master;
-	int ret;
+	int ret, i;
 
 	master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL);
 	if (!master)
@@ -1924,27 +1893,31 @@ static int svc_i3c_master_probe(struct platform_device *pdev)
 	if (IS_ERR(master->regs))
 		return PTR_ERR(master->regs);
 
-	master->pclk = devm_clk_get(dev, "pclk");
-	if (IS_ERR(master->pclk))
-		return PTR_ERR(master->pclk);
+	master->num_clks = devm_clk_bulk_get_all(dev, &master->clks);
+	if (master->num_clks < 0)
+		return dev_err_probe(dev, ret, "can't get I3C clocks\n");
+
+	for (i = 0; i < master->num_clks; i++) {
+		if (!strcmp(master->clks[i].id, "fast_clk"))
+			break;
+	}
+
+	if (i == master->num_clks)
+		return dev_err_probe(dev, -EINVAL,
+				     "can't get I3C peripheral clock\n");
 
 	master->fclk = devm_clk_get(dev, "fast_clk");
 	if (IS_ERR(master->fclk))
 		return PTR_ERR(master->fclk);
 
-	master->sclk = devm_clk_get(dev, "slow_clk");
-	if (IS_ERR(master->sclk))
-		return PTR_ERR(master->sclk);
-
 	master->irq = platform_get_irq(pdev, 0);
 	if (master->irq < 0)
 		return master->irq;
 
 	master->dev = dev;
-
-	ret = svc_i3c_master_prepare_clks(master);
+	ret = clk_bulk_prepare_enable(master->num_clks, master->clks);
 	if (ret)
-		return ret;
+		return dev_err_probe(dev, ret, "can't enable I3C clocks\n");
 
 	INIT_WORK(&master->hj_work, svc_i3c_master_hj_work);
 	INIT_WORK(&master->ibi_work, svc_i3c_master_ibi_work);
@@ -1998,7 +1971,7 @@ static int svc_i3c_master_probe(struct platform_device *pdev)
 	pm_runtime_set_suspended(&pdev->dev);
 
 err_disable_clks:
-	svc_i3c_master_unprepare_clks(master);
+	clk_bulk_disable_unprepare(master->num_clks, master->clks);
 
 	return ret;
 }
@@ -2036,7 +2009,7 @@ static int __maybe_unused svc_i3c_runtime_suspend(struct device *dev)
 	struct svc_i3c_master *master = dev_get_drvdata(dev);
 
 	svc_i3c_save_regs(master);
-	svc_i3c_master_unprepare_clks(master);
+	clk_bulk_disable_unprepare(master->num_clks, master->clks);
 	pinctrl_pm_select_sleep_state(dev);
 
 	return 0;
@@ -2045,9 +2018,12 @@ static int __maybe_unused svc_i3c_runtime_suspend(struct device *dev)
 static int __maybe_unused svc_i3c_runtime_resume(struct device *dev)
 {
 	struct svc_i3c_master *master = dev_get_drvdata(dev);
+	int ret;
 
 	pinctrl_pm_select_default_state(dev);
-	svc_i3c_master_prepare_clks(master);
+	ret = clk_bulk_prepare_enable(master->num_clks, master->clks);
+	if (ret)
+		return ret;
 
 	svc_i3c_restore_regs(master);
 
-- 
2.34.1

[PATCH 3/3] arm64: dts: imx95: correct i3c node in imx95

[carlos.song]

From: Carlos Song <carlos.song@nxp.com>

I.MX95 I3C only need two clocks. Add "nxp,imx95-i3c" compatible string for
all I3Cs. And correct I3C2 pclk in wakeup domain to IMX95_CLK_BUSWAKEUP.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 9bb26b466a06..fe28c0c46eb6 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -681,15 +681,14 @@ tpm6: pwm@42510000 {
 			};
 
 			i3c2: i3c@42520000 {
-				compatible = "silvaco,i3c-master-v1";
+				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
 				reg = <0x42520000 0x10000>;
 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <3>;
 				#size-cells = <0>;
-				clocks = <&scmi_clk IMX95_CLK_BUSAON>,
-					 <&scmi_clk IMX95_CLK_I3C2>,
+				clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
 					 <&scmi_clk IMX95_CLK_I3C2SLOW>;
-				clock-names = "pclk", "fast_clk", "slow_clk";
+				clock-names = "pclk", "fast_clk";
 				status = "disabled";
 			};
 
@@ -1266,15 +1265,14 @@ tpm2: pwm@44320000 {
 			};
 
 			i3c1: i3c@44330000 {
-				compatible = "silvaco,i3c-master-v1";
+				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
 				reg = <0x44330000 0x10000>;
 				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 				#address-cells = <3>;
 				#size-cells = <0>;
 				clocks = <&scmi_clk IMX95_CLK_BUSAON>,
-					 <&scmi_clk IMX95_CLK_I3C1>,
 					 <&scmi_clk IMX95_CLK_I3C1SLOW>;
-				clock-names = "pclk", "fast_clk", "slow_clk";
+				clock-names = "pclk", "fast_clk";
 				status = "disabled";
 			};
 
-- 
2.34.1

Re: [PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C

[Alexandre Belloni]

On 21/04/2025 14:15:42+0800, carlos.song@nxp.com wrote:
> From: Carlos Song <carlos.song@nxp.com>
> 
> Add compatible string "nxp,imx94-i3c" and "nxp,imx95-i3c" for the i.MX94
> chip and i.MX95 chip. Backward is compatible with "silvaco,i3c-master-v1".
> 
> Also i.MX94 and i.MX95 I3C only need two clocks and Legacy I3C needs
> three clocks. So add restrictions for clock and clock-names properties
> for different Socs.
> 

My guess is that the IP still requires 3 clocks but the integration in
the SoC feeds the same clock to two of them. I'm not sure this change is
required.

> Signed-off-by: Carlos Song <carlos.song@nxp.com>
> ---
>  .../bindings/i3c/silvaco,i3c-master.yaml      | 45 ++++++++++++++++---
>  1 file changed, 39 insertions(+), 6 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> index 4fbdcdac0aee..9255d35e2854 100644
> --- a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> @@ -9,14 +9,17 @@ title: Silvaco I3C master
>  maintainers:
>    - Conor Culhane <conor.culhane@silvaco.com>
>  
> -allOf:
> -  - $ref: i3c.yaml#
> -
>  properties:
>    compatible:
> -    enum:
> -      - nuvoton,npcm845-i3c
> -      - silvaco,i3c-master-v1
> +    oneOf:
> +      - enum:
> +        - nuvoton,npcm845-i3c
> +        - silvaco,i3c-master-v1
> +      - items:
> +        - enum:
> +            - nxp,imx94-i3c
> +            - nxp,imx95-i3c
> +        - const: silvaco,i3c-master-v1
>  
>    reg:
>      maxItems: 1
> @@ -25,12 +28,14 @@ properties:
>      maxItems: 1
>  
>    clocks:
> +    minItems: 2
>      items:
>        - description: system clock
>        - description: bus clock
>        - description: other (slower) events clock
>  
>    clock-names:
> +    minItems: 2
>      items:
>        - const: pclk
>        - const: fast_clk
> @@ -46,6 +51,34 @@ required:
>    - clock-names
>    - clocks
>  
> +allOf:
> +  - $ref: i3c.yaml#
> +  # Legacy Socs need three clocks
> +  - if:
> +      properties:
> +        compatible:
> +          const: silvaco,i3c-master-v1
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 3
> +        clock-names:
> +          minItems: 3
> +  # imx94 and imx95 Soc need two clocks
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - nxp,imx94-i3c
> +              - nxp,imx95-i3c
> +    then:
> +      properties:
> +        clocks:
> +          maxItems: 2
> +        clock-names:
> +          maxItems: 2
> +
>  unevaluatedProperties: false
>  
>  examples:
> -- 
> 2.34.1
> 

-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

Re: [PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C

[Rob Herring (Arm)]

On Mon, 21 Apr 2025 14:15:42 +0800, carlos.song@nxp.com wrote:
> From: Carlos Song <carlos.song@nxp.com>
> 
> Add compatible string "nxp,imx94-i3c" and "nxp,imx95-i3c" for the i.MX94
> chip and i.MX95 chip. Backward is compatible with "silvaco,i3c-master-v1".
> 
> Also i.MX94 and i.MX95 I3C only need two clocks and Legacy I3C needs
> three clocks. So add restrictions for clock and clock-names properties
> for different Socs.
> 
> Signed-off-by: Carlos Song <carlos.song@nxp.com>
> ---
>  .../bindings/i3c/silvaco,i3c-master.yaml      | 45 ++++++++++++++++---
>  1 file changed, 39 insertions(+), 6 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml:16:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml:19:9: [warning] wrong indentation: expected 10 but found 8 (indentation)

dtschema/dtc warnings/errors:

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250421061544.2471379-2-carlos.song@nxp.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH 2/3] i3c: master: svc: switch to bulk clk API for flexible clock support

[kernel test robot]

Hi,

kernel test robot noticed the following build warnings:

[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v6.15-rc3 next-20250417]
[cannot apply to shawnguo/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/carlos-song-nxp-com/dt-bindings-i3c-silvaco-i3c-master-add-i-MX94-and-i-MX95-I3C/20250421-140716
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20250421061544.2471379-3-carlos.song%40nxp.com
patch subject: [PATCH 2/3] i3c: master: svc: switch to bulk clk API for flexible clock support
config: arm-randconfig-001-20250421 (https://download.01.org/0day-ci/archive/20250421/202504211643.FJsMtmVl-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project f819f46284f2a79790038e1f6649172789734ae8)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250421/202504211643.FJsMtmVl-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202504211643.FJsMtmVl-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/i3c/master/svc-i3c-master.c:1898:29: warning: variable 'ret' is uninitialized when used here [-Wuninitialized]
    1898 |                 return dev_err_probe(dev, ret, "can't get I3C clocks\n");
         |                                           ^~~
   drivers/i3c/master/svc-i3c-master.c:1882:9: note: initialize the variable 'ret' to silence this warning
    1882 |         int ret, i;
         |                ^
         |                 = 0
   1 warning generated.


vim +/ret +1898 drivers/i3c/master/svc-i3c-master.c

  1877	
  1878	static int svc_i3c_master_probe(struct platform_device *pdev)
  1879	{
  1880		struct device *dev = &pdev->dev;
  1881		struct svc_i3c_master *master;
  1882		int ret, i;
  1883	
  1884		master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL);
  1885		if (!master)
  1886			return -ENOMEM;
  1887	
  1888		master->drvdata = of_device_get_match_data(dev);
  1889		if (!master->drvdata)
  1890			return -EINVAL;
  1891	
  1892		master->regs = devm_platform_ioremap_resource(pdev, 0);
  1893		if (IS_ERR(master->regs))
  1894			return PTR_ERR(master->regs);
  1895	
  1896		master->num_clks = devm_clk_bulk_get_all(dev, &master->clks);
  1897		if (master->num_clks < 0)
> 1898			return dev_err_probe(dev, ret, "can't get I3C clocks\n");
  1899	
  1900		for (i = 0; i < master->num_clks; i++) {
  1901			if (!strcmp(master->clks[i].id, "fast_clk"))
  1902				break;
  1903		}
  1904	
  1905		if (i == master->num_clks)
  1906			return dev_err_probe(dev, -EINVAL,
  1907					     "can't get I3C peripheral clock\n");
  1908	
  1909		master->fclk = devm_clk_get(dev, "fast_clk");
  1910		if (IS_ERR(master->fclk))
  1911			return PTR_ERR(master->fclk);
  1912	
  1913		master->irq = platform_get_irq(pdev, 0);
  1914		if (master->irq < 0)
  1915			return master->irq;
  1916	
  1917		master->dev = dev;
  1918		ret = clk_bulk_prepare_enable(master->num_clks, master->clks);
  1919		if (ret)
  1920			return dev_err_probe(dev, ret, "can't enable I3C clocks\n");
  1921	
  1922		INIT_WORK(&master->hj_work, svc_i3c_master_hj_work);
  1923		INIT_WORK(&master->ibi_work, svc_i3c_master_ibi_work);
  1924		mutex_init(&master->lock);
  1925	
  1926		ret = devm_request_irq(dev, master->irq, svc_i3c_master_irq_handler,
  1927				       IRQF_NO_SUSPEND, "svc-i3c-irq", master);
  1928		if (ret)
  1929			goto err_disable_clks;
  1930	
  1931		master->free_slots = GENMASK(SVC_I3C_MAX_DEVS - 1, 0);
  1932	
  1933		spin_lock_init(&master->xferqueue.lock);
  1934		INIT_LIST_HEAD(&master->xferqueue.list);
  1935	
  1936		spin_lock_init(&master->ibi.lock);
  1937		master->ibi.num_slots = SVC_I3C_MAX_DEVS;
  1938		master->ibi.slots = devm_kcalloc(&pdev->dev, master->ibi.num_slots,
  1939						 sizeof(*master->ibi.slots),
  1940						 GFP_KERNEL);
  1941		if (!master->ibi.slots) {
  1942			ret = -ENOMEM;
  1943			goto err_disable_clks;
  1944		}
  1945	
  1946		platform_set_drvdata(pdev, master);
  1947	
  1948		pm_runtime_set_autosuspend_delay(&pdev->dev, SVC_I3C_PM_TIMEOUT_MS);
  1949		pm_runtime_use_autosuspend(&pdev->dev);
  1950		pm_runtime_get_noresume(&pdev->dev);
  1951		pm_runtime_set_active(&pdev->dev);
  1952		pm_runtime_enable(&pdev->dev);
  1953	
  1954		svc_i3c_master_reset(master);
  1955	
  1956		/* Register the master */
  1957		ret = i3c_master_register(&master->base, &pdev->dev,
  1958					  &svc_i3c_master_ops, false);
  1959		if (ret)
  1960			goto rpm_disable;
  1961	
  1962		pm_runtime_mark_last_busy(&pdev->dev);
  1963		pm_runtime_put_autosuspend(&pdev->dev);
  1964	
  1965		return 0;
  1966	
  1967	rpm_disable:
  1968		pm_runtime_dont_use_autosuspend(&pdev->dev);
  1969		pm_runtime_put_noidle(&pdev->dev);
  1970		pm_runtime_disable(&pdev->dev);
  1971		pm_runtime_set_suspended(&pdev->dev);
  1972	
  1973	err_disable_clks:
  1974		clk_bulk_disable_unprepare(master->num_clks, master->clks);
  1975	
  1976		return ret;
  1977	}
  1978	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C

[Carlos Song]

> -----Original Message-----
> From: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Sent: Monday, April 21, 2025 3:23 PM
> To: Carlos Song <carlos.song@nxp.com>
> Cc: miquel.raynal@bootlin.com; Frank Li <frank.li@nxp.com>;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de;
> festevam@gmail.com; conor.culhane@silvaco.com;
> linux-i3c@lists.infradead.org; imx@lists.linux.dev; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94
> and i.MX95 I3C
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 21/04/2025 14:15:42+0800, carlos.song@nxp.com wrote:
> > From: Carlos Song <carlos.song@nxp.com>
> >
> > Add compatible string "nxp,imx94-i3c" and "nxp,imx95-i3c" for the
> > i.MX94 chip and i.MX95 chip. Backward is compatible with
> "silvaco,i3c-master-v1".
> >
> > Also i.MX94 and i.MX95 I3C only need two clocks and Legacy I3C needs
> > three clocks. So add restrictions for clock and clock-names properties
> > for different Socs.
> >
> 
> My guess is that the IP still requires 3 clocks but the integration in the SoC
> feeds the same clock to two of them. I'm not sure this change is required.
> 

Hi,

Thank you for your suggestion.

I3C IP in imx94/imx95 is improved based on svc i3c, don't change any register and logic.
One difference from the clk number. IMX94/IMX95 I3C IP removed slow clk input which is not used really.
I take an example of I3C2 in wakeup domain.
In IMX94/95 soc integration connect BUSWAKEUP to pclk and CLK_I3C2SLOW to fast_clk. They don't remove CLK_I3C2 from CCM,
Keep it here. So I also can configure 3 clocks in dts. Nothing will be affected.  Also CLK_I3C2 won't have any effect. 

In legacy soc, soc integration connect BUSWAKEUP to pclk ,CLK_I3C2 to fast_clk, CLK_I3C2SLOW to slow_clk.

I draw a picture to help understand this.
 
For imx94/imx95:
                                                      
    ┌────────────────────────────────────────────┐    
    │                                            │    
    │          ┌───────┐     soc                 │    
    │          │95/943 │  integration            │    
    │          │ i3c   │                         │    
    │          └─┬───┬─┘                         │    
    │        pclk│   │fclk                       │    
    │     ┌──────►   ◄───────────┐               │    
    │     │                      │               │    
    │     │           ▲          │               │    
    │     │BUSWAKEUP  │CLK_I3C2  │CLK_I3C2SLOW   │    
    │    ┌┼───────────┼──────────┼┐              │    
    │    │                        │              │    
    │    │                        │              │    
    │    │      CCM               │              │    
    │    │                        │              │    
    │    │                        │              │    
    │    └────────────────────────┘              │    
    └────────────────────────────────────────────┘    
                                                                                                                                                             
For legacy svc I3C:
                                                
 ┌────────────────────────────────────────────┐ 
 │                                            │ 
 │          ┌───────┐     soc                 │ 
 │          │ SVC   │  integration            │ 
 │          │ i3c   │◄────────┐               │ 
 │          └─┬───┬─┘         │               │ 
 │        pclk│   ▲fclk       │sclk           │ 
 │     ┌──────►   │           │               │ 
 │     │          │           │               │ 
 │     │          │           │               │ 
 │     │BUSWAKEUP │ CLK_I3C2  │CLK_I3C2SLOW   │ 
 │    ┌┴──────────┴───────────┼┐              │ 
 │    │                        │              │ 
 │    │                        │              │ 
 │    │      CCM               │              │ 
 │    │                        │              │ 
 │    │                        │              │ 
 │    └────────────────────────┘              │ 
 └────────────────────────────────────────────┘ 
                                                

> > Signed-off-by: Carlos Song <carlos.song@nxp.com>
> > ---
> >  .../bindings/i3c/silvaco,i3c-master.yaml      | 45 ++++++++++++++++---
> >  1 file changed, 39 insertions(+), 6 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > index 4fbdcdac0aee..9255d35e2854 100644
> > --- a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > @@ -9,14 +9,17 @@ title: Silvaco I3C master
> >  maintainers:
> >    - Conor Culhane <conor.culhane@silvaco.com>
> >
> > -allOf:
> > -  - $ref: i3c.yaml#
> > -
> >  properties:
> >    compatible:
> > -    enum:
> > -      - nuvoton,npcm845-i3c
> > -      - silvaco,i3c-master-v1
> > +    oneOf:
> > +      - enum:
> > +        - nuvoton,npcm845-i3c
> > +        - silvaco,i3c-master-v1
> > +      - items:
> > +        - enum:
> > +            - nxp,imx94-i3c
> > +            - nxp,imx95-i3c
> > +        - const: silvaco,i3c-master-v1
> >
> >    reg:
> >      maxItems: 1
> > @@ -25,12 +28,14 @@ properties:
> >      maxItems: 1
> >
> >    clocks:
> > +    minItems: 2
> >      items:
> >        - description: system clock
> >        - description: bus clock
> >        - description: other (slower) events clock
> >
> >    clock-names:
> > +    minItems: 2
> >      items:
> >        - const: pclk
> >        - const: fast_clk
> > @@ -46,6 +51,34 @@ required:
> >    - clock-names
> >    - clocks
> >
> > +allOf:
> > +  - $ref: i3c.yaml#
> > +  # Legacy Socs need three clocks
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          const: silvaco,i3c-master-v1
> > +    then:
> > +      properties:
> > +        clocks:
> > +          minItems: 3
> > +        clock-names:
> > +          minItems: 3
> > +  # imx94 and imx95 Soc need two clocks
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - nxp,imx94-i3c
> > +              - nxp,imx95-i3c
> > +    then:
> > +      properties:
> > +        clocks:
> > +          maxItems: 2
> > +        clock-names:
> > +          maxItems: 2
> > +
> >  unevaluatedProperties: false
> >
> >  examples:
> > --
> > 2.34.1
> >
> 
> --
> Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel
> engineering
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbootlin.
> com%2F&data=05%7C02%7Ccarlos.song%40nxp.com%7C04022114e14642d6
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