Re: [PATCH] PCI: rockchip: Fix order of rockchip_pci_core_rsts

[Bjorn Helgaas <helgaas@kernel.org>]

On Fri, Mar 28, 2025 at 06:58:22PM +0800, Jensen Huang wrote:
> The order of rockchip_pci_core_rsts follows the previous comments suggesting
> to avoid reordering. However, reset_control_bulk_deassert() applies resets in
> reverse, which may lead to the link downgrading to 2.5 GT/s.
> 
> This patch restores the deassert order and comments for core_rsts, introduced in
> commit 58c6990c5ee7 ("PCI: rockchip: Improve the deassert sequence of four reset pins").
> 
> Tested on NanoPC-T4 with Samsung 970 Pro.
> 
> Fixes: 18715931a5c0 ("PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function")
> Signed-off-by: Jensen Huang <jensenhuang@friendlyarm.com>

Thanks for the fix!  It looks like 18715931a5c0 appeared in v6.14, so
we should probably add a stable tag so it gets backported there?

> ---
>  drivers/pci/controller/pcie-rockchip.h | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
> index 11def598534b..4f63a03d535c 100644
> --- a/drivers/pci/controller/pcie-rockchip.h
> +++ b/drivers/pci/controller/pcie-rockchip.h
> @@ -320,11 +320,15 @@ static const char * const rockchip_pci_pm_rsts[] = {
>  	"aclk",
>  };
>  
> +/*
> + * Please don't reorder the deassert sequence of the following
> + * four reset pins.
> + */
>  static const char * const rockchip_pci_core_rsts[] = {
> -	"mgmt-sticky",
> -	"core",
> -	"mgmt",
>  	"pipe",
> +	"mgmt",
> +	"core",
> +	"mgmt-sticky",
>  };
>  
>  struct rockchip_pcie {
> -- 
> 2.49.0-1
>