From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 387C2C3ABAA for ; Fri, 2 May 2025 15:49:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2nB2XrYs3/yr4cfRNXfAXTu6rjkWvNQLgoMjODS48vE=; b=w0hHVYpqCmU0p7EHxDRDU+0xHT g2BLeJ1Z/kBLriblvJHy+NomusiMebgu1lb/r0eBFrXHGRySpky2i4O/wq4m4CB07abD+zhn2yT/E onn5fbjcPrgv+fZdRka8wtFFA/pSNWb/ahQsTB+WsCoRkP60ADpIjEdDN7mSBj0uSMH3La5qXqywQ sgDULxVj7hD1WrpMFYCT5Ldeqy6vzYTH/Rwyur+i7yXaxk2QVOJmmQuwabjVOmT/mSkzPAQToTjWu qwu10J7WAu2zQjLHwyW0a+j4dTqIHrxHKKMw18idsGxmhyccB1bkl/D1rUb0t3gaA5Ls+6phz8TB+ Q4XSbM0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uAsds-00000002OGj-2UvO; Fri, 02 May 2025 15:49:36 +0000 Received: from lelvem-ot02.ext.ti.com ([198.47.23.235]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uAsUT-00000002Mar-2299 for linux-arm-kernel@lists.infradead.org; Fri, 02 May 2025 15:39:54 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 542FdoZW439445 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 2 May 2025 10:39:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1746200390; bh=2nB2XrYs3/yr4cfRNXfAXTu6rjkWvNQLgoMjODS48vE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wRNe5uexbI81oOjLvEiCm+EvwFhEtPlo+RfUc8IcZWltF5TNVNpZDnd7U7P7jO+xc 5YuUAikpyfPvSIZtB7ibF66nESUeh0nBpdkCCVRznKPGwGuc4KFjYXuLwAK3ED8gRV 991MUrISVjm/xnAB8exf4tWRudRUd45QiZ75oxJw= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 542FdoWS042368 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 2 May 2025 10:39:50 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 2 May 2025 10:39:49 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 2 May 2025 10:39:49 -0500 Received: from localhost (ula0502350.dhcp.ti.com [172.24.227.38]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 542FdnGv102849; Fri, 2 May 2025 10:39:49 -0500 From: Paresh Bhagat To: , , CC: , , , , , , , , , Subject: [PATCH v2 2/3] arm64: dts: ti: Add pinctrl entries for AM62D2 family of SoCs Date: Fri, 2 May 2025 21:09:14 +0530 Message-ID: <20250502153915.734932-3-p-bhagat@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250502153915.734932-1-p-bhagat@ti.com> References: <20250502153915.734932-1-p-bhagat@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250502_083953_561911_73CD0AA8 X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update k3-pinctrl file to include pin definitions for AM62D2 family of SoCs. Signed-off-by: Paresh Bhagat --- arch/arm64/boot/dts/ti/k3-pinctrl.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h index cac7cccc1112..0cf57179c974 100644 --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h @@ -63,6 +63,9 @@ #define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62DX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62DX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) -- 2.34.1