From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DD152C3ABAA for ; Fri, 2 May 2025 16:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:CC:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=aIIlIfkYSdL5Az0Twy2pxwPEBxkLM4iI1QPUDLeCG60=; b=0ap9NvgNQWf7298us451wuKK76 GsQzSsH9/2J1RfrZ7ujQRQQIL5K4yQkuF8jZ9aWRIhNWzdMrTLKdZC/eFSgJ+IDfZzIbq67C0XOgG 0tt6ceIHij58AhsOh+4obj8Q+Dcx+v7aCa1tJj+FItS+yHmL2BEdsqZji/1wQTRrbfsH9nZD5OThE JXB8gORuuVLqFVhATwFtjPg/u1cNmcZOFlUp/Z+/RFfEYF06jDzBjSBZK39QS+nJGr6oxuXbaMTTK +wh1eKAdGvezhRYmS2LpzTaze7ZBlz67BuF/iRImlva9H6NlCXhWgJlQBuyfjp7ZqJEwhZaO12/1U 5brA+gKw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uAsxC-00000002S6P-06l4; Fri, 02 May 2025 16:09:34 +0000 Received: from lelvem-ot01.ext.ti.com ([198.47.23.234]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uAstW-00000002RNt-0MET for linux-arm-kernel@lists.infradead.org; Fri, 02 May 2025 16:05:47 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 542G5fEZ3900136 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 2 May 2025 11:05:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1746201942; bh=aIIlIfkYSdL5Az0Twy2pxwPEBxkLM4iI1QPUDLeCG60=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=BAtiocXKCBJG7TvNW41q6P3Nk4zNUXGQ/cFhwRZqIOI0LqSqloen/q91Q3sr9EwB7 2+wwQ+TeI5Qbk2o1lHvYC+H/rx7Q1W4SR0B4ZT7gPraKSBTKpncTqhvw3hNxmnMuMo Kbo5u1nfSeX3MHuc0W2eXI68BNL5NfdNAua8SjZc= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 542G5fbl084000 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 2 May 2025 11:05:41 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 2 May 2025 11:05:41 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 2 May 2025 11:05:41 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 542G5fc0090643; Fri, 2 May 2025 11:05:41 -0500 Date: Fri, 2 May 2025 11:05:41 -0500 From: Nishanth Menon To: Paresh Bhagat CC: , , , , , , , , , , , Subject: Re: [PATCH v2 1/3] dt-bindings: arm: ti: Add bindings for AM62D2 SoC Message-ID: <20250502160541.azhzbnmghrkory7h@cleaver> References: <20250502153915.734932-1-p-bhagat@ti.com> <20250502153915.734932-2-p-bhagat@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250502153915.734932-2-p-bhagat@ti.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250502_090546_217348_418E0FC8 X-CRM114-Status: GOOD ( 21.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 21:09-20250502, Paresh Bhagat wrote: > The AM62D2 SoC belongs to the K3 Multicore SoC architecture with DSP core > targeted for applications needing high-performance Digital Signal > Processing. It is used in applications like automotive audio systems, > professional sound equipment, radar and radio for aerospace, sonar in > marine devices, and ultrasound in medical imaging. It also supports > precise signal analysis in test and measurement tools. > > Some highlights of AM62D2 SoC are: > > * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single > core variants are provided in the same package to allow HW compatible > designs. > * One Device manager Cortex-R5F for system power and resource management, > and one Cortex-R5F for Functional Safety or general-purpose usage. > * DSP with Matrix Multiplication Accelerator(MMA) (up to 2 TOPS) based on > single core C7x. > * 3x Multichannel Audio Serial Ports (McASP) Up to 4/6/16 Serial Data Pins > which can Transmit and Receive Clocks up to 50MHz, with multi-channel I2S > and TDM Audio inputs and outputs. > * Integrated Giga-bit Ethernet switch supporting up to a total of two > external ports with TSN capable to enable audio networking features such > as, Ethernet Audio Video Bridging (eAVB) and Dante. > * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, OSPI memory > controller, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other > peripherals. > * Dedicated Centralized Hardware Security Module with support for secure > boot, debug security and crypto acceleration and trusted execution > environment. > * One 32 bit DDR Subsystem that supports LPDDR4, DDR4 memory types. > * Low power mode support: Partial IO support for CAN/GPIO/UART wakeup. > > This adds dt bindings for TI's AM62D2 family of devices. > > More details about the SoCs can be found in the Technical Reference Manual: > https://www.ti.com/lit/pdf/sprujd4 > > Signed-off-by: Paresh Bhagat Looking at the board patch in the series, this is am62p5 ? what is the difference? If there is a difference, why is there no dtsi file for am62d? > --- > Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml > index a6d9fd0bcaba..bac821d63cf1 100644 > --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml > +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml > @@ -31,6 +31,12 @@ properties: > - const: phytec,am62a-phycore-som > - const: ti,am62a7 > > + - description: K3 AM62D2 SoC and Boards > + items: > + - enum: > + - ti,am62d2-evm > + - const: ti,am62d2 > + > - description: K3 AM62P5 SoC and Boards > items: > - enum: > -- > 2.34.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D