From: Will Deacon <will@kernel.org>
To: Connor Abbott <cwabbott0@gmail.com>
Cc: Rob Clark <robdclark@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>, Sean Paul <sean@poorly.run>,
Konrad Dybcio <konradybcio@kernel.org>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Marijn Suijten <marijn.suijten@somainline.org>,
iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
freedreno@lists.freedesktop.org
Subject: Re: [PATCH v5 1/5] iommu/arm-smmu: Save additional information on context fault
Date: Tue, 6 May 2025 12:32:46 +0100 [thread overview]
Message-ID: <20250506113246.GA723@willie-the-truck> (raw)
In-Reply-To: <20250319-msm-gpu-fault-fixes-next-v5-1-97561209dd8c@gmail.com>
On Wed, Mar 19, 2025 at 10:44:00AM -0400, Connor Abbott wrote:
> This will be used by drm/msm for GPU page faults, replacing the manual
> register reading it does.
>
> Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
> Reviewed-by: Rob Clark <robdclark@gmail.com>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c | 6 ++--
> drivers/iommu/arm/arm-smmu/arm-smmu.c | 35 ++++++++++++++----------
> drivers/iommu/arm/arm-smmu/arm-smmu.h | 7 +++--
> 3 files changed, 29 insertions(+), 19 deletions(-)
[...]
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> index ade4684c14c9b2724a71e2457288dbfaf7562c83..a02078eb968b81a35c1c086ed7007ea2a453ef94 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> @@ -405,13 +405,20 @@ static const struct iommu_flush_ops arm_smmu_s2_tlb_ops_v1 = {
> };
>
>
> -void arm_smmu_read_context_fault_info(struct arm_smmu_device *smmu, int idx,
> +void arm_smmu_read_context_fault_info(struct arm_smmu_domain *smmu_domain,
> struct arm_smmu_context_fault_info *cfi)
> {
> + struct arm_smmu_device *smmu = smmu_domain->smmu;
> + int idx = smmu_domain->cfg.cbndx;
> +
> cfi->iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR);
> + cfi->ttbr0 = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_TTBR0);
> cfi->fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR);
> - cfi->fsynr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSYNR0);
> + cfi->fsynr0 = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSYNR0);
> + cfi->fsynr1 = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSYNR1);
> cfi->cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx));
> + if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1)
> + cfi->contextidr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_CONTEXTIDR);
I think this leaves 'cfi->contextidr' uninitialised for stage-2 domains.
We should probably either zero it here or just zero-initialise the whole
'cfi' struct in arm_smmu_context_fault() with a:
struct arm_smmu_context_fault_info cfi = {};
line.
Will
next prev parent reply other threads:[~2025-05-06 14:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-19 14:43 [PATCH v5 0/5] iommu/arm-smmu, drm/msm: Fixes for stall-on-fault Connor Abbott
2025-03-19 14:44 ` [PATCH v5 1/5] iommu/arm-smmu: Save additional information on context fault Connor Abbott
2025-05-06 11:32 ` Will Deacon [this message]
2025-05-06 16:26 ` Connor Abbott
2025-03-19 14:44 ` [PATCH v5 2/5] iommu/arm-smmu-qcom: Don't read fault registers directly Connor Abbott
2025-03-19 14:44 ` [PATCH v5 3/5] iommu/arm-smmu: Fix spurious interrupts with stall-on-fault Connor Abbott
2025-05-06 12:24 ` Will Deacon
2025-05-06 14:08 ` Connor Abbott
2025-05-06 14:53 ` Will Deacon
2025-05-06 15:18 ` Connor Abbott
2025-05-15 14:46 ` Will Deacon
2025-05-15 17:13 ` Connor Abbott
2025-03-19 14:44 ` [PATCH v5 4/5] iommu/arm-smmu-qcom: Make set_stall work when the device is on Connor Abbott
2025-03-19 14:44 ` [PATCH v5 5/5] drm/msm: Temporarily disable stall-on-fault after a page fault Connor Abbott
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