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From: "Pali Rohár" <pali@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	heiko@sntech.de, manivannan.sadhasivam@linaro.org,
	yue.wang@Amlogic.com, neil.armstrong@linaro.org, robh@kernel.org,
	jingoohan1@gmail.com, khilman@baylibre.com, jbrunet@baylibre.com,
	martin.blumenstingl@googlemail.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v3 3/3] PCI: aardvark: Remove redundant MPS configuration
Date: Tue, 6 May 2025 19:41:10 +0200	[thread overview]
Message-ID: <20250506174110.63ayeqc4scmwjj6e@pali> (raw)
In-Reply-To: <20250506173439.292460-4-18255117159@163.com>

On Wednesday 07 May 2025 01:34:39 Hans Zhang wrote:
> The Aardvark PCIe controller enforces a fixed 512B payload size via
> PCI_EXP_DEVCTL_PAYLOAD_512B, overriding hardware capabilities and PCIe
> core negotiations.
> 
> Remove explicit MPS overrides (PCI_EXP_DEVCTL_PAYLOAD and
> PCI_EXP_DEVCTL_PAYLOAD_512B). MPS is now determined by the PCI core
> during device initialization, leveraging root port configurations and
> device-specific capabilities.
> 
> Aligning Aardvark with the unified MPS framework ensures consistency,
> avoids artificial constraints, and allows the hardware to operate at
> its maximum supported payload size while adhering to PCIe specifications.
> 
> Signed-off-by: Hans Zhang <18255117159@163.com>
> ---
>  drivers/pci/controller/pci-aardvark.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index a29796cce420..d8852892994a 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -549,9 +549,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
>  	reg = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);
>  	reg &= ~PCI_EXP_DEVCTL_RELAX_EN;
>  	reg &= ~PCI_EXP_DEVCTL_NOSNOOP_EN;
> -	reg &= ~PCI_EXP_DEVCTL_PAYLOAD;
>  	reg &= ~PCI_EXP_DEVCTL_READRQ;
> -	reg |= PCI_EXP_DEVCTL_PAYLOAD_512B;
>  	reg |= PCI_EXP_DEVCTL_READRQ_512B;
>  	advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);
>  
> -- 
> 2.25.1
> 

Please do not remove this code. It is required part of the
initialization of the aardvark PCI controller at the specific phase,
as defined in the Armada 3700 Functional Specification.

There were reported more issues with those Armada PCIe controllers for
which were already sent patches to mailing list in last 5 years. But
unfortunately not all fixes were taken / applied yet.


  reply	other threads:[~2025-05-06 22:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06 17:34 [PATCH v3 0/3] Configure root port MPS during host probing Hans Zhang
2025-05-06 17:34 ` [PATCH v3 1/3] PCI: " Hans Zhang
2025-05-07  7:38   ` Niklas Cassel
2025-05-07 14:55     ` Hans Zhang
2025-05-06 17:34 ` [PATCH v3 2/3] PCI: dwc: Remove redundant MPS configuration Hans Zhang
2025-05-06 17:34 ` [PATCH v3 3/3] PCI: aardvark: " Hans Zhang
2025-05-06 17:41   ` Pali Rohár [this message]
2025-05-07 15:03     ` Hans Zhang
2025-05-07 15:06       ` Hans Zhang
2025-05-07 16:36         ` Pali Rohár
2025-05-07 16:47           ` Hans Zhang
2025-05-08 11:53             ` Niklas Cassel
2025-05-08 16:12               ` Hans Zhang
2025-05-08 16:27                 ` Pali Rohár
2025-05-09  7:08           ` Manivannan Sadhasivam
2025-05-09 12:03             ` Hans Zhang
2025-05-09 16:00             ` Pali Rohár
2025-05-15 12:03               ` Manivannan Sadhasivam

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