[PATCH 0/3] clocksource/drivers/timer-vt8500: clean up and add watchdog function

[PATCH 0/3] clocksource/drivers/timer-vt8500: clean up and add watchdog function

[Alexey Charkov]

Add named defines for all registers and bits in timer-vt8500.
Move the system events timer from channel 0 to channel 1 when enough
information is provided by the device tree (i.e. more than one IRQ).
Use channel 0 for the system watchdog

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
Alexey Charkov (3):
      clocksource/drivers/timer-vt8500: Add defines for magic constants
      clocksource/drivers/timer-vt8500: Add watchdog functionality
      ARM: dts: vt8500: list all four timer interrupts

 arch/arm/boot/dts/vt8500/vt8500.dtsi |   2 +-
 arch/arm/boot/dts/vt8500/wm8505.dtsi |   2 +-
 arch/arm/boot/dts/vt8500/wm8650.dtsi |   2 +-
 arch/arm/boot/dts/vt8500/wm8750.dtsi |   2 +-
 arch/arm/boot/dts/vt8500/wm8850.dtsi |   2 +-
 drivers/clocksource/Kconfig          |   6 +-
 drivers/clocksource/timer-vt8500.c   | 115 +++++++++++++++++++++++++++--------
 7 files changed, 101 insertions(+), 30 deletions(-)
---
base-commit: 0a00723f4c2d0b273edd0737f236f103164a08eb
change-id: 20250506-vt8500-timer-updates-44a0d22cd720

Best regards,
-- 
Alexey Charkov <alchark@gmail.com>

[PATCH 1/3] clocksource/drivers/timer-vt8500: Add defines for magic constants

[Alexey Charkov]

Add defines for all known registers and their bits to make the code more
self-explanatory. While at that, replace _VAL suffixes with more
intuitive _REG suffixes on register offsets.

No functional changes.

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
 drivers/clocksource/timer-vt8500.c | 65 ++++++++++++++++++++++++--------------
 1 file changed, 42 insertions(+), 23 deletions(-)

diff --git a/drivers/clocksource/timer-vt8500.c b/drivers/clocksource/timer-vt8500.c
index a469b1b5f97233202bf01298b9f612e07026c20c..9f28f30dcaf83ab4e9c89952175b0d4c75bd6b40 100644
--- a/drivers/clocksource/timer-vt8500.c
+++ b/drivers/clocksource/timer-vt8500.c
@@ -24,15 +24,31 @@
 
 #define VT8500_TIMER_OFFSET	0x0100
 #define VT8500_TIMER_HZ		3000000
-#define TIMER_MATCH_VAL		0x0000
-#define TIMER_COUNT_VAL		0x0010
-#define TIMER_STATUS_VAL	0x0014
-#define TIMER_IER_VAL		0x001c		/* interrupt enable */
-#define TIMER_CTRL_VAL		0x0020
-#define TIMER_AS_VAL		0x0024		/* access status */
-#define TIMER_COUNT_R_ACTIVE	(1 << 5)	/* not ready for read */
-#define TIMER_COUNT_W_ACTIVE	(1 << 4)	/* not ready for write */
-#define TIMER_MATCH_W_ACTIVE	(1 << 0)	/* not ready for write */
+
+#define TIMER_MATCH_REG(x)	(4 * (x))
+#define TIMER_COUNT_REG		0x0010	 /* clocksource counter */
+
+#define TIMER_STATUS_REG	0x0014
+#define TIMER_STATUS_MATCH(x)	BIT((x))
+#define TIMER_STATUS_CLEARALL	(TIMER_STATUS_MATCH(0) | \
+				 TIMER_STATUS_MATCH(1) | \
+				 TIMER_STATUS_MATCH(2) | \
+				 TIMER_STATUS_MATCH(3))
+
+#define TIMER_WATCHDOG_EN_REG	0x0018
+#define TIMER_WD_EN		BIT(0)
+
+#define TIMER_INT_EN_REG	0x001c	 /* interrupt enable */
+#define TIMER_INT_EN_MATCH(x)	BIT((x))
+
+#define TIMER_CTRL_REG		0x0020
+#define TIMER_CTRL_ENABLE	BIT(0)	 /* enable clocksource counter */
+#define TIMER_CTRL_RD_REQ	BIT(1)	 /* request counter read */
+
+#define TIMER_ACC_STS_REG	0x0024	 /* access status */
+#define TIMER_ACC_WR_MATCH(x)	BIT((x)) /* writing Match (x) value */
+#define TIMER_ACC_WR_COUNTER	BIT(4)	 /* writing clocksource counter */
+#define TIMER_ACC_RD_COUNTER	BIT(5)	 /* reading clocksource counter */
 
 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
 
@@ -43,11 +59,12 @@ static void __iomem *regbase;
 static u64 vt8500_timer_read(struct clocksource *cs)
 {
 	int loops = msecs_to_loops(10);
-	writel(3, regbase + TIMER_CTRL_VAL);
-	while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
-						&& --loops)
+
+	writel(TIMER_CTRL_ENABLE | TIMER_CTRL_RD_REQ, regbase + TIMER_CTRL_REG);
+	while (readl(regbase + TIMER_ACC_STS_REG) & TIMER_ACC_RD_COUNTER
+	     && --loops)
 		cpu_relax();
-	return readl(regbase + TIMER_COUNT_VAL);
+	return readl(regbase + TIMER_COUNT_REG);
 }
 
 static struct clocksource clocksource = {
@@ -63,23 +80,25 @@ static int vt8500_timer_set_next_event(unsigned long cycles,
 {
 	int loops = msecs_to_loops(10);
 	u64 alarm = clocksource.read(&clocksource) + cycles;
-	while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
-						&& --loops)
+
+	while (readl(regbase + TIMER_ACC_STS_REG) & TIMER_ACC_WR_MATCH(0)
+	       && --loops)
 		cpu_relax();
-	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
+	writel((unsigned long)alarm, regbase + TIMER_MATCH_REG(0));
 
 	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
 		return -ETIME;
 
-	writel(1, regbase + TIMER_IER_VAL);
+	writel(TIMER_INT_EN_MATCH(0), regbase + TIMER_INT_EN_REG);
 
 	return 0;
 }
 
 static int vt8500_shutdown(struct clock_event_device *evt)
 {
-	writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
-	writel(0, regbase + TIMER_IER_VAL);
+	writel(readl(regbase + TIMER_CTRL_REG) | TIMER_CTRL_ENABLE,
+	       regbase + TIMER_CTRL_REG);
+	writel(0, regbase + TIMER_INT_EN_REG);
 	return 0;
 }
 
@@ -95,7 +114,7 @@ static struct clock_event_device clockevent = {
 static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
 {
 	struct clock_event_device *evt = dev_id;
-	writel(0xf, regbase + TIMER_STATUS_VAL);
+	writel(TIMER_STATUS_CLEARALL, regbase + TIMER_STATUS_REG);
 	evt->event_handler(evt);
 
 	return IRQ_HANDLED;
@@ -119,9 +138,9 @@ static int __init vt8500_timer_init(struct device_node *np)
 		return -EINVAL;
 	}
 
-	writel(1, regbase + TIMER_CTRL_VAL);
-	writel(0xf, regbase + TIMER_STATUS_VAL);
-	writel(~0, regbase + TIMER_MATCH_VAL);
+	writel(TIMER_CTRL_ENABLE, regbase + TIMER_CTRL_REG);
+	writel(TIMER_STATUS_CLEARALL, regbase + TIMER_STATUS_REG);
+	writel(~0, regbase + TIMER_MATCH_REG(0));
 
 	ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
 	if (ret) {

-- 
2.49.0

[PATCH 2/3] clocksource/drivers/timer-vt8500: Add watchdog functionality

[Alexey Charkov]

VIA/WonderMedia system timer IP can generate a watchdog reset when its
clocksource counter matches the value in the match register 0 and
watchdog function is enabled. For this to work, obvously the clock event
device must use a different match register (1~3) and respective interrupt.

Check if at least two interrupts are provided by the device tree, then use
match register 1 for system clock events and match register 0 for watchdog
respectively.

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
 drivers/clocksource/Kconfig        |  6 +++-
 drivers/clocksource/timer-vt8500.c | 58 ++++++++++++++++++++++++++++++++++----
 2 files changed, 58 insertions(+), 6 deletions(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 487c8525996724fbf9c6e9726dabb478d86513b9..e4f9aade058af1adc279274c6c711658f9f4cd0a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -177,9 +177,13 @@ config TEGRA186_TIMER
 
 config VT8500_TIMER
 	bool "VT8500 timer driver" if COMPILE_TEST
+	depends on ARCH_VT8500 || COMPILE_TEST
 	depends on HAS_IOMEM
+	select WATCHDOG
+	select WATCHDOG_CORE
 	help
-	  Enables support for the VT8500 driver.
+	  Enables support for the timer and watchdog found on
+	  VIA/WonderMedia VT8500 and related SoCs.
 
 config NPCM7XX_TIMER
 	bool "NPCM7xx timer driver" if COMPILE_TEST
diff --git a/drivers/clocksource/timer-vt8500.c b/drivers/clocksource/timer-vt8500.c
index 9f28f30dcaf83ab4e9c89952175b0d4c75bd6b40..4e44133d455e1e9e016ddb6dfddca422295ab15c 100644
--- a/drivers/clocksource/timer-vt8500.c
+++ b/drivers/clocksource/timer-vt8500.c
@@ -22,6 +22,8 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 
+#include <linux/watchdog.h>
+
 #define VT8500_TIMER_OFFSET	0x0100
 #define VT8500_TIMER_HZ		3000000
 
@@ -55,6 +57,9 @@
 #define MIN_OSCR_DELTA		16
 
 static void __iomem *regbase;
+static unsigned int sys_timer_ch;	 /* which match register to use
+					  * for the system timer
+					  */
 
 static u64 vt8500_timer_read(struct clocksource *cs)
 {
@@ -81,15 +86,15 @@ static int vt8500_timer_set_next_event(unsigned long cycles,
 	int loops = msecs_to_loops(10);
 	u64 alarm = clocksource.read(&clocksource) + cycles;
 
-	while (readl(regbase + TIMER_ACC_STS_REG) & TIMER_ACC_WR_MATCH(0)
+	while (readl(regbase + TIMER_ACC_STS_REG) & TIMER_ACC_WR_MATCH(sys_timer_ch)
 	       && --loops)
 		cpu_relax();
-	writel((unsigned long)alarm, regbase + TIMER_MATCH_REG(0));
+	writel((unsigned long)alarm, regbase + TIMER_MATCH_REG(sys_timer_ch));
 
 	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
 		return -ETIME;
 
-	writel(TIMER_INT_EN_MATCH(0), regbase + TIMER_INT_EN_REG);
+	writel(TIMER_INT_EN_MATCH(sys_timer_ch), regbase + TIMER_INT_EN_REG);
 
 	return 0;
 }
@@ -120,6 +125,40 @@ static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+static int vt8500_watchdog_start(struct watchdog_device *wdd)
+{
+	u64 cycles = wdd->timeout * VT8500_TIMER_HZ;
+	u64 deadline = clocksource.read(&clocksource) + cycles;
+
+	writel((u32)deadline, regbase + TIMER_MATCH_REG(0));
+	writel(TIMER_WD_EN, regbase + TIMER_WATCHDOG_EN_REG);
+	return 0;
+}
+
+static int vt8500_watchdog_stop(struct watchdog_device *wdd)
+{
+	writel(0, regbase + TIMER_WATCHDOG_EN_REG);
+	return 0;
+}
+
+static const struct watchdog_ops vt8500_watchdog_ops = {
+	.start			= vt8500_watchdog_start,
+	.stop			= vt8500_watchdog_stop,
+};
+
+static const struct watchdog_info vt8500_watchdog_info = {
+	.identity		= "VIA VT8500 watchdog",
+	.options		= WDIOF_MAGICCLOSE |
+				  WDIOF_KEEPALIVEPING |
+				  WDIOF_SETTIMEOUT,
+};
+
+static struct watchdog_device vt8500_watchdog_device = {
+	.ops			= &vt8500_watchdog_ops,
+	.info			= &vt8500_watchdog_info,
+	.max_hw_heartbeat_ms	= -1UL / (VT8500_TIMER_HZ / 1000),
+};
+
 static int __init vt8500_timer_init(struct device_node *np)
 {
 	int timer_irq, ret;
@@ -131,7 +170,9 @@ static int __init vt8500_timer_init(struct device_node *np)
 		return -ENXIO;
 	}
 
-	timer_irq = irq_of_parse_and_map(np, 0);
+	sys_timer_ch = of_irq_count(np) > 1 ? 1 : 0;
+
+	timer_irq = irq_of_parse_and_map(np, sys_timer_ch);
 	if (!timer_irq) {
 		pr_err("%s: Missing irq description in Device Tree\n",
 								__func__);
@@ -140,7 +181,7 @@ static int __init vt8500_timer_init(struct device_node *np)
 
 	writel(TIMER_CTRL_ENABLE, regbase + TIMER_CTRL_REG);
 	writel(TIMER_STATUS_CLEARALL, regbase + TIMER_STATUS_REG);
-	writel(~0, regbase + TIMER_MATCH_REG(0));
+	writel(~0, regbase + TIMER_MATCH_REG(sys_timer_ch));
 
 	ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
 	if (ret) {
@@ -163,6 +204,13 @@ static int __init vt8500_timer_init(struct device_node *np)
 	clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
 					MIN_OSCR_DELTA * 2, 0xf0000000);
 
+	if (!sys_timer_ch) {
+		pr_info("%s: Not enabling watchdog: only one irq was given\n",
+			__func__);
+	} else {
+		watchdog_register_device(&vt8500_watchdog_device);
+	}
+
 	return 0;
 }
 

-- 
2.49.0

[PATCH 3/3] ARM: dts: vt8500: list all four timer interrupts

[Alexey Charkov]

VIA/WonderMedia SoC timer can generate up to four interrupts corresponding
to four timer match registers (firing when the 32-bit freerunning clock
source counter matches either of the match registers, respectively).

List all four interrupts in device trees.

This also enables the system event timer to use a match register other
than 0, which can then in turn be used as a system watchdog (watchdog
function is not available on other channels)

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
 arch/arm/boot/dts/vt8500/vt8500.dtsi | 2 +-
 arch/arm/boot/dts/vt8500/wm8505.dtsi | 2 +-
 arch/arm/boot/dts/vt8500/wm8650.dtsi | 2 +-
 arch/arm/boot/dts/vt8500/wm8750.dtsi | 2 +-
 arch/arm/boot/dts/vt8500/wm8850.dtsi | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
index 2ba021585d4889f29777a12473964c29f999f3a0..d1dd37220d41becece5d24fbb19aa71b01723e35 100644
--- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
@@ -111,7 +111,7 @@ clkuart3: uart3 {
 		timer@d8130100 {
 			compatible = "via,vt8500-timer";
 			reg = <0xd8130100 0x28>;
-			interrupts = <36>;
+			interrupts = <36>, <37>, <38>, <39>;
 		};
 
 		usb@d8007900 {
diff --git a/arch/arm/boot/dts/vt8500/wm8505.dtsi b/arch/arm/boot/dts/vt8500/wm8505.dtsi
index 99c064c916b2279797f71261ca9306e9dcd4bbd8..2b1819f0c5412648a83cd3eeb495f68d2e4100ef 100644
--- a/arch/arm/boot/dts/vt8500/wm8505.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8505.dtsi
@@ -209,7 +209,7 @@ clksdhc: sdhc {
 		timer@d8130100 {
 			compatible = "via,vt8500-timer";
 			reg = <0xd8130100 0x28>;
-			interrupts = <36>;
+			interrupts = <36>, <37>, <38>, <39>;
 		};
 
 		usb@d8007100 {
diff --git a/arch/arm/boot/dts/vt8500/wm8650.dtsi b/arch/arm/boot/dts/vt8500/wm8650.dtsi
index 0d6c7bd87f7dcce0eef056d04c38ab1de5d52639..042eec78c085d19fc97d7f0f9721399c0716ff74 100644
--- a/arch/arm/boot/dts/vt8500/wm8650.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8650.dtsi
@@ -181,7 +181,7 @@ clksdhc: sdhc {
 		timer@d8130100 {
 			compatible = "via,vt8500-timer";
 			reg = <0xd8130100 0x28>;
-			interrupts = <36>;
+			interrupts = <36>, <37>, <38>, <39>;
 		};
 
 		usb@d8007900 {
diff --git a/arch/arm/boot/dts/vt8500/wm8750.dtsi b/arch/arm/boot/dts/vt8500/wm8750.dtsi
index 0158c0ba5dd110957eac38775d3bf3ebd2ab4154..56342aa1d993a43e7ee766f93151c6d456496262 100644
--- a/arch/arm/boot/dts/vt8500/wm8750.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8750.dtsi
@@ -253,7 +253,7 @@ pwm: pwm@d8220000 {
 		timer@d8130100 {
 			compatible = "via,vt8500-timer";
 			reg = <0xd8130100 0x28>;
-			interrupts = <36>;
+			interrupts = <36>, <37>, <38>, <39>;
 		};
 
 		usb@d8007900 {
diff --git a/arch/arm/boot/dts/vt8500/wm8850.dtsi b/arch/arm/boot/dts/vt8500/wm8850.dtsi
index c4bfb4d30aad0358b39cbf30edf0c63e32167bbd..03e72f28d31b1cfdcfa71ede93b8943971bae4e3 100644
--- a/arch/arm/boot/dts/vt8500/wm8850.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8850.dtsi
@@ -240,7 +240,7 @@ pwm: pwm@d8220000 {
 		timer@d8130100 {
 			compatible = "via,vt8500-timer";
 			reg = <0xd8130100 0x28>;
-			interrupts = <36>;
+			interrupts = <36>, <37>, <38>, <39>;
 		};
 
 		usb@d8007900 {

-- 
2.49.0

Re: [PATCH 3/3] ARM: dts: vt8500: list all four timer interrupts

[Krzysztof Kozlowski]

On 06/05/2025 22:06, Alexey Charkov wrote:
> VIA/WonderMedia SoC timer can generate up to four interrupts corresponding
> to four timer match registers (firing when the 32-bit freerunning clock
> source counter matches either of the match registers, respectively).
> 
> List all four interrupts in device trees.
> 
> This also enables the system event timer to use a match register other
> than 0, which can then in turn be used as a system watchdog (watchdog
> function is not available on other channels)
> 
> Signed-off-by: Alexey Charkov <alchark@gmail.com>
> ---
>  arch/arm/boot/dts/vt8500/vt8500.dtsi | 2 +-
>  arch/arm/boot/dts/vt8500/wm8505.dtsi | 2 +-
>  arch/arm/boot/dts/vt8500/wm8650.dtsi | 2 +-
>  arch/arm/boot/dts/vt8500/wm8750.dtsi | 2 +-
>  arch/arm/boot/dts/vt8500/wm8850.dtsi | 2 +-
>  5 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
> index 2ba021585d4889f29777a12473964c29f999f3a0..d1dd37220d41becece5d24fbb19aa71b01723e35 100644
> --- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
> +++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
> @@ -111,7 +111,7 @@ clkuart3: uart3 {
>  		timer@d8130100 {
>  			compatible = "via,vt8500-timer";
>  			reg = <0xd8130100 0x28>;
> -			interrupts = <36>;
> +			interrupts = <36>, <37>, <38>, <39>;

You need to update the binding, preferably first convert it to DT schema.



Best regards,
Krzysztof

Re: [PATCH 2/3] clocksource/drivers/timer-vt8500: Add watchdog functionality

[Krzysztof Kozlowski]

On 06/05/2025 22:06, Alexey Charkov wrote:
> VIA/WonderMedia system timer IP can generate a watchdog reset when its
> clocksource counter matches the value in the match register 0 and
> watchdog function is enabled. For this to work, obvously the clock event
> device must use a different match register (1~3) and respective interrupt.
> 
> Check if at least two interrupts are provided by the device tree, then use
> match register 1 for system clock events and match register 0 for watchdog
> respectively.
> 
> Signed-off-by: Alexey Charkov <alchark@gmail.com>
> ---
>  drivers/clocksource/Kconfig        |  6 +++-
>  drivers/clocksource/timer-vt8500.c | 58 ++++++++++++++++++++++++++++++++++----
>  2 files changed, 58 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 487c8525996724fbf9c6e9726dabb478d86513b9..e4f9aade058af1adc279274c6c711658f9f4cd0a 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -177,9 +177,13 @@ config TEGRA186_TIMER
>  
>  config VT8500_TIMER
>  	bool "VT8500 timer driver" if COMPILE_TEST
> +	depends on ARCH_VT8500 || COMPILE_TEST

Does not look related to this patch.

>  	depends on HAS_IOMEM
> +	select WATCHDOG

Drivers are not supposed to select user-visible symbols.

Best regards,
Krzysztof

Re: [PATCH 2/3] clocksource/drivers/timer-vt8500: Add watchdog functionality

[Alexey Charkov]

On Wed, May 7, 2025 at 8:33 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 06/05/2025 22:06, Alexey Charkov wrote:
> > VIA/WonderMedia system timer IP can generate a watchdog reset when its
> > clocksource counter matches the value in the match register 0 and
> > watchdog function is enabled. For this to work, obvously the clock event
> > device must use a different match register (1~3) and respective interrupt.
> >
> > Check if at least two interrupts are provided by the device tree, then use
> > match register 1 for system clock events and match register 0 for watchdog
> > respectively.
> >
> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
> > ---
> >  drivers/clocksource/Kconfig        |  6 +++-
> >  drivers/clocksource/timer-vt8500.c | 58 ++++++++++++++++++++++++++++++++++----
> >  2 files changed, 58 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> > index 487c8525996724fbf9c6e9726dabb478d86513b9..e4f9aade058af1adc279274c6c711658f9f4cd0a 100644
> > --- a/drivers/clocksource/Kconfig
> > +++ b/drivers/clocksource/Kconfig
> > @@ -177,9 +177,13 @@ config TEGRA186_TIMER
> >
> >  config VT8500_TIMER
> >       bool "VT8500 timer driver" if COMPILE_TEST
> > +     depends on ARCH_VT8500 || COMPILE_TEST
>
> Does not look related to this patch.

Will drop in v2.

> >       depends on HAS_IOMEM
> > +     select WATCHDOG
>
> Drivers are not supposed to select user-visible symbols.

Fair enough, thanks. Will add a separate nested user selectable option
for the watchdog function and make it depend on both the driver itself
and the watchdog core.

Best regards,
Alexey

Re: [PATCH 3/3] ARM: dts: vt8500: list all four timer interrupts

[Alexey Charkov]

On Wed, May 7, 2025 at 8:32 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 06/05/2025 22:06, Alexey Charkov wrote:
> > VIA/WonderMedia SoC timer can generate up to four interrupts corresponding
> > to four timer match registers (firing when the 32-bit freerunning clock
> > source counter matches either of the match registers, respectively).
> >
> > List all four interrupts in device trees.
> >
> > This also enables the system event timer to use a match register other
> > than 0, which can then in turn be used as a system watchdog (watchdog
> > function is not available on other channels)
> >
> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
> > ---
> >  arch/arm/boot/dts/vt8500/vt8500.dtsi | 2 +-
> >  arch/arm/boot/dts/vt8500/wm8505.dtsi | 2 +-
> >  arch/arm/boot/dts/vt8500/wm8650.dtsi | 2 +-
> >  arch/arm/boot/dts/vt8500/wm8750.dtsi | 2 +-
> >  arch/arm/boot/dts/vt8500/wm8850.dtsi | 2 +-
> >  5 files changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
> > index 2ba021585d4889f29777a12473964c29f999f3a0..d1dd37220d41becece5d24fbb19aa71b01723e35 100644
> > --- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
> > +++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
> > @@ -111,7 +111,7 @@ clkuart3: uart3 {
> >               timer@d8130100 {
> >                       compatible = "via,vt8500-timer";
> >                       reg = <0xd8130100 0x28>;
> > -                     interrupts = <36>;
> > +                     interrupts = <36>, <37>, <38>, <39>;
>
> You need to update the binding, preferably first convert it to DT schema.

The binding change [1] has been reviewed by Rob and is pending merge.
Shall I fold it into this series when I send v2?

[1] https://lore.kernel.org/all/20250506-via_vt8500_timer_binding-v3-1-88450907503f@gmail.com/

Best regards,
Alexey

Re: [PATCH 3/3] ARM: dts: vt8500: list all four timer interrupts

[Krzysztof Kozlowski]

On 07/05/2025 07:48, Alexey Charkov wrote:
>>> diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
>>> index 2ba021585d4889f29777a12473964c29f999f3a0..d1dd37220d41becece5d24fbb19aa71b01723e35 100644
>>> --- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
>>> +++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
>>> @@ -111,7 +111,7 @@ clkuart3: uart3 {
>>>               timer@d8130100 {
>>>                       compatible = "via,vt8500-timer";
>>>                       reg = <0xd8130100 0x28>;
>>> -                     interrupts = <36>;
>>> +                     interrupts = <36>, <37>, <38>, <39>;
>>
>> You need to update the binding, preferably first convert it to DT schema.
> 
> The binding change [1] has been reviewed by Rob and is pending merge.
> Shall I fold it into this series when I send v2?
> 
> [1] https://lore.kernel.org/all/20250506-via_vt8500_timer_binding-v3-1-88450907503f@gmail.com/
Nothing explained that in cover letter or changelog. It should be
obvious for reviewers where the bindings patch is and what the status is.

Best regards,
Krzysztof

Re: [PATCH 3/3] ARM: dts: vt8500: list all four timer interrupts

[Alexey Charkov]

On Wed, May 7, 2025 at 9:52 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 07/05/2025 07:48, Alexey Charkov wrote:
> >>> diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
> >>> index 2ba021585d4889f29777a12473964c29f999f3a0..d1dd37220d41becece5d24fbb19aa71b01723e35 100644
> >>> --- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
> >>> +++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
> >>> @@ -111,7 +111,7 @@ clkuart3: uart3 {
> >>>               timer@d8130100 {
> >>>                       compatible = "via,vt8500-timer";
> >>>                       reg = <0xd8130100 0x28>;
> >>> -                     interrupts = <36>;
> >>> +                     interrupts = <36>, <37>, <38>, <39>;
> >>
> >> You need to update the binding, preferably first convert it to DT schema.
> >
> > The binding change [1] has been reviewed by Rob and is pending merge.
> > Shall I fold it into this series when I send v2?
> >
> > [1] https://lore.kernel.org/all/20250506-via_vt8500_timer_binding-v3-1-88450907503f@gmail.com/
> Nothing explained that in cover letter or changelog. It should be
> obvious for reviewers where the bindings patch is and what the status is.

Indeed, I should have mentioned it in the cover letter. Thanks for
pointing it out.

Happy to resubmit the binding change as part of this series for easier
merging and full-picture overview: I will be making a v2 anyway to
address your other feedback.

Best regards,
Alexey