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* [PATCH v1] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel
@ 2025-05-08  5:56 Delphine CC Chiu
  2025-05-19  2:07 ` Andrew Jeffery
  0 siblings, 1 reply; 2+ messages in thread
From: Delphine CC Chiu @ 2025-05-08  5:56 UTC (permalink / raw)
  To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Joel Stanley, Andrew Jeffery
  Cc: Marshall Zhan, Delphine CC Chiu, devicetree, linux-arm-kernel,
	linux-aspeed, linux-kernel

From: Marshall Zhan <marshall.zhan.wiwynn@gmail.com>

Add gpio line name to support multiplexed console

Signed-off-by: Marshall Zhan <marshall.zhan.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <delphine_cc_chiu@wiwynn.com>
---
 .../aspeed/aspeed-bmc-facebook-yosemite4.dts  | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 29f224bccd63..ac0678aef7d2 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -189,6 +189,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT1_UART_SEL0","SLOT1_UART_SEL1",
+                                  "SLOT1_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
 	};
 
 	gpio@23 {
@@ -235,6 +240,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT2_UART_SEL0","SLOT2_UART_SEL1",
+                                  "SLOT2_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
 	};
 
 	gpio@23 {
@@ -281,6 +291,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT3_UART_SEL0","SLOT3_UART_SEL1",
+                                  "SLOT3_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
 	};
 
 	gpio@23 {
@@ -327,6 +342,12 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT4_UART_SEL0","SLOT4_UART_SEL1",
+                                  "SLOT4_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
+
 	};
 
 	gpio@23 {
@@ -373,6 +394,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT5_UART_SEL0","SLOT5_UART_SEL1",
+				  "SLOT5_UART_SEL2","","","","","",
+				  "","","","","","","","",
+				  "","","","","","","","",
+				  "","","","","","","","";
 	};
 
 	gpio@23 {
@@ -419,6 +445,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT6_UART_SEL0","SLOT6_UART_SEL1",
+                                  "SLOT6_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
 	};
 
 	gpio@23 {
@@ -465,6 +496,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT7_UART_SEL0","SLOT7_UART_SEL1",
+                                  "SLOT7_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
 	};
 
 	gpio@23 {
@@ -511,6 +547,11 @@ gpio@22 {
 		reg = <0x22>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		gpio-line-names = "SLOT8_UART_SEL0","SLOT8_UART_SEL1",
+                                  "SLOT8_UART_SEL2","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","",
+                                  "","","","","","","","";
 	};
 
 	gpio@23 {
-- 
2.25.1



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v1] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel
  2025-05-08  5:56 [PATCH v1] arm: dts: aspeed: yosemite4: add gpio name for uart mux sel Delphine CC Chiu
@ 2025-05-19  2:07 ` Andrew Jeffery
  0 siblings, 0 replies; 2+ messages in thread
From: Andrew Jeffery @ 2025-05-19  2:07 UTC (permalink / raw)
  To: Delphine CC Chiu, patrick, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley, Joel Stanley
  Cc: Marshall Zhan, devicetree, linux-arm-kernel, linux-aspeed,
	linux-kernel

Hi Marshall,

On Thu, 2025-05-08 at 13:56 +0800, Delphine CC Chiu wrote:
> From: Marshall Zhan <marshall.zhan.wiwynn@gmail.com>
> 
> Add gpio line name to support multiplexed console
> 
> Signed-off-by: Marshall Zhan <marshall.zhan.wiwynn@gmail.com>
> Signed-off-by: Delphine CC Chiu <delphine_cc_chiu@wiwynn.com>
> ---
>  .../aspeed/aspeed-bmc-facebook-yosemite4.dts  | 41 +++++++++++++++++++
>  1 file changed, 41 insertions(+)

Please run your change through checkpatch, fix all the issues reported,
and send the result as v2.

Andrew


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2025-05-19  2:09 UTC | newest]

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2025-05-19  2:07 ` Andrew Jeffery

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