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From: Rob Herring <robh@kernel.org>
To: Sven Peter <sven@svenpeter.dev>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	Janne Grunau <j@jannau.net>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Neal Gompa <neal@gompa.dev>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org, asahi@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	R <rqou@berkeley.edu>
Subject: Re: [PATCH 0/7] Support exposing bits of any byte as NVMEM cells
Date: Wed, 14 May 2025 15:32:46 -0500	[thread overview]
Message-ID: <20250514203246.GA2958656-robh@kernel.org> (raw)
In-Reply-To: <20250510-nvmem-dt-v1-0-eccfa6e33f6a@svenpeter.dev>

On Sat, May 10, 2025 at 07:44:40AM +0000, Sven Peter wrote:
> Hi,
> 
> I'm preparing USB3 support for Apple Silicon Macs for upstreaming right
> now and this series is the first dependency. The Type-C PHY requires
> configuration values encoded in fuses for which we already have a
> driver.
> Unfortunately, the fuses on these machines are only accessibly as 32bit
> words but the Type-C PHY configuration values are individual bits which
> are sometimes spread across multiple fuses.
> Right now this is not supported by the nvmem core which only allows a
> subset of bits within the first byte to be exposed as a nvmem cell. This
> small series adds support for exposing arbitrary bits as nvmem cells.
> 
> The second part of the series then adds the nvmem cells required for the
> Type-C PHY to our device trees. While it's technically independent I've
> included those changes in this series for context.

The idea in the DT is normal addressing is byte-wise, so the only thing 
needed to specify bit level addressing is a 1-7 bit offset.

If you have access size restrictions, then that should be handled by 
your driver. The nvmem layout shouldn't change because of that. You 
could perhaps define the access size with 'reg-io-width' property, but 
really compatible should imply it.

Rob


  parent reply	other threads:[~2025-05-14 20:35 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-10  7:44 [PATCH 0/7] Support exposing bits of any byte as NVMEM cells Sven Peter via B4 Relay
2025-05-10  7:44 ` [PATCH 1/7] nvmem: core: allow bit offset > 8 Sven Peter via B4 Relay
2025-05-10  7:44 ` [PATCH 2/7] nvmem: core: round up to word_size Sven Peter via B4 Relay
2025-05-10  7:44 ` [PATCH 3/7] Revert "nvmem: core: Print error on wrong bits DT property" Sven Peter via B4 Relay
2025-05-10  7:44 ` [PATCH 4/7] dt-bindings: nvmem: apple: Add T8112 compatible Sven Peter via B4 Relay
2025-05-14 20:34   ` Rob Herring
2025-05-10  7:44 ` [PATCH 5/7] arm64: dts: apple: t8103: Add eFuses node Sven Peter via B4 Relay
2025-05-10  7:44 ` [PATCH 6/7] arm64: dts: apple: t600x: " Sven Peter via B4 Relay
2025-05-10  7:44 ` [PATCH 7/7] arm64: dts: apple: t8112: " Sven Peter via B4 Relay
2025-05-12 12:49 ` [PATCH 0/7] Support exposing bits of any byte as NVMEM cells Rob Herring (Arm)
2025-05-14 20:32 ` Rob Herring [this message]
2025-05-14 20:38   ` Sven Peter

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