[PATCH 0/9] rockchip: Add power controller support for RK3528

[PATCH 0/9] rockchip: Add power controller support for RK3528

[Jonas Karlman]

The Rockchip RK3528 support multiple power domains, one PD_GPU that can
fully be powered down, and other that can be idle requested.

Vendor kernel flag all power domains on RK3528 as always-on, this takes
a different route and instead tries to describe all devices power-domain
in the device tree, even for controllers with unsupported runtime status.

The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
prevent a full system reset when trying to read current rate of the
SCMI_CLK_DDR clock.

Patch 1-4 prepares and makes it possible to use the PD_GPU power domain
for a separate "Add GPU support for RK3528" series.

Patch 7-9 updates dt-bindings for controllers not supporting use of the
power-domains prop and enables the PD_RKVENC, PD_VO and PD_VPU domains.

pm_genpd_summary on a Radxa E20C after this:

  domain                          status          children        performance
      /device                         runtime status                  managed by
  ------------------------------------------------------------------------------
  vpu                             on                              0
      ffaf0000.gpio                   unsupported                 0           SW
      ffb10000.gpio                   unsupported                 0           SW
      ffbe0000.ethernet               active                      0           SW
      ffae0000.adc                    unsupported                 0           SW
      ffbf0000.mmc                    suspended                   0           SW
  vo                              on                              0
      ffb00000.gpio                   unsupported                 0           SW
      ffc30000.mmc                    suspended                   0           SW
  venc                            on                              0
      ffb20000.gpio                   unsupported                 0           SW
      ffa58000.i2c                    unsupported                 0           SW
  gpu                             off-0                           0
      ff700000.gpu                    suspended                   0           SW

Jonas Karlman (9):
  dt-bindings: power: rockchip: Add support for RK3528
  pmdomain: rockchip: Add support for RK3528
  dt-bindings: rockchip: pmu: Add compatible for RK3528
  arm64: dts: rockchip: Add power controller for RK3528
  dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain
  dt-bindings: gpio: rockchip: Allow use of a power-domain
  dt-bindings: i2c: i2c-rk3x: Allow use of a power-domain
  dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain
  arm64: dts: rockchip: Enable more power domains for RK3528

 .../devicetree/bindings/arm/rockchip/pmu.yaml |  2 +
 .../bindings/gpio/rockchip,gpio-bank.yaml     |  3 +
 .../devicetree/bindings/i2c/i2c-rk3x.yaml     |  3 +
 .../bindings/iio/adc/rockchip-saradc.yaml     |  3 +
 .../bindings/mmc/snps,dwcmshc-sdhci.yaml      |  4 -
 .../power/rockchip,power-controller.yaml      |  1 +
 arch/arm64/boot/dts/rockchip/rk3528.dtsi      | 87 +++++++++++++++++++
 drivers/pmdomain/rockchip/pm-domains.c        | 27 ++++++
 .../dt-bindings/power/rockchip,rk3528-power.h | 19 ++++
 9 files changed, 145 insertions(+), 4 deletions(-)
 create mode 100644 include/dt-bindings/power/rockchip,rk3528-power.h

-- 
2.49.0

[PATCH 1/9] dt-bindings: power: rockchip: Add support for RK3528

[Jonas Karlman]

Add the compatible string and power domains for RK3528 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 .../power/rockchip,power-controller.yaml      |  1 +
 .../dt-bindings/power/rockchip,rk3528-power.h | 19 +++++++++++++++++++
 2 files changed, 20 insertions(+)
 create mode 100644 include/dt-bindings/power/rockchip,rk3528-power.h

diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
index f494b7710c09..a884e49c995f 100644
--- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
@@ -40,6 +40,7 @@ properties:
       - rockchip,rk3366-power-controller
       - rockchip,rk3368-power-controller
       - rockchip,rk3399-power-controller
+      - rockchip,rk3528-power-controller
       - rockchip,rk3562-power-controller
       - rockchip,rk3568-power-controller
       - rockchip,rk3576-power-controller
diff --git a/include/dt-bindings/power/rockchip,rk3528-power.h b/include/dt-bindings/power/rockchip,rk3528-power.h
new file mode 100644
index 000000000000..318923cdaaf6
--- /dev/null
+++ b/include/dt-bindings/power/rockchip,rk3528-power.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+#ifndef __DT_BINDINGS_POWER_RK3528_POWER_H__
+#define __DT_BINDINGS_POWER_RK3528_POWER_H__
+
+#define RK3528_PD_PMU		0
+#define RK3528_PD_BUS		1
+#define RK3528_PD_DDR		2
+#define RK3528_PD_MSCH		3
+
+/* VD_GPU */
+#define RK3528_PD_GPU		4
+
+/* VD_LOGIC */
+#define RK3528_PD_RKVDEC	5
+#define RK3528_PD_RKVENC	6
+#define RK3528_PD_VO		7
+#define RK3528_PD_VPU		8
+
+#endif
-- 
2.49.0

[PATCH 2/9] pmdomain: rockchip: Add support for RK3528

[Jonas Karlman]

Add configuration and power domains for RK3528 SoC.

Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
PD_VPU are used by miscellaneous devices in RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 drivers/pmdomain/rockchip/pm-domains.c | 27 ++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
index 4cce407bb1eb..242570c505fb 100644
--- a/drivers/pmdomain/rockchip/pm-domains.c
+++ b/drivers/pmdomain/rockchip/pm-domains.c
@@ -35,6 +35,7 @@
 #include <dt-bindings/power/rk3366-power.h>
 #include <dt-bindings/power/rk3368-power.h>
 #include <dt-bindings/power/rk3399-power.h>
+#include <dt-bindings/power/rockchip,rk3528-power.h>
 #include <dt-bindings/power/rockchip,rk3562-power.h>
 #include <dt-bindings/power/rk3568-power.h>
 #include <dt-bindings/power/rockchip,rk3576-power.h>
@@ -216,6 +217,9 @@ struct rockchip_pmu {
 #define DOMAIN_RK3399(name, pwr, status, req, wakeup)		\
 	DOMAIN(name, pwr, status, req, req, req, wakeup)
 
+#define DOMAIN_RK3528(name, pwr, req)		\
+	DOMAIN_M(name, pwr, pwr, req, req, req, false)
+
 #define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup)		\
 	DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
 
@@ -1215,6 +1219,14 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
 	[RK3399_PD_SDIOAUDIO]	= DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true),
 };
 
+static const struct rockchip_domain_info rk3528_pm_domains[] = {
+	[RK3528_PD_GPU]		= DOMAIN_RK3528("gpu",  BIT(0), BIT(4)),
+	[RK3528_PD_RKVDEC]	= DOMAIN_RK3528("vdec",      0, BIT(5)),
+	[RK3528_PD_RKVENC]	= DOMAIN_RK3528("venc",      0, BIT(6)),
+	[RK3528_PD_VO]		= DOMAIN_RK3528("vo",        0, BIT(7)),
+	[RK3528_PD_VPU]		= DOMAIN_RK3528("vpu",       0, BIT(8)),
+};
+
 static const struct rockchip_domain_info rk3562_pm_domains[] = {
 					     /* name           pwr     req     g_mask  mem wakeup */
 	[RK3562_PD_GPU]		= DOMAIN_RK3562("gpu",         BIT(0), BIT(1), BIT(1), 0, false),
@@ -1428,6 +1440,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
 	.domain_info = rk3399_pm_domains,
 };
 
+static const struct rockchip_pmu_info rk3528_pmu = {
+	.pwr_offset = 0x1210,
+	.status_offset = 0x1230,
+	.req_offset = 0x1110,
+	.idle_offset = 0x1128,
+	.ack_offset = 0x1120,
+
+	.num_domains = ARRAY_SIZE(rk3528_pm_domains),
+	.domain_info = rk3528_pm_domains,
+};
+
 static const struct rockchip_pmu_info rk3562_pmu = {
 	.pwr_offset = 0x210,
 	.status_offset = 0x230,
@@ -1538,6 +1561,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
 		.compatible = "rockchip,rk3399-power-controller",
 		.data = (void *)&rk3399_pmu,
 	},
+	{
+		.compatible = "rockchip,rk3528-power-controller",
+		.data = (void *)&rk3528_pmu,
+	},
 	{
 		.compatible = "rockchip,rk3562-power-controller",
 		.data = (void *)&rk3562_pmu,
-- 
2.49.0

[PATCH 3/9] dt-bindings: rockchip: pmu: Add compatible for RK3528

[Jonas Karlman]

Add the compatible for the pmu mfd on RK3528 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
index 46c1af851be7..55b2200d6e75 100644
--- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
@@ -25,6 +25,7 @@ select:
           - rockchip,rk3288-pmu
           - rockchip,rk3368-pmu
           - rockchip,rk3399-pmu
+          - rockchip,rk3528-pmu
           - rockchip,rk3562-pmu
           - rockchip,rk3568-pmu
           - rockchip,rk3576-pmu
@@ -44,6 +45,7 @@ properties:
           - rockchip,rk3288-pmu
           - rockchip,rk3368-pmu
           - rockchip,rk3399-pmu
+          - rockchip,rk3528-pmu
           - rockchip,rk3562-pmu
           - rockchip,rk3568-pmu
           - rockchip,rk3576-pmu
-- 
2.49.0

[PATCH 4/9] arm64: dts: rockchip: Add power controller for RK3528

[Jonas Karlman]

Add power-domain nodes for the power controller on RK3528.

Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
PD_VPU are idle only power domains used by miscellaneous devices.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
Because multiple of the miscellaneous device types currently complain
about the use of a power-domains prop, only PD_GPU is enabled.
---
 arch/arm64/boot/dts/rockchip/rk3528.dtsi | 65 ++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index b2724c969a76..c13a6a566164 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rockchip,rk3528-cru.h>
+#include <dt-bindings/power/rockchip,rk3528-power.h>
 #include <dt-bindings/reset/rockchip,rk3528-cru.h>
 
 / {
@@ -371,6 +372,70 @@ ioc_grf: syscon@ff540000 {
 			reg = <0x0 0xff540000 0x0 0x40000>;
 		};
 
+		pmu: power-management@ff600000 {
+			compatible = "rockchip,rk3528-pmu", "syscon", "simple-mfd";
+			reg = <0x0 0xff600000 0x0 0x2000>;
+
+			power: power-controller {
+				compatible = "rockchip,rk3528-power-controller";
+				#power-domain-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				/* These power domains are grouped by VD_GPU */
+				power-domain@RK3528_PD_GPU {
+					reg = <RK3528_PD_GPU>;
+					clocks = <&cru ACLK_GPU_MALI>,
+						 <&cru PCLK_GPU_ROOT>;
+					pm_qos = <&qos_gpu_m0>,
+						 <&qos_gpu_m1>;
+					#power-domain-cells = <0>;
+				};
+
+				/* These power domains are grouped by VD_LOGIC */
+				power-domain@RK3528_PD_RKVDEC {
+					reg = <RK3528_PD_RKVDEC>;
+					pm_qos = <&qos_rkvdec>;
+					#power-domain-cells = <0>;
+					status = "disabled";
+				};
+				power-domain@RK3528_PD_RKVENC {
+					reg = <RK3528_PD_RKVENC>;
+					pm_qos = <&qos_rkvenc>;
+					#power-domain-cells = <0>;
+					status = "disabled";
+				};
+				power-domain@RK3528_PD_VO {
+					reg = <RK3528_PD_VO>;
+					pm_qos = <&qos_gmac0>,
+						 <&qos_hdcp>,
+						 <&qos_jpegdec>,
+						 <&qos_rga2_m0ro>,
+						 <&qos_rga2_m0wo>,
+						 <&qos_sdmmc0>,
+						 <&qos_usb2host>,
+						 <&qos_vdpp>,
+						 <&qos_vop>;
+					#power-domain-cells = <0>;
+					status = "disabled";
+				};
+				power-domain@RK3528_PD_VPU {
+					reg = <RK3528_PD_VPU>;
+					pm_qos = <&qos_emmc>,
+						 <&qos_fspi>,
+						 <&qos_gmac1>,
+						 <&qos_pcie>,
+						 <&qos_sdio0>,
+						 <&qos_sdio1>,
+						 <&qos_tsp>,
+						 <&qos_usb3otg>,
+						 <&qos_vpu>;
+					#power-domain-cells = <0>;
+					status = "disabled";
+				};
+			};
+		};
+
 		uart0: serial@ff9f0000 {
 			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
 			reg = <0x0 0xff9f0000 0x0 0x100>;
-- 
2.49.0

[PATCH 5/9] dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain

[Jonas Karlman]

The commit 7e856617a1f3 ("dt-bindings: mmc: Add support for rk3576
eMMC") limited use of power-domains to Rockchip RK3576.

Remove the power-domains: false to allow use of power-domains with more
controllers, e.g. with SDHCI on Rockchip RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
index 5fb347167004..f882219a0a26 100644
--- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
@@ -120,10 +120,6 @@ allOf:
       required:
         - power-domains
 
-    else:
-      properties:
-        power-domains: false
-
 unevaluatedProperties: false
 
 examples:
-- 
2.49.0

[PATCH 6/9] dt-bindings: gpio: rockchip: Allow use of a power-domain

[Jonas Karlman]

The GPIO controllers in most Rockchip SoCs are part or power domains
that are always powered on, i.e. PD_BUS or PD_PMU.

On RK3528 the GPIO controllers are spread out among the PD_RKVENC, PD_VO
and PD_VPU power domains.

Add support to describe power-domains for the GPIO controllers.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
index d76987ce8e50..bdd83f42615c 100644
--- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -41,6 +41,9 @@ properties:
   "#interrupt-cells":
     const: 2
 
+  power-domains:
+    maxItems: 1
+
 patternProperties:
   "^.+-hog(-[0-9]+)?$":
     type: object
-- 
2.49.0

[PATCH 7/9] dt-bindings: i2c: i2c-rk3x: Allow use of a power-domain

[Jonas Karlman]

The I2C controllers in most Rockchip SoCs are part or power domains that
are always powered on, i.e. PD_BUS or PD_PMU.

On RK3528 the I2C controllers are spread out among the PD_RKVENC, PD_VO
and PD_VPU power domains.

Add support to describe power-domains for the I2C controllers.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
index 2f1e97969c3f..4ac5a40a3886 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
@@ -105,6 +105,9 @@ properties:
       (t(f) in the I2C specification). If not specified we will use the SCL
       value since they are the same in nearly all cases.
 
+  power-domains:
+    maxItems: 1
+
 required:
   - compatible
   - reg
-- 
2.49.0

[PATCH 8/9] dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain

[Jonas Karlman]

The SARADC controller in most Rockchip SoCs are part or power domains
that are always powered on, i.e. PD_BUS or PD_PERI.

On RK3528 the SARADC controller is part of the PD_VPU power domain.

Add support to describe power-domains for the SARADC controllers.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
index 41e0c56ef8e3..f776041fd08f 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
@@ -47,6 +47,9 @@ properties:
       - const: saradc
       - const: apb_pclk
 
+  power-domains:
+    maxItems: 1
+
   resets:
     maxItems: 1
 
-- 
2.49.0

[PATCH 9/9] arm64: dts: rockchip: Enable more power domains for RK3528

[Jonas Karlman]

Describe device power-domains and enable the PD_RKVENC, PD_VO and PD_VPU
power-domains on RK3528.

The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
prevent a full system reset trying to read the rate of the SCMI_CLK_DDR
clock.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm64/boot/dts/rockchip/rk3528.dtsi | 28 +++++++++++++++++++++---
 1 file changed, 25 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index c13a6a566164..791cb9b1e8f1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -403,7 +403,6 @@ power-domain@RK3528_PD_RKVENC {
 					reg = <RK3528_PD_RKVENC>;
 					pm_qos = <&qos_rkvenc>;
 					#power-domain-cells = <0>;
-					status = "disabled";
 				};
 				power-domain@RK3528_PD_VO {
 					reg = <RK3528_PD_VO>;
@@ -417,7 +416,6 @@ power-domain@RK3528_PD_VO {
 						 <&qos_vdpp>,
 						 <&qos_vop>;
 					#power-domain-cells = <0>;
-					status = "disabled";
 				};
 				power-domain@RK3528_PD_VPU {
 					reg = <RK3528_PD_VPU>;
@@ -431,7 +429,6 @@ power-domain@RK3528_PD_VPU {
 						 <&qos_usb3otg>,
 						 <&qos_vpu>;
 					#power-domain-cells = <0>;
-					status = "disabled";
 				};
 			};
 		};
@@ -455,6 +452,7 @@ uart1: serial@ff9f8000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 10>, <&dmac 11>;
+			power-domains = <&power RK3528_PD_RKVENC>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -467,6 +465,7 @@ uart2: serial@ffa00000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 12>, <&dmac 13>;
+			power-domains = <&power RK3528_PD_VPU>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -479,6 +478,7 @@ uart3: serial@ffa08000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 14>, <&dmac 15>;
+			power-domains = <&power RK3528_PD_RKVENC>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -491,6 +491,7 @@ uart4: serial@ffa10000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 16>, <&dmac 17>;
+			power-domains = <&power RK3528_PD_VO>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -503,6 +504,7 @@ uart5: serial@ffa18000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 18>, <&dmac 19>;
+			power-domains = <&power RK3528_PD_VPU>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -515,6 +517,7 @@ uart6: serial@ffa20000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 20>, <&dmac 21>;
+			power-domains = <&power RK3528_PD_VPU>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -527,6 +530,7 @@ uart7: serial@ffa28000 {
 			clock-names = "baudclk", "apb_pclk";
 			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 			dmas = <&dmac 22>, <&dmac 23>;
+			power-domains = <&power RK3528_PD_VPU>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";
@@ -539,6 +543,7 @@ i2c0: i2c@ffa50000 {
 			clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
 			clock-names = "i2c", "pclk";
 			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3528_PD_RKVENC>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -551,6 +556,7 @@ i2c1: i2c@ffa58000 {
 			clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
 			clock-names = "i2c", "pclk";
 			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3528_PD_RKVENC>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -577,6 +583,7 @@ i2c3: i2c@ffa68000 {
 			clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
 			clock-names = "i2c", "pclk";
 			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3528_PD_VPU>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -591,6 +598,7 @@ i2c4: i2c@ffa70000 {
 			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&i2c4_xfer>;
+			power-domains = <&power RK3528_PD_VO>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -603,6 +611,7 @@ i2c5: i2c@ffa78000 {
 			clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
 			clock-names = "i2c", "pclk";
 			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3528_PD_VPU>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -615,6 +624,7 @@ i2c6: i2c@ffa80000 {
 			clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
 			clock-names = "i2c", "pclk";
 			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3528_PD_VPU>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -629,6 +639,7 @@ i2c7: i2c@ffa88000 {
 			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&i2c7_xfer>;
+			power-domains = <&power RK3528_PD_VO>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -720,6 +731,7 @@ saradc: adc@ffae0000 {
 			clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
 			clock-names = "saradc", "apb_pclk";
 			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&power RK3528_PD_VPU>;
 			resets = <&cru SRST_P_SARADC>;
 			reset-names = "saradc-apb";
 			#io-channel-cells = <1>;
@@ -740,6 +752,7 @@ gmac0: ethernet@ffbd0000 {
 			interrupt-names = "macirq", "eth_wake_irq";
 			phy-handle = <&rmii0_phy>;
 			phy-mode = "rmii";
+			power-domains = <&power RK3528_PD_VO>;
 			resets = <&cru SRST_A_MAC_VO>;
 			reset-names = "stmmaceth";
 			rockchip,grf = <&vo_grf>;
@@ -798,6 +811,7 @@ gmac1: ethernet@ffbe0000 {
 			interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq", "eth_wake_irq";
+			power-domains = <&power RK3528_PD_VPU>;
 			resets = <&cru SRST_A_MAC>;
 			reset-names = "stmmaceth";
 			rockchip,grf = <&vpu_grf>;
@@ -848,6 +862,7 @@ sdhci: mmc@ffbf0000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
 				    <&emmc_strb>;
+			power-domains = <&power RK3528_PD_VPU>;
 			resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
 				 <&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
 				 <&cru SRST_T_EMMC>;
@@ -869,6 +884,7 @@ sdio0: mmc@ffc10000 {
 			max-frequency = <200000000>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>;
+			power-domains = <&power RK3528_PD_VPU>;
 			resets = <&cru SRST_H_SDIO0>;
 			reset-names = "reset";
 			status = "disabled";
@@ -888,6 +904,7 @@ sdio1: mmc@ffc20000 {
 			max-frequency = <200000000>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>;
+			power-domains = <&power RK3528_PD_VPU>;
 			resets = <&cru SRST_H_SDIO1>;
 			reset-names = "reset";
 			status = "disabled";
@@ -908,6 +925,7 @@ sdmmc: mmc@ffc30000 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
 				    <&sdmmc_det>;
+			power-domains = <&power RK3528_PD_VO>;
 			resets = <&cru SRST_H_SDMMC0>;
 			reset-names = "reset";
 			rockchip,default-sample-phase = <90>;
@@ -961,6 +979,7 @@ gpio1: gpio@ffaf0000 {
 				gpio-ranges = <&pinctrl 0 32 32>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
+				power-domains = <&power RK3528_PD_VPU>;
 			};
 
 			gpio2: gpio@ffb00000 {
@@ -973,6 +992,7 @@ gpio2: gpio@ffb00000 {
 				gpio-ranges = <&pinctrl 0 64 32>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
+				power-domains = <&power RK3528_PD_VO>;
 			};
 
 			gpio3: gpio@ffb10000 {
@@ -985,6 +1005,7 @@ gpio3: gpio@ffb10000 {
 				gpio-ranges = <&pinctrl 0 96 32>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
+				power-domains = <&power RK3528_PD_VPU>;
 			};
 
 			gpio4: gpio@ffb20000 {
@@ -997,6 +1018,7 @@ gpio4: gpio@ffb20000 {
 				gpio-ranges = <&pinctrl 0 128 32>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
+				power-domains = <&power RK3528_PD_RKVENC>;
 			};
 		};
 	};
-- 
2.49.0

Re: [PATCH 5/9] dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain

[Conor Dooley]

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On Sun, May 18, 2025 at 10:06:52PM +0000, Jonas Karlman wrote:
> The commit 7e856617a1f3 ("dt-bindings: mmc: Add support for rk3576
> eMMC") limited use of power-domains to Rockchip RK3576.
> 
> Remove the power-domains: false to allow use of power-domains with more
> controllers, e.g. with SDHCI on Rockchip RK3528.

Meanwhile, you're allowing it for all devices, even ones where it is not
valid. I'm not keen on that.

> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> index 5fb347167004..f882219a0a26 100644
> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> @@ -120,10 +120,6 @@ allOf:
>        required:
>          - power-domains
>  
> -    else:
> -      properties:
> -        power-domains: false
> -
>  unevaluatedProperties: false
>  
>  examples:
> -- 
> 2.49.0
> 

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Re: [PATCH 1/9] dt-bindings: power: rockchip: Add support for RK3528

[Conor Dooley]

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On Sun, May 18, 2025 at 10:06:48PM +0000, Jonas Karlman wrote:
> Add the compatible string and power domains for RK3528 SoC.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

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Re: [PATCH 3/9] dt-bindings: rockchip: pmu: Add compatible for RK3528

[Conor Dooley]

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On Sun, May 18, 2025 at 10:06:50PM +0000, Jonas Karlman wrote:
> Add the compatible for the pmu mfd on RK3528 SoC.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

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Re: [PATCH 2/9] pmdomain: rockchip: Add support for RK3528

[Yao Zi]

On Sun, May 18, 2025 at 10:06:49PM +0000, Jonas Karlman wrote:
> Add configuration and power domains for RK3528 SoC.
> 
> Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
> PD_VPU are used by miscellaneous devices in RK3528.

Thanks for your work!

> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  drivers/pmdomain/rockchip/pm-domains.c | 27 ++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
> index 4cce407bb1eb..242570c505fb 100644
> --- a/drivers/pmdomain/rockchip/pm-domains.c
> +++ b/drivers/pmdomain/rockchip/pm-domains.c
> @@ -35,6 +35,7 @@
>  #include <dt-bindings/power/rk3366-power.h>
>  #include <dt-bindings/power/rk3368-power.h>
>  #include <dt-bindings/power/rk3399-power.h>
> +#include <dt-bindings/power/rockchip,rk3528-power.h>
>  #include <dt-bindings/power/rockchip,rk3562-power.h>

But I had some trouble applying this patch on either Rockchip SoC tree
or linux-pm. Looking through the context, seems the patch depends on
some RK3562 PMU driver changes, which I couldn't find with some brief
searching among the list.

Which branch is the series based on?

>  #include <dt-bindings/power/rk3568-power.h>
>  #include <dt-bindings/power/rockchip,rk3576-power.h>
> @@ -216,6 +217,9 @@ struct rockchip_pmu {
>  #define DOMAIN_RK3399(name, pwr, status, req, wakeup)		\
>  	DOMAIN(name, pwr, status, req, req, req, wakeup)
>  
> +#define DOMAIN_RK3528(name, pwr, req)		\
> +	DOMAIN_M(name, pwr, pwr, req, req, req, false)
> +
>  #define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup)		\
>  	DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
>  
> @@ -1215,6 +1219,14 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
>  	[RK3399_PD_SDIOAUDIO]	= DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true),
>  };
>  
> +static const struct rockchip_domain_info rk3528_pm_domains[] = {
> +	[RK3528_PD_GPU]		= DOMAIN_RK3528("gpu",  BIT(0), BIT(4)),
> +	[RK3528_PD_RKVDEC]	= DOMAIN_RK3528("vdec",      0, BIT(5)),
> +	[RK3528_PD_RKVENC]	= DOMAIN_RK3528("venc",      0, BIT(6)),
> +	[RK3528_PD_VO]		= DOMAIN_RK3528("vo",        0, BIT(7)),
> +	[RK3528_PD_VPU]		= DOMAIN_RK3528("vpu",       0, BIT(8)),
> +};
> +
>  static const struct rockchip_domain_info rk3562_pm_domains[] = {
>  					     /* name           pwr     req     g_mask  mem wakeup */
>  	[RK3562_PD_GPU]		= DOMAIN_RK3562("gpu",         BIT(0), BIT(1), BIT(1), 0, false),
> @@ -1428,6 +1440,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
>  	.domain_info = rk3399_pm_domains,
>  };
>  
> +static const struct rockchip_pmu_info rk3528_pmu = {
> +	.pwr_offset = 0x1210,
> +	.status_offset = 0x1230,
> +	.req_offset = 0x1110,
> +	.idle_offset = 0x1128,
> +	.ack_offset = 0x1120,
> +
> +	.num_domains = ARRAY_SIZE(rk3528_pm_domains),
> +	.domain_info = rk3528_pm_domains,
> +};
> +
>  static const struct rockchip_pmu_info rk3562_pmu = {
>  	.pwr_offset = 0x210,
>  	.status_offset = 0x230,
> @@ -1538,6 +1561,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
>  		.compatible = "rockchip,rk3399-power-controller",
>  		.data = (void *)&rk3399_pmu,
>  	},
> +	{
> +		.compatible = "rockchip,rk3528-power-controller",
> +		.data = (void *)&rk3528_pmu,
> +	},
>  	{
>  		.compatible = "rockchip,rk3562-power-controller",
>  		.data = (void *)&rk3562_pmu,
> -- 
> 2.49.0
> 

Thanks for your effort,
Yao Zi

Re: [PATCH 5/9] dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain

[Jonas Karlman]

Hi Conor,

On 2025-05-19 18:12, Conor Dooley wrote:
> On Sun, May 18, 2025 at 10:06:52PM +0000, Jonas Karlman wrote:
>> The commit 7e856617a1f3 ("dt-bindings: mmc: Add support for rk3576
>> eMMC") limited use of power-domains to Rockchip RK3576.
>>
>> Remove the power-domains: false to allow use of power-domains with more
>> controllers, e.g. with SDHCI on Rockchip RK3528.
> 
> Meanwhile, you're allowing it for all devices, even ones where it is not
> valid. I'm not keen on that.

All Rockchip variants technically belong to a power-domain, not just the
RK3576. E.g. for RK3588 a PD_NVM0 domain (not described in DT), for
RK3568 a VD_LOGIC ALIVE / BIU_SECURE_FLASH idle-only domain, and as
shown in this series for the RK3528 the PD_VPU idle-only domain.

Any suggestion on how to best allow describing these links?

Regards,
Jonas

> 
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>>  Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 4 ----
>>  1 file changed, 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
>> index 5fb347167004..f882219a0a26 100644
>> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
>> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
>> @@ -120,10 +120,6 @@ allOf:
>>        required:
>>          - power-domains
>>  
>> -    else:
>> -      properties:
>> -        power-domains: false
>> -
>>  unevaluatedProperties: false
>>  
>>  examples:
>> -- 
>> 2.49.0
>>

Re: [PATCH 2/9] pmdomain: rockchip: Add support for RK3528

[Heiko Stübner]

Hi,

Am Montag, 19. Mai 2025, 18:52:04 Mitteleuropäische Sommerzeit schrieb Yao Zi:
> On Sun, May 18, 2025 at 10:06:49PM +0000, Jonas Karlman wrote:
> > Add configuration and power domains for RK3528 SoC.
> > 
> > Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
> > PD_VPU are used by miscellaneous devices in RK3528.
> 
> Thanks for your work!
> 
> > Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> > ---
> >  drivers/pmdomain/rockchip/pm-domains.c | 27 ++++++++++++++++++++++++++
> >  1 file changed, 27 insertions(+)
> > 
> > diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
> > index 4cce407bb1eb..242570c505fb 100644
> > --- a/drivers/pmdomain/rockchip/pm-domains.c
> > +++ b/drivers/pmdomain/rockchip/pm-domains.c
> > @@ -35,6 +35,7 @@
> >  #include <dt-bindings/power/rk3366-power.h>
> >  #include <dt-bindings/power/rk3368-power.h>
> >  #include <dt-bindings/power/rk3399-power.h>
> > +#include <dt-bindings/power/rockchip,rk3528-power.h>
> >  #include <dt-bindings/power/rockchip,rk3562-power.h>
> 
> But I had some trouble applying this patch on either Rockchip SoC tree
> or linux-pm. Looking through the context, seems the patch depends on
> some RK3562 PMU driver changes, which I couldn't find with some brief
> searching among the list.
> 
> Which branch is the series based on?

are you sure you looked at the right linux-pm tree?

In [0] I do see rk3562 powerdomains applied.

Heiko


[0] https://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git/commit/?h=next&id=f89c082d44914f24dfb5b0219eb140369de5b612

Re: [PATCH 2/9] pmdomain: rockchip: Add support for RK3528

[Jonas Karlman]

On 2025-05-19 18:52, Yao Zi wrote:
> On Sun, May 18, 2025 at 10:06:49PM +0000, Jonas Karlman wrote:
>> Add configuration and power domains for RK3528 SoC.
>>
>> Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
>> PD_VPU are used by miscellaneous devices in RK3528.
> 
> Thanks for your work!
> 
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>>  drivers/pmdomain/rockchip/pm-domains.c | 27 ++++++++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>
>> diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
>> index 4cce407bb1eb..242570c505fb 100644
>> --- a/drivers/pmdomain/rockchip/pm-domains.c
>> +++ b/drivers/pmdomain/rockchip/pm-domains.c
>> @@ -35,6 +35,7 @@
>>  #include <dt-bindings/power/rk3366-power.h>
>>  #include <dt-bindings/power/rk3368-power.h>
>>  #include <dt-bindings/power/rk3399-power.h>
>> +#include <dt-bindings/power/rockchip,rk3528-power.h>
>>  #include <dt-bindings/power/rockchip,rk3562-power.h>
> 
> But I had some trouble applying this patch on either Rockchip SoC tree
> or linux-pm. Looking through the context, seems the patch depends on
> some RK3562 PMU driver changes, which I couldn't find with some brief
> searching among the list.

Strange.

> 
> Which branch is the series based on?

My local branch was based on top of next-20250509 + latest
mmind/for-next (a95d16b0324b) merged.

Regards,
Jonas

> 
>>  #include <dt-bindings/power/rk3568-power.h>
>>  #include <dt-bindings/power/rockchip,rk3576-power.h>
>> @@ -216,6 +217,9 @@ struct rockchip_pmu {
>>  #define DOMAIN_RK3399(name, pwr, status, req, wakeup)		\
>>  	DOMAIN(name, pwr, status, req, req, req, wakeup)
>>  
>> +#define DOMAIN_RK3528(name, pwr, req)		\
>> +	DOMAIN_M(name, pwr, pwr, req, req, req, false)
>> +
>>  #define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup)		\
>>  	DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
>>  
>> @@ -1215,6 +1219,14 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
>>  	[RK3399_PD_SDIOAUDIO]	= DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true),
>>  };
>>  
>> +static const struct rockchip_domain_info rk3528_pm_domains[] = {
>> +	[RK3528_PD_GPU]		= DOMAIN_RK3528("gpu",  BIT(0), BIT(4)),
>> +	[RK3528_PD_RKVDEC]	= DOMAIN_RK3528("vdec",      0, BIT(5)),
>> +	[RK3528_PD_RKVENC]	= DOMAIN_RK3528("venc",      0, BIT(6)),
>> +	[RK3528_PD_VO]		= DOMAIN_RK3528("vo",        0, BIT(7)),
>> +	[RK3528_PD_VPU]		= DOMAIN_RK3528("vpu",       0, BIT(8)),
>> +};
>> +
>>  static const struct rockchip_domain_info rk3562_pm_domains[] = {
>>  					     /* name           pwr     req     g_mask  mem wakeup */
>>  	[RK3562_PD_GPU]		= DOMAIN_RK3562("gpu",         BIT(0), BIT(1), BIT(1), 0, false),
>> @@ -1428,6 +1440,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
>>  	.domain_info = rk3399_pm_domains,
>>  };
>>  
>> +static const struct rockchip_pmu_info rk3528_pmu = {
>> +	.pwr_offset = 0x1210,
>> +	.status_offset = 0x1230,
>> +	.req_offset = 0x1110,
>> +	.idle_offset = 0x1128,
>> +	.ack_offset = 0x1120,
>> +
>> +	.num_domains = ARRAY_SIZE(rk3528_pm_domains),
>> +	.domain_info = rk3528_pm_domains,
>> +};
>> +
>>  static const struct rockchip_pmu_info rk3562_pmu = {
>>  	.pwr_offset = 0x210,
>>  	.status_offset = 0x230,
>> @@ -1538,6 +1561,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
>>  		.compatible = "rockchip,rk3399-power-controller",
>>  		.data = (void *)&rk3399_pmu,
>>  	},
>> +	{
>> +		.compatible = "rockchip,rk3528-power-controller",
>> +		.data = (void *)&rk3528_pmu,
>> +	},
>>  	{
>>  		.compatible = "rockchip,rk3562-power-controller",
>>  		.data = (void *)&rk3562_pmu,
>> -- 
>> 2.49.0
>>
> 
> Thanks for your effort,
> Yao Zi

Re: [PATCH 2/9] pmdomain: rockchip: Add support for RK3528

[Yao Zi]

On Mon, May 19, 2025 at 07:07:39PM +0200, Heiko Stübner wrote:
> Hi,
> 
> Am Montag, 19. Mai 2025, 18:52:04 Mitteleuropäische Sommerzeit schrieb Yao Zi:
> > On Sun, May 18, 2025 at 10:06:49PM +0000, Jonas Karlman wrote:
> > > Add configuration and power domains for RK3528 SoC.
> > > 
> > > Only PD_GPU can fully be powered down. PD_RKVDEC, PD_RKVENC, PD_VO and
> > > PD_VPU are used by miscellaneous devices in RK3528.
> > 
> > Thanks for your work!
> > 
> > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> > > ---
> > >  drivers/pmdomain/rockchip/pm-domains.c | 27 ++++++++++++++++++++++++++
> > >  1 file changed, 27 insertions(+)
> > > 
> > > diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
> > > index 4cce407bb1eb..242570c505fb 100644
> > > --- a/drivers/pmdomain/rockchip/pm-domains.c
> > > +++ b/drivers/pmdomain/rockchip/pm-domains.c
> > > @@ -35,6 +35,7 @@
> > >  #include <dt-bindings/power/rk3366-power.h>
> > >  #include <dt-bindings/power/rk3368-power.h>
> > >  #include <dt-bindings/power/rk3399-power.h>
> > > +#include <dt-bindings/power/rockchip,rk3528-power.h>
> > >  #include <dt-bindings/power/rockchip,rk3562-power.h>
> > 
> > But I had some trouble applying this patch on either Rockchip SoC tree
> > or linux-pm. Looking through the context, seems the patch depends on
> > some RK3562 PMU driver changes, which I couldn't find with some brief
> > searching among the list.
> > 
> > Which branch is the series based on?
> 
> are you sure you looked at the right linux-pm tree?
> 
> In [0] I do see rk3562 powerdomains applied.

Oops, thanks for the link! I was digging through rafael/linux-pm.git
actually...

> Heiko
> 
> 
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git/commit/?h=next&id=f89c082d44914f24dfb5b0219eb140369de5b612
> 
> 

Best regards,
Yao Zi

Re: [PATCH 5/9] dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain

[Conor Dooley]

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On Mon, May 19, 2025 at 07:03:37PM +0200, Jonas Karlman wrote:
> Hi Conor,
> 
> On 2025-05-19 18:12, Conor Dooley wrote:
> > On Sun, May 18, 2025 at 10:06:52PM +0000, Jonas Karlman wrote:
> >> The commit 7e856617a1f3 ("dt-bindings: mmc: Add support for rk3576
> >> eMMC") limited use of power-domains to Rockchip RK3576.
> >>
> >> Remove the power-domains: false to allow use of power-domains with more
> >> controllers, e.g. with SDHCI on Rockchip RK3528.
> > 
> > Meanwhile, you're allowing it for all devices, even ones where it is not
> > valid. I'm not keen on that.
> 
> All Rockchip variants technically belong to a power-domain, not just the
> RK3576. E.g. for RK3588 a PD_NVM0 domain (not described in DT), for
> RK3568 a VD_LOGIC ALIVE / BIU_SECURE_FLASH idle-only domain, and as
> shown in this series for the RK3528 the PD_VPU idle-only domain.

If they all do, that's fine.
Acked-by: Conor Dooley <conor.dooley@microchip.com>

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Re: [PATCH 5/9] dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain

[Ulf Hansson]

On Mon, 19 May 2025 at 00:07, Jonas Karlman <jonas@kwiboo.se> wrote:
>
> The commit 7e856617a1f3 ("dt-bindings: mmc: Add support for rk3576
> eMMC") limited use of power-domains to Rockchip RK3576.
>
> Remove the power-domains: false to allow use of power-domains with more
> controllers, e.g. with SDHCI on Rockchip RK3528.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> index 5fb347167004..f882219a0a26 100644
> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
> @@ -120,10 +120,6 @@ allOf:
>        required:
>          - power-domains
>
> -    else:
> -      properties:
> -        power-domains: false
> -
>  unevaluatedProperties: false
>
>  examples:
> --
> 2.49.0
>

Re: [PATCH 8/9] dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain

[Jonathan Cameron]

On Sun, 18 May 2025 22:06:55 +0000
Jonas Karlman <jonas@kwiboo.se> wrote:

> The SARADC controller in most Rockchip SoCs are part or power domains

part of power

I can fix that whilst applying if nothing else comes up.


> that are always powered on, i.e. PD_BUS or PD_PERI.
> 
> On RK3528 the SARADC controller is part of the PD_VPU power domain.
> 
> Add support to describe power-domains for the SARADC controllers.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
> index 41e0c56ef8e3..f776041fd08f 100644
> --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
> @@ -47,6 +47,9 @@ properties:
>        - const: saradc
>        - const: apb_pclk
>  
> +  power-domains:
> +    maxItems: 1
> +
>    resets:
>      maxItems: 1
>  

Re: [PATCH 6/9] dt-bindings: gpio: rockchip: Allow use of a power-domain

[Rob Herring]

On Sun, May 18, 2025 at 10:06:53PM +0000, Jonas Karlman wrote:
> The GPIO controllers in most Rockchip SoCs are part or power domains
> that are always powered on, i.e. PD_BUS or PD_PMU.

Are these described in DT, so this is valid to add for all SoCs?

> On RK3528 the GPIO controllers are spread out among the PD_RKVENC, PD_VO
> and PD_VPU power domains.

So should be required for RK3528?

> 
> Add support to describe power-domains for the GPIO controllers.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> index d76987ce8e50..bdd83f42615c 100644
> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> @@ -41,6 +41,9 @@ properties:
>    "#interrupt-cells":
>      const: 2
>  
> +  power-domains:
> +    maxItems: 1
> +
>  patternProperties:
>    "^.+-hog(-[0-9]+)?$":
>      type: object
> -- 
> 2.49.0
> 

Re: [PATCH 0/9] rockchip: Add power controller support for RK3528

[Ulf Hansson]

On Mon, 19 May 2025 at 00:07, Jonas Karlman <jonas@kwiboo.se> wrote:
>
> The Rockchip RK3528 support multiple power domains, one PD_GPU that can
> fully be powered down, and other that can be idle requested.
>
> Vendor kernel flag all power domains on RK3528 as always-on, this takes
> a different route and instead tries to describe all devices power-domain
> in the device tree, even for controllers with unsupported runtime status.
>
> The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
> prevent a full system reset when trying to read current rate of the
> SCMI_CLK_DDR clock.
>
> Patch 1-4 prepares and makes it possible to use the PD_GPU power domain
> for a separate "Add GPU support for RK3528" series.
>
> Patch 7-9 updates dt-bindings for controllers not supporting use of the
> power-domains prop and enables the PD_RKVENC, PD_VO and PD_VPU domains.
>
> pm_genpd_summary on a Radxa E20C after this:
>
>   domain                          status          children        performance
>       /device                         runtime status                  managed by
>   ------------------------------------------------------------------------------
>   vpu                             on                              0
>       ffaf0000.gpio                   unsupported                 0           SW
>       ffb10000.gpio                   unsupported                 0           SW
>       ffbe0000.ethernet               active                      0           SW
>       ffae0000.adc                    unsupported                 0           SW
>       ffbf0000.mmc                    suspended                   0           SW
>   vo                              on                              0
>       ffb00000.gpio                   unsupported                 0           SW
>       ffc30000.mmc                    suspended                   0           SW
>   venc                            on                              0
>       ffb20000.gpio                   unsupported                 0           SW
>       ffa58000.i2c                    unsupported                 0           SW
>   gpu                             off-0                           0
>       ff700000.gpu                    suspended                   0           SW
>
> Jonas Karlman (9):
>   dt-bindings: power: rockchip: Add support for RK3528
>   pmdomain: rockchip: Add support for RK3528
>   dt-bindings: rockchip: pmu: Add compatible for RK3528
>   arm64: dts: rockchip: Add power controller for RK3528
>   dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain
>   dt-bindings: gpio: rockchip: Allow use of a power-domain
>   dt-bindings: i2c: i2c-rk3x: Allow use of a power-domain
>   dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain
>   arm64: dts: rockchip: Enable more power domains for RK3528
>
>  .../devicetree/bindings/arm/rockchip/pmu.yaml |  2 +
>  .../bindings/gpio/rockchip,gpio-bank.yaml     |  3 +
>  .../devicetree/bindings/i2c/i2c-rk3x.yaml     |  3 +
>  .../bindings/iio/adc/rockchip-saradc.yaml     |  3 +
>  .../bindings/mmc/snps,dwcmshc-sdhci.yaml      |  4 -
>  .../power/rockchip,power-controller.yaml      |  1 +
>  arch/arm64/boot/dts/rockchip/rk3528.dtsi      | 87 +++++++++++++++++++
>  drivers/pmdomain/rockchip/pm-domains.c        | 27 ++++++
>  .../dt-bindings/power/rockchip,rk3528-power.h | 19 ++++
>  9 files changed, 145 insertions(+), 4 deletions(-)
>  create mode 100644 include/dt-bindings/power/rockchip,rk3528-power.h
>

Patch 1->3 applied for next, thanks! Note that patch1 and patch 3 are
also available on the immutable dt branch.

Kind regards
Uffe

Re: (subset) [PATCH 0/9] rockchip: Add power controller support for RK3528

[Heiko Stuebner]

On Sun, 18 May 2025 22:06:47 +0000, Jonas Karlman wrote:
> The Rockchip RK3528 support multiple power domains, one PD_GPU that can
> fully be powered down, and other that can be idle requested.
> 
> Vendor kernel flag all power domains on RK3528 as always-on, this takes
> a different route and instead tries to describe all devices power-domain
> in the device tree, even for controllers with unsupported runtime status.
> 
> [...]

Applied, thanks!

[4/9] arm64: dts: rockchip: Add power controller for RK3528
      commit: 654df8e74dbc19ba0625051079e6889e6999d16e

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

Re: [PATCH 6/9] dt-bindings: gpio: rockchip: Allow use of a power-domain

[Jonas Karlman]

Hi Rob,

On 2025-05-27 21:34, Rob Herring wrote:
> On Sun, May 18, 2025 at 10:06:53PM +0000, Jonas Karlman wrote:
>> The GPIO controllers in most Rockchip SoCs are part or power domains
>> that are always powered on, i.e. PD_BUS or PD_PMU.
> 
> Are these described in DT, so this is valid to add for all SoCs?

PD_BUS and PD_PMU for prior generation Rockchip SoCs has typically not
been fully described in device tree. Probably because they always needs
to be powered on or missing documentation.

> 
>> On RK3528 the GPIO controllers are spread out among the PD_RKVENC, PD_VO
>> and PD_VPU power domains.
> 
> So should be required for RK3528?

One of the five GPIO controllers on RK3528 is part of a power domain not
being described in the device tree. And without having access to any TRM
or other documentation it probably wont be. So requiring for RK3528 is
not fully possible, and for GPIO controllers in other Rockchip SoCs the
power-domain could theoretically be described in device tree.

Regards,
Jonas

> 
>>
>> Add support to describe power-domains for the GPIO controllers.
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>>  Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
>> index d76987ce8e50..bdd83f42615c 100644
>> --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
>> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
>> @@ -41,6 +41,9 @@ properties:
>>    "#interrupt-cells":
>>      const: 2
>>  
>> +  power-domains:
>> +    maxItems: 1
>> +
>>  patternProperties:
>>    "^.+-hog(-[0-9]+)?$":
>>      type: object
>> -- 
>> 2.49.0
>>