From: Jacky Chou <jacky_chou@aspeedtech.com>
To: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <andrew+netdev@lunn.ch>,
<davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
<pabeni@redhat.com>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <joel@jms.id.au>,
<andrew@codeconstruct.com.au>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <p.zabel@pengutronix.de>,
<BMC-SW@aspeedtech.com>
Subject: [net 2/4] dt-bindings: clock: ast2600: Add reset definitions for MAC1 and MAC2
Date: Tue, 20 May 2025 17:28:46 +0800 [thread overview]
Message-ID: <20250520092848.531070-3-jacky_chou@aspeedtech.com> (raw)
In-Reply-To: <20250520092848.531070-1-jacky_chou@aspeedtech.com>
Add ASPEED_RESET_MAC1 and ASPEED_RESET_MAC2 reset definitions to
the ast2600-clock binding header. These are required for proper
reset control of the MAC1 and MAC2 ethernet controllers on the
AST2600 SoC.
Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
---
include/dt-bindings/clock/ast2600-clock.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h
index 7ae96c7bd72f..f60fff261130 100644
--- a/include/dt-bindings/clock/ast2600-clock.h
+++ b/include/dt-bindings/clock/ast2600-clock.h
@@ -122,6 +122,8 @@
#define ASPEED_RESET_PCIE_DEV_OEN 20
#define ASPEED_RESET_PCIE_RC_O 19
#define ASPEED_RESET_PCIE_RC_OEN 18
+#define ASPEED_RESET_MAC2 12
+#define ASPEED_RESET_MAC1 11
#define ASPEED_RESET_PCI_DP 5
#define ASPEED_RESET_HACE 4
#define ASPEED_RESET_AHB 1
--
2.34.1
next prev parent reply other threads:[~2025-05-20 9:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-20 9:28 [net 0/4] net: ftgmac100: Add SoC reset support for RMII mode Jacky Chou
2025-05-20 9:28 ` [net 1/4] dt-bindings: net: ftgmac100: Add resets property Jacky Chou
2025-05-20 15:47 ` Conor Dooley
[not found] ` <SEYPR06MB51346A27CD1C50C2922FE30C9D64A@SEYPR06MB5134.apcprd06.prod.outlook.com>
2025-05-27 14:13 ` Conor Dooley
2025-05-20 9:28 ` Jacky Chou [this message]
2025-05-20 15:48 ` [net 2/4] dt-bindings: clock: ast2600: Add reset definitions for MAC1 and MAC2 Conor Dooley
2025-05-20 9:28 ` [net 3/4] ARM: dts: aspeed-g6: Add resets property for MAC controllers Jacky Chou
2025-05-20 9:28 ` [net 4/4] net: ftgmac100: Add optional reset control for RMII mode on Aspeed SoCs Jacky Chou
2025-05-20 14:30 ` [net 0/4] net: ftgmac100: Add SoC reset support for RMII mode Andrew Lunn
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