[PATCH 0/2] Convert RK3399 dp-typec phy binding to yaml

[PATCH 0/2] Convert RK3399 dp-typec phy binding to yaml

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

This series convert phy-rockchip-typec.txt to yaml.

PATCH1 try to remove unused "orientation-switch" property for
rk3399-eaidk-610 board.
PATCH2 try to convert phy-rockchip-typec.txt to yaml.

Chaoyi Chen (2):
  arm64: dts: rockchip: Remove unused usb phy prop for rk3399-eaidk-610
  dt-bindings: phy: Convert phy-rockchip-typec.txt to yaml

 .../bindings/phy/phy-rockchip-typec.txt       |  84 -------------
 .../phy/rockchip,rk3399-typec-phy.yaml        | 111 ++++++++++++++++++
 .../boot/dts/rockchip/rk3399-eaidk-610.dts    |   1 -
 3 files changed, 111 insertions(+), 85 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
 create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml

--
2.49.0

[PATCH 1/2] arm64: dts: rockchip: Remove unused usb phy prop for rk3399-eaidk-610

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

The rk3399 tcphy driver does not use the "orientation-switch"
property, so it has no real effect. Just remove it.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts b/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
index b90bf26b58be..7b5b83bd90ac 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts
@@ -803,7 +803,6 @@ &tcphy0 {
 };
 
 &tcphy0_usb3 {
-	orientation-switch;
 	port {
 		tcphy0_typec_ss: endpoint {
 			remote-endpoint = <&usbc_ss>;
-- 
2.49.0

[PATCH 2/2] dt-bindings: phy: Convert phy-rockchip-typec.txt to yaml

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

Convert phy-rockchip-typec.txt to yaml.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 .../bindings/phy/phy-rockchip-typec.txt       |  84 -------------
 .../phy/rockchip,rk3399-typec-phy.yaml        | 111 ++++++++++++++++++
 2 files changed, 111 insertions(+), 84 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
 create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
deleted file mode 100644
index 960da7fcaa9e..000000000000
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
+++ /dev/null
@@ -1,84 +0,0 @@
-* ROCKCHIP type-c PHY
----------------------
-
-Required properties:
- - compatible : must be "rockchip,rk3399-typec-phy"
- - reg: Address and length of the usb phy control register set
- - rockchip,grf : phandle to the syscon managing the "general
-   register files"
- - clocks : phandle + clock specifier for the phy clocks
- - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref";
- - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
-		    <&cru SCLK_UPHY1_TCPDCORE>;
- - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
- - resets : a list of phandle + reset specifier pairs
- - reset-names : string reset name, must be:
-		 "uphy", "uphy-pipe", "uphy-tcphy"
-
-Optional properties:
- - extcon : extcon specifier for the Power Delivery
-
-Required nodes : a sub-node is required for each port the phy provides.
-		 The sub-node name is used to identify dp or usb3 port,
-		 and shall be the following entries:
-	* "dp-port" : the name of DP port.
-	* "usb3-port" : the name of USB3 port.
-
-Required properties (port (child) node):
-- #phy-cells : must be 0, See ./phy-bindings.txt for details.
-
-Deprecated properties, do not use in new device tree sources, these
-properties are determined by the compatible value:
- - rockchip,typec-conn-dir
- - rockchip,usb3tousb2-en
- - rockchip,external-psm
- - rockchip,pipe-status
-
-Example:
-	tcphy0: phy@ff7c0000 {
-		compatible = "rockchip,rk3399-typec-phy";
-		reg = <0x0 0xff7c0000 0x0 0x40000>;
-		rockchip,grf = <&grf>;
-		extcon = <&fusb0>;
-		clocks = <&cru SCLK_UPHY0_TCPDCORE>,
-			 <&cru SCLK_UPHY0_TCPDPHY_REF>;
-		clock-names = "tcpdcore", "tcpdphy-ref";
-		assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
-		assigned-clock-rates = <50000000>;
-		resets = <&cru SRST_UPHY0>,
-			 <&cru SRST_UPHY0_PIPE_L00>,
-			 <&cru SRST_P_UPHY0_TCPHY>;
-		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
-
-		tcphy0_dp: dp-port {
-			#phy-cells = <0>;
-		};
-
-		tcphy0_usb3: usb3-port {
-			#phy-cells = <0>;
-		};
-	};
-
-	tcphy1: phy@ff800000 {
-		compatible = "rockchip,rk3399-typec-phy";
-		reg = <0x0 0xff800000 0x0 0x40000>;
-		rockchip,grf = <&grf>;
-		extcon = <&fusb1>;
-		clocks = <&cru SCLK_UPHY1_TCPDCORE>,
-			 <&cru SCLK_UPHY1_TCPDPHY_REF>;
-		clock-names = "tcpdcore", "tcpdphy-ref";
-		assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
-		assigned-clock-rates = <50000000>;
-		resets = <&cru SRST_UPHY1>,
-			 <&cru SRST_UPHY1_PIPE_L00>,
-			 <&cru SRST_P_UPHY1_TCPHY>;
-		reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
-
-		tcphy1_dp: dp-port {
-			#phy-cells = <0>;
-		};
-
-		tcphy1_usb3: usb3-port {
-			#phy-cells = <0>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml
new file mode 100644
index 000000000000..4b4e37ec13cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml
@@ -0,0 +1,111 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/rockchip,rk3399-typec-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip RK3399 USBDP Combo PHY
+
+maintainers:
+  - Frank Wang <frank.wang@rock-chips.com>
+  - Zhang Yubing <yubing.zhang@rock-chips.com>
+
+properties:
+  compatible:
+    items:
+      - const: rockchip,rk3399-typec-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: tcpdcore
+      - const: tcpdphy-ref
+
+  extcon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      extcon specifier for the Power Delivery
+
+  power-domains:
+    maxItems: 1
+
+  resets:
+    maxItems: 3
+
+  reset-names:
+    items:
+      - const: uphy
+      - const: uphy-pipe
+      - const: uphy-tcphy
+
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Some additional phy settings are access through GRF regs.
+
+  dp-port:
+    description: A sub-node to identify the dp phy provides.
+    type: object
+    additionalProperties: false
+    properties:
+      port:
+        $ref: /schemas/graph.yaml#/properties/port
+      "#phy-cells":
+        const: 0
+
+  usb3-port:
+    description: A sub-node to identify the usb3 phy provides.
+    type: object
+    additionalProperties: false
+    properties:
+      port:
+        $ref: /schemas/graph.yaml#/properties/port
+      "#phy-cells":
+        const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+  - rockchip,grf
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/rk3399-cru.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/power/rk3399-power.h>
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        phy@ff7c0000 {
+            compatible = "rockchip,rk3399-typec-phy";
+            reg = <0x0 0xff7c0000 0x0 0x40000>;
+            extcon = <&fusb0>;
+            clocks = <&cru SCLK_UPHY0_TCPDCORE>, <&cru SCLK_UPHY0_TCPDPHY_REF>;
+            clock-names = "tcpdcore", "tcpdphy-ref";
+            assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
+            assigned-clock-rates = <50000000>;
+            resets = <&cru SRST_UPHY0>, <&cru SRST_UPHY0_PIPE_L00>, <&cru SRST_P_UPHY0_TCPHY>;
+            reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
+            rockchip,grf = <&grf>;
+
+            tcphy0_dp: dp-port {
+                #phy-cells = <0>;
+            };
+
+            tcphy0_usb3: usb3-port {
+                #phy-cells = <0>;
+            };
+        };
+    };
-- 
2.49.0

Re: [PATCH 2/2] dt-bindings: phy: Convert phy-rockchip-typec.txt to yaml

[Rob Herring]

On Mon, May 19, 2025 at 10:48:20AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> 
> Convert phy-rockchip-typec.txt to yaml.

Thanks, but I already converted this one and it is queued up in 
linux-next. There's still a few more rockchip ones to do:

['mps,mp8859']
['realtek,rt5651']
['rockchip,rk3368-mailbox']
['rockchip,rk3399-cdn-dp']
['rockchip,rk3399-gru-sound']
['sitronix,st1624', 'sitronix,st1633']
['ti,tsc2007']

I see you already posted cdn-dp. Thanks!

Rob

Re: [PATCH 2/2] dt-bindings: phy: Convert phy-rockchip-typec.txt to yaml

[Chaoyi Chen]

On 2025/5/21 3:32, Rob Herring wrote:

> On Mon, May 19, 2025 at 10:48:20AM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> Convert phy-rockchip-typec.txt to yaml.
> Thanks, but I already converted this one and it is queued up in
> linux-next. There's still a few more rockchip ones to do:

Oh, I missed it. Thank you!


>
> ['mps,mp8859']
> ['realtek,rt5651']
> ['rockchip,rk3368-mailbox']
> ['rockchip,rk3399-cdn-dp']
> ['rockchip,rk3399-gru-sound']
> ['sitronix,st1624', 'sitronix,st1633']
> ['ti,tsc2007']
>
> I see you already posted cdn-dp. Thanks!
>
> Rob
>
>