From: James Clark <james.clark@linaro.org>
To: Vladimir Oltean <olteanv@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Matti Vaittinen <mazziesaccount@gmail.com>
Cc: Conor Dooley <conor+dt@kernel.org>, Frank Li <Frank.Li@nxp.com>,
Chester Lin <chester62515@gmail.com>,
Matthias Brugger <mbrugger@suse.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>,
NXP S32 Linux Team <s32@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Chao Fu <B44548@freescale.com>,
Xiubo Li <Li.Xiubo@freescale.com>,
Lukasz Majewski <lukma@denx.de>,
linux-spi@vger.kernel.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Dan Carpenter <dan.carpenter@linaro.org>,
Larisa Grigore <larisa.grigore@nxp.com>,
Xulin Sun <xulin.sun@windriver.com>,
James Clark <james.clark@linaro.org>
Subject: [PATCH v2 01/14] spi: spi-fsl-dspi: restrict register range for regmap access
Date: Thu, 22 May 2025 15:51:30 +0100 [thread overview]
Message-ID: <20250522-james-nxp-spi-v2-1-bea884630cfb@linaro.org> (raw)
In-Reply-To: <20250522-james-nxp-spi-v2-0-bea884630cfb@linaro.org>
From: Larisa Grigore <larisa.grigore@nxp.com>
DSPI registers are NOT continuous, some registers are reserved and
accessing them from userspace will trigger external abort, add regmap
register access table to avoid below abort.
For example on S32G:
# cat /sys/kernel/debug/regmap/401d8000.spi/registers
Internal error: synchronous external abort: 96000210 1 PREEMPT SMP
...
Call trace:
regmap_mmio_read32le+0x24/0x48
regmap_mmio_read+0x48/0x70
_regmap_bus_reg_read+0x38/0x48
_regmap_read+0x68/0x1b0
regmap_read+0x50/0x78
regmap_read_debugfs+0x120/0x338
Fixes: 1acbdeb92c87 ("spi/fsl-dspi: Convert to use regmap and add big-endian support")
Co-developed-by: Xulin Sun <xulin.sun@windriver.com>
Signed-off-by: Xulin Sun <xulin.sun@windriver.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: James Clark <james.clark@linaro.org>
---
drivers/spi/spi-fsl-dspi.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 067c954cb6ea..effb460d436d 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2013 Freescale Semiconductor, Inc.
-// Copyright 2020 NXP
+// Copyright 2020-2025 NXP
//
// Freescale DSPI driver
// This file contains a driver for the Freescale DSPI
@@ -1167,6 +1167,20 @@ static int dspi_resume(struct device *dev)
static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume);
+static const struct regmap_range dspi_yes_ranges[] = {
+ regmap_reg_range(SPI_MCR, SPI_MCR),
+ regmap_reg_range(SPI_TCR, SPI_CTAR(3)),
+ regmap_reg_range(SPI_SR, SPI_TXFR3),
+ regmap_reg_range(SPI_RXFR0, SPI_RXFR3),
+ regmap_reg_range(SPI_CTARE(0), SPI_CTARE(3)),
+ regmap_reg_range(SPI_SREX, SPI_SREX),
+};
+
+static const struct regmap_access_table dspi_access_table = {
+ .yes_ranges = dspi_yes_ranges,
+ .n_yes_ranges = ARRAY_SIZE(dspi_yes_ranges),
+};
+
static const struct regmap_range dspi_volatile_ranges[] = {
regmap_reg_range(SPI_MCR, SPI_TCR),
regmap_reg_range(SPI_SR, SPI_SR),
@@ -1184,6 +1198,8 @@ static const struct regmap_config dspi_regmap_config = {
.reg_stride = 4,
.max_register = 0x88,
.volatile_table = &dspi_volatile_table,
+ .rd_table = &dspi_access_table,
+ .wr_table = &dspi_access_table,
};
static const struct regmap_range dspi_xspi_volatile_ranges[] = {
@@ -1205,6 +1221,8 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
.reg_stride = 4,
.max_register = 0x13c,
.volatile_table = &dspi_xspi_volatile_table,
+ .rd_table = &dspi_access_table,
+ .wr_table = &dspi_access_table,
},
{
.name = "pushr",
--
2.34.1
next prev parent reply other threads:[~2025-05-22 15:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 14:51 [PATCH v2 00/14] spi: spi-fsl-dspi: DSPI support for NXP S32G platforms James Clark
2025-05-22 14:51 ` James Clark [this message]
2025-05-22 14:51 ` [PATCH v2 02/14] spi: spi-fsl-dspi: Halt the module after a new message transfer James Clark
2025-05-22 14:51 ` [PATCH v2 03/14] spi: spi-fsl-dspi: Reset SR flags before sending a new message James Clark
2025-05-22 14:51 ` [PATCH v2 04/14] spi: spi-fsl-dspi: Re-use one volatile regmap for both device types James Clark
2025-05-22 14:51 ` [PATCH v2 05/14] spi: spi-fsl-dspi: Define regmaps per device James Clark
2025-05-22 14:51 ` [PATCH v2 06/14] spi: spi-fsl-dspi: Add config and regmaps for S32G platforms James Clark
2025-05-22 14:51 ` [PATCH v2 07/14] spi: spi-fsl-dspi: Use spi_alloc_target for target James Clark
2025-05-22 14:51 ` [PATCH v2 08/14] spi: spi-fsl-dspi: Avoid setup_accel logic for DMA transfers James Clark
2025-05-22 14:51 ` [PATCH v2 09/14] spi: spi-fsl-dspi: Use DMA for S32G controller in target mode James Clark
2025-05-22 14:51 ` [PATCH v2 10/14] spi: spi-fsl-dspi: Reinitialize DSPI regs after resuming for S32G James Clark
2025-05-22 14:51 ` [PATCH v2 11/14] spi: spi-fsl-dspi: Enable modified transfer protocol on S32G James Clark
2025-05-22 14:51 ` [PATCH v2 12/14] dt-bindings: spi: dspi: Add S32G support James Clark
2025-05-22 14:51 ` [PATCH v2 13/14] spi: spi-fsl-dspi: Enable support for S32G platforms James Clark
2025-05-22 14:51 ` [PATCH v2 14/14] arm64: dts: Add DSPI entries " James Clark
2025-06-19 7:38 ` Shawn Guo
2025-05-22 17:17 ` (subset) [PATCH v2 00/14] spi: spi-fsl-dspi: DSPI support for NXP " Mark Brown
2025-06-09 19:33 ` Mark Brown
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250522-james-nxp-spi-v2-1-bea884630cfb@linaro.org \
--to=james.clark@linaro.org \
--cc=B44548@freescale.com \
--cc=Frank.Li@nxp.com \
--cc=Li.Xiubo@freescale.com \
--cc=broonie@kernel.org \
--cc=chester62515@gmail.com \
--cc=conor+dt@kernel.org \
--cc=dan.carpenter@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=ghennadi.procopciuc@oss.nxp.com \
--cc=imx@lists.linux.dev \
--cc=kernel@pengutronix.de \
--cc=krzk+dt@kernel.org \
--cc=larisa.grigore@nxp.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=lukma@denx.de \
--cc=mazziesaccount@gmail.com \
--cc=mbrugger@suse.com \
--cc=olteanv@gmail.com \
--cc=robh@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=s32@nxp.com \
--cc=shawnguo@kernel.org \
--cc=vladimir.oltean@nxp.com \
--cc=xulin.sun@windriver.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).