[PATCH 0/4] Increase i.MX8MP VPU

[PATCH 0/4] Increase i.MX8MP VPU

[Adam Ford]

Some of the VPU clocks are under rated, even for nominal ratings.
Fix the nominial VPU clocks and clock parents, then introduce
the overdrive clock rates.  The fluster scores don't decrease,
but they do go faster.

This series was adapted from an RFC from Marco Felsch which
was setup to introduce the VC8000E encoder and extacted the
parts that affect the existing infrastructure.

Adam Ford (2):
  arm64: dts: imx8mp-nominal: Explicitly configure nominal VPU clocks
  arm64: dts: imx8mp: Configure VPU clocks for overdrive

Marco Felsch (2):
  arm64: dts: imx8mp: drop gpcv2 vpu power-domains and clocks
  arm64: dts: imx8mp: fix VPU_BUS clock setting

 .../boot/dts/freescale/imx8mp-nominal.dtsi    | 18 ++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mp.dtsi     | 21 +++++++------------
 2 files changed, 25 insertions(+), 14 deletions(-)

-- 
2.48.1

[PATCH 1/4] arm64: dts: imx8mp: drop gpcv2 vpu power-domains and clocks

[Adam Ford]

From: Marco Felsch <m.felsch@pengutronix.de>

The GPCv2 G1, G2 and VC8000E power-domain don't need to reference the
VPUMIX power-domain nor their module clocks since the power and reset
handling is done by the VPUMIX blkctrl driver.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 948b88cf5e9d..1bf15c502280 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -876,24 +876,17 @@ pgc_mediamix: power-domain@10 {
 
 					pgc_vpu_g1: power-domain@11 {
 						#power-domain-cells = <0>;
-						power-domains = <&pgc_vpumix>;
 						reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
-						clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
 					};
 
 					pgc_vpu_g2: power-domain@12 {
 						#power-domain-cells = <0>;
-						power-domains = <&pgc_vpumix>;
 						reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
-						clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
-
 					};
 
 					pgc_vpu_vc8000e: power-domain@13 {
 						#power-domain-cells = <0>;
-						power-domains = <&pgc_vpumix>;
 						reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
-						clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
 					};
 
 					pgc_hdmimix: power-domain@14 {
-- 
2.48.1

[PATCH 2/4] arm64: dts: imx8mp: fix VPU_BUS clock setting

[Adam Ford]

From: Marco Felsch <m.felsch@pengutronix.de>

The VPU_PLL clock must be set before the VPU_BUS clock which is derived
from the VPU_PLL clock else the VPU_BUS clock is 300MHz and not 600MHz.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 1bf15c502280..909555a5da4b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2283,8 +2283,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
 				 <&clk IMX8MP_CLK_VPU_G2_ROOT>,
 				 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
 			clock-names = "g1", "g2", "vc8000e";
-			assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>;
-			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
+			assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
 			assigned-clock-rates = <600000000>, <600000000>;
 			interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
-- 
2.48.1

[PATCH 3/4] arm64: dts: imx8mp-nominal: Explicitly configure nominal VPU clocks

[Adam Ford]

In preparation for increasing the default VPU clocks to overdrive,
configure the nominal values first to avoid running the nominal
devices out of spec when imx8mp.dtsi is changed.

Signed-off-by: Adam Ford <aford173@gmail.com>
---
 .../boot/dts/freescale/imx8mp-nominal.dtsi     | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi
index 2ce1860b244d..f269f7a004fc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi
@@ -89,4 +89,22 @@ &media_blk_ctrl {
 			       <1039500000>;
 };
 
+&vpu_g1 {
+	assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
+	assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+	assigned-clock-rates = <600000000>;
+};
+
+&vpu_g2 {
+	assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
+	assigned-clock-rates = <500000000>;
+};
+
+&vpumix_blk_ctrl {
+	assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
+	assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
+	assigned-clock-rates = <600000000>, <600000000>;
+};
+
 /delete-node/ &{noc_opp_table/opp-1000000000};
-- 
2.48.1

[PATCH 4/4] arm64: dts: imx8mp: Configure VPU clocks for overdrive

[Adam Ford]

The defaults for this SoC are configured for overdrive mode, but
the VPU clocks are currently configured for nominal mode.
Increase VPU_G1_CLK_ROOT to 800MHZ from 600MHz,
Increase VPU_G2_CLK_ROOT to 700MHZ from 500MHz, and
Increase VPU_BUS_CLK_ROOT to 800MHz from 600MHz.

This requires adjusting the clock parents. Since there is already
800MHz clock references, move the VPU_BUS and G1 clocks to it.
This frees up the VPU_PLL to be configured at 700MHz to run
the G2 clock at 700MHz.

Signed-off-by: Adam Ford <aford173@gmail.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 909555a5da4b..848b25c9b752 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -2256,8 +2256,8 @@ vpu_g1: video-codec@38300000 {
 			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
 			assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
-			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
-			assigned-clock-rates = <600000000>;
+			assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
+			assigned-clock-rates = <800000000>;
 			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
 		};
 
@@ -2267,8 +2267,8 @@ vpu_g2: video-codec@38310000 {
 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
 			assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
-			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
-			assigned-clock-rates = <500000000>;
+			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
+			assigned-clock-rates = <700000000>;
 			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
 		};
 
@@ -2284,8 +2284,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
 				 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
 			clock-names = "g1", "g2", "vc8000e";
 			assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
-			assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
-			assigned-clock-rates = <600000000>, <600000000>;
+			assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL1_800M>;
+			assigned-clock-rates = <700000000>, <800000000>;
 			interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>,
 					<&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
-- 
2.48.1

Re: [PATCH 4/4] arm64: dts: imx8mp: Configure VPU clocks for overdrive

[Marco Felsch]

Hi Adam,

thanks for the patch.

On 25-05-30, Adam Ford wrote:
> The defaults for this SoC are configured for overdrive mode, but
> the VPU clocks are currently configured for nominal mode.
> Increase VPU_G1_CLK_ROOT to 800MHZ from 600MHz,
> Increase VPU_G2_CLK_ROOT to 700MHZ from 500MHz, and
> Increase VPU_BUS_CLK_ROOT to 800MHz from 600MHz.
> 
> This requires adjusting the clock parents. Since there is already
> 800MHz clock references, move the VPU_BUS and G1 clocks to it.
> This frees up the VPU_PLL to be configured at 700MHz to run
> the G2 clock at 700MHz.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 909555a5da4b..848b25c9b752 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -2256,8 +2256,8 @@ vpu_g1: video-codec@38300000 {
>  			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
>  			assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> -			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> -			assigned-clock-rates = <600000000>;
> +			assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
> +			assigned-clock-rates = <800000000>;
>  			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
>  		};
>  
> @@ -2267,8 +2267,8 @@ vpu_g2: video-codec@38310000 {
>  			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
>  			assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> -			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
> -			assigned-clock-rates = <500000000>;
> +			assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +			assigned-clock-rates = <700000000>;
>  			power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
>  		};
>  
> @@ -2284,8 +2284,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
>  				 <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
>  			clock-names = "g1", "g2", "vc8000e";
>  			assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> -			assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> -			assigned-clock-rates = <600000000>, <600000000>;
> +			assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL1_800M>;
> +			assigned-clock-rates = <700000000>, <800000000>;

I think we can drop the "assigned-clocks = <&clk IMX8MP_VPU_PLL>" part
completely.

Before your patch the IMX8MP_VPU_PLL_OUT was used as clock-parent for
the IMX8MP_CLK_VPU_BUS. With yout patch IMX8MP_SYS_PLL1_800M is used.

Regards,
  Marco

Re: [PATCH 3/4] arm64: dts: imx8mp-nominal: Explicitly configure nominal VPU clocks

[Ahmad Fatoum]

Hello Adam,

On 31.05.25 00:17, Adam Ford wrote:
> In preparation for increasing the default VPU clocks to overdrive,
> configure the nominal values first to avoid running the nominal
> devices out of spec when imx8mp.dtsi is changed.

Thanks for keeping imx8mp-nominal.dtsi users in mind.

> 
> Signed-off-by: Adam Ford <aford173@gmail.com>

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

Cheers,
Ahmad

> ---
>  .../boot/dts/freescale/imx8mp-nominal.dtsi     | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi
> index 2ce1860b244d..f269f7a004fc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi
> @@ -89,4 +89,22 @@ &media_blk_ctrl {
>  			       <1039500000>;
>  };
>  
> +&vpu_g1 {
> +	assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> +	assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> +	assigned-clock-rates = <600000000>;
> +};
> +
> +&vpu_g2 {
> +	assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> +	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
> +	assigned-clock-rates = <500000000>;
> +};
> +
> +&vpumix_blk_ctrl {
> +	assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> +	assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> +	assigned-clock-rates = <600000000>, <600000000>;
> +};
> +
>  /delete-node/ &{noc_opp_table/opp-1000000000};


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Re: [PATCH 4/4] arm64: dts: imx8mp: Configure VPU clocks for overdrive

[Adam Ford]

On Sun, Jun 1, 2025 at 1:36 PM Marco Felsch <m.felsch@pengutronix.de> wrote:
>
> Hi Adam,
>
> thanks for the patch.
>
> On 25-05-30, Adam Ford wrote:
> > The defaults for this SoC are configured for overdrive mode, but
> > the VPU clocks are currently configured for nominal mode.
> > Increase VPU_G1_CLK_ROOT to 800MHZ from 600MHz,
> > Increase VPU_G2_CLK_ROOT to 700MHZ from 500MHz, and
> > Increase VPU_BUS_CLK_ROOT to 800MHz from 600MHz.
> >
> > This requires adjusting the clock parents. Since there is already
> > 800MHz clock references, move the VPU_BUS and G1 clocks to it.
> > This frees up the VPU_PLL to be configured at 700MHz to run
> > the G2 clock at 700MHz.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 909555a5da4b..848b25c9b752 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -2256,8 +2256,8 @@ vpu_g1: video-codec@38300000 {
> >                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> >                       clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> >                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> > -                     assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > -                     assigned-clock-rates = <600000000>;
> > +                     assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
> > +                     assigned-clock-rates = <800000000>;
> >                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
> >               };
> >
> > @@ -2267,8 +2267,8 @@ vpu_g2: video-codec@38310000 {
> >                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> >                       clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> >                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> > -                     assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
> > -                     assigned-clock-rates = <500000000>;
> > +                     assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > +                     assigned-clock-rates = <700000000>;
> >                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
> >               };
> >
> > @@ -2284,8 +2284,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
> >                                <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> >                       clock-names = "g1", "g2", "vc8000e";
> >                       assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> > -                     assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> > -                     assigned-clock-rates = <600000000>, <600000000>;
> > +                     assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL1_800M>;
> > +                     assigned-clock-rates = <700000000>, <800000000>;
>
> I think we can drop the "assigned-clocks = <&clk IMX8MP_VPU_PLL>" part
> completely.
>
> Before your patch the IMX8MP_VPU_PLL_OUT was used as clock-parent for
> the IMX8MP_CLK_VPU_BUS. With yout patch IMX8MP_SYS_PLL1_800M is used.

I think you're right.  I'll fix that up and do a V2.  I forgot to add
my own s-o-b tag, so I'll fix that too.  I'll try to do it this week.

adam
>
> Regards,
>   Marco

Re: [PATCH 4/4] arm64: dts: imx8mp: Configure VPU clocks for overdrive

[Adam Ford]

On Mon, Jun 2, 2025 at 10:35 AM Adam Ford <aford173@gmail.com> wrote:
>
> On Sun, Jun 1, 2025 at 1:36 PM Marco Felsch <m.felsch@pengutronix.de> wrote:
> >
> > Hi Adam,
> >
> > thanks for the patch.
> >
> > On 25-05-30, Adam Ford wrote:
> > > The defaults for this SoC are configured for overdrive mode, but
> > > the VPU clocks are currently configured for nominal mode.
> > > Increase VPU_G1_CLK_ROOT to 800MHZ from 600MHz,
> > > Increase VPU_G2_CLK_ROOT to 700MHZ from 500MHz, and
> > > Increase VPU_BUS_CLK_ROOT to 800MHz from 600MHz.
> > >
> > > This requires adjusting the clock parents. Since there is already
> > > 800MHz clock references, move the VPU_BUS and G1 clocks to it.
> > > This frees up the VPU_PLL to be configured at 700MHz to run
> > > the G2 clock at 700MHz.
> > >
> > > Signed-off-by: Adam Ford <aford173@gmail.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
> > >  1 file changed, 6 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > index 909555a5da4b..848b25c9b752 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > @@ -2256,8 +2256,8 @@ vpu_g1: video-codec@38300000 {
> > >                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > >                       clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> > >                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> > > -                     assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > > -                     assigned-clock-rates = <600000000>;
> > > +                     assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
> > > +                     assigned-clock-rates = <800000000>;
> > >                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
> > >               };
> > >
> > > @@ -2267,8 +2267,8 @@ vpu_g2: video-codec@38310000 {
> > >                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > >                       clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> > >                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> > > -                     assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
> > > -                     assigned-clock-rates = <500000000>;
> > > +                     assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > > +                     assigned-clock-rates = <700000000>;
> > >                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
> > >               };
> > >
> > > @@ -2284,8 +2284,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
> > >                                <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> > >                       clock-names = "g1", "g2", "vc8000e";
> > >                       assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> > > -                     assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> > > -                     assigned-clock-rates = <600000000>, <600000000>;
> > > +                     assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL1_800M>;
> > > +                     assigned-clock-rates = <700000000>, <800000000>;
> >
> > I think we can drop the "assigned-clocks = <&clk IMX8MP_VPU_PLL>" part
> > completely.
> >
> > Before your patch the IMX8MP_VPU_PLL_OUT was used as clock-parent for
> > the IMX8MP_CLK_VPU_BUS. With yout patch IMX8MP_SYS_PLL1_800M is used.
>
> I think you're right.  I'll fix that up and do a V2.  I forgot to add
> my own s-o-b tag, so I'll fix that too.  I'll try to do it this week.

Marco,

I tried removing the assigned-clock references to the IMX8MP_VPU_PLL,
but i found the defaul speed was 800MHz for the PLL even when asking
G2 to be 700MHz.  The only way that I found to set the G2 to 700MHz
was to set the VPU_PLL to 700MHz.  I can do that either inside the G2
node or the vpumix_blk_ctrl node. I generally like to have the
blk_ctrl do it since it controls the G1_ROOT and G2_ROOT clocks, but
it doesn't seem to hurt it being inside the G2 node either.  I can see
the argument for having it insde the G2 node, since the G2 clock is
what's requiring the VPU_PLL to be 700MHz.

Let me know your preferences, and I'll move forward accordingly.

adam
>
> adam
> >
> > Regards,
> >   Marco

Re: [PATCH 4/4] arm64: dts: imx8mp: Configure VPU clocks for overdrive

[Marco Felsch]

On 25-06-03, Adam Ford wrote:
> On Mon, Jun 2, 2025 at 10:35 AM Adam Ford <aford173@gmail.com> wrote:
> >
> > On Sun, Jun 1, 2025 at 1:36 PM Marco Felsch <m.felsch@pengutronix.de> wrote:
> > >
> > > Hi Adam,
> > >
> > > thanks for the patch.
> > >
> > > On 25-05-30, Adam Ford wrote:
> > > > The defaults for this SoC are configured for overdrive mode, but
> > > > the VPU clocks are currently configured for nominal mode.
> > > > Increase VPU_G1_CLK_ROOT to 800MHZ from 600MHz,
> > > > Increase VPU_G2_CLK_ROOT to 700MHZ from 500MHz, and
> > > > Increase VPU_BUS_CLK_ROOT to 800MHz from 600MHz.
> > > >
> > > > This requires adjusting the clock parents. Since there is already
> > > > 800MHz clock references, move the VPU_BUS and G1 clocks to it.
> > > > This frees up the VPU_PLL to be configured at 700MHz to run
> > > > the G2 clock at 700MHz.
> > > >
> > > > Signed-off-by: Adam Ford <aford173@gmail.com>
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------
> > > >  1 file changed, 6 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > index 909555a5da4b..848b25c9b752 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > @@ -2256,8 +2256,8 @@ vpu_g1: video-codec@38300000 {
> > > >                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > >                       clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> > > >                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
> > > > -                     assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > > > -                     assigned-clock-rates = <600000000>;
> > > > +                     assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
> > > > +                     assigned-clock-rates = <800000000>;
> > > >                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>;
> > > >               };
> > > >
> > > > @@ -2267,8 +2267,8 @@ vpu_g2: video-codec@38310000 {
> > > >                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > > >                       clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> > > >                       assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
> > > > -                     assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
> > > > -                     assigned-clock-rates = <500000000>;
> > > > +                     assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > > > +                     assigned-clock-rates = <700000000>;
> > > >                       power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>;
> > > >               };
> > > >
> > > > @@ -2284,8 +2284,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 {
> > > >                                <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> > > >                       clock-names = "g1", "g2", "vc8000e";
> > > >                       assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> > > > -                     assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> > > > -                     assigned-clock-rates = <600000000>, <600000000>;
> > > > +                     assigned-clock-parents = <0>, <&clk IMX8MP_SYS_PLL1_800M>;
> > > > +                     assigned-clock-rates = <700000000>, <800000000>;
> > >
> > > I think we can drop the "assigned-clocks = <&clk IMX8MP_VPU_PLL>" part
> > > completely.
> > >
> > > Before your patch the IMX8MP_VPU_PLL_OUT was used as clock-parent for
> > > the IMX8MP_CLK_VPU_BUS. With yout patch IMX8MP_SYS_PLL1_800M is used.
> >
> > I think you're right.  I'll fix that up and do a V2.  I forgot to add
> > my own s-o-b tag, so I'll fix that too.  I'll try to do it this week.
> 
> Marco,
> 
> I tried removing the assigned-clock references to the IMX8MP_VPU_PLL,
> but i found the defaul speed was 800MHz for the PLL even when asking
> G2 to be 700MHz.  The only way that I found to set the G2 to 700MHz
> was to set the VPU_PLL to 700MHz.  I can do that either inside the G2
> node or the vpumix_blk_ctrl node. I generally like to have the
> blk_ctrl do it since it controls the G1_ROOT and G2_ROOT clocks, but
> it doesn't seem to hurt it being inside the G2 node either.  I can see
> the argument for having it insde the G2 node, since the G2 clock is
> what's requiring the VPU_PLL to be 700MHz.
> 
> Let me know your preferences, and I'll move forward accordingly.

Hi Adam,

thanks for testing. IMHO we should do the clock handling within the G2
node. This requires no comments because the code would be obvious else
you need to comment the setup of the IMX8MP_VPU_PLL within the
vpumix_blk_ctrl node because this is not obvious.

Regards,
  Marco

Re: [PATCH 1/4] arm64: dts: imx8mp: drop gpcv2 vpu power-domains and clocks

[Peng Fan]

On Fri, May 30, 2025 at 05:17:08PM -0500, Adam Ford wrote:
>From: Marco Felsch <m.felsch@pengutronix.de>
>
>The GPCv2 G1, G2 and VC8000E power-domain don't need to reference the
>VPUMIX power-domain nor their module clocks since the power and reset
>handling is done by the VPUMIX blkctrl driver.
>
>Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>

LGTM: Reviewed-by: Peng Fan <peng.fan@nxp.com>

Just curious is there any issues without this change?

Regards,
Peng

Re: [PATCH 2/4] arm64: dts: imx8mp: fix VPU_BUS clock setting

[Peng Fan]

On Fri, May 30, 2025 at 05:17:09PM -0500, Adam Ford wrote:
>From: Marco Felsch <m.felsch@pengutronix.de>
>
>The VPU_PLL clock must be set before the VPU_BUS clock which is derived
>from the VPU_PLL clock else the VPU_BUS clock is 300MHz and not 600MHz.
>
>Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>

Fix tag missed?

Otherwise Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 3/4] arm64: dts: imx8mp-nominal: Explicitly configure nominal VPU clocks

[Peng Fan]

On Fri, May 30, 2025 at 05:17:10PM -0500, Adam Ford wrote:
>In preparation for increasing the default VPU clocks to overdrive,
>configure the nominal values first to avoid running the nominal
>devices out of spec when imx8mp.dtsi is changed.
>
>Signed-off-by: Adam Ford <aford173@gmail.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>

Re: [PATCH 1/4] arm64: dts: imx8mp: drop gpcv2 vpu power-domains and clocks

[Adam Ford]

On Wed, Jun 4, 2025 at 7:20 PM Peng Fan <peng.fan@oss.nxp.com> wrote:
>
> On Fri, May 30, 2025 at 05:17:08PM -0500, Adam Ford wrote:
> >From: Marco Felsch <m.felsch@pengutronix.de>
> >
> >The GPCv2 G1, G2 and VC8000E power-domain don't need to reference the
> >VPUMIX power-domain nor their module clocks since the power and reset
> >handling is done by the VPUMIX blkctrl driver.
> >
> >Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
>
> LGTM: Reviewed-by: Peng Fan <peng.fan@nxp.com>
>
> Just curious is there any issues without this change?

The vpumix_blk_ctrl driver handles the timing between the vpumix and
the g1, g2 and vc8000 devices.  From what I can tell, this is required
to make it not hang on an 8MPQDL where the VPU is not present.

adam
>
> Regards,
> Peng