Re: [RFC PATCH v2 1/4] PCI: pcie-rockchip: add Link Control and Status Register 2

Bjorn Helgaas
2025-06-12T22:54:36Z

On Thu, Jun 12, 2025 at 05:49:57PM -0300, Geraldo Nascimento wrote:
> On Wed, Jun 11, 2025 at 02:42:59PM -0500, Bjorn Helgaas wrote:
> > I would do a pure conversion patch of the existing #defines. Then I
> > suspect you wouldn't need a patch to add the Link 2 registers at all
> > because you could just use the #defines from pci_regs.h.
>
> Hi Bjorn,
>
> I've hit roadblock, maybe you can help?
>
> PCIE_RC_CONFIG_DCR_CSPL_LIMIT is defined as 0xff...
>
> I'd like to kill that define too, since it will be
> orphaned.
>
> But hardcoding 0xff seems like illegible solution.
>
> Perhaps there is another standard define that
> maps to 0xff that I can use? Anyone comes
> to your mind?

Maybe FIELD_MAX(PCI_EXP_DEVCAP_PWR_VAL)?