From: Nick Chan <towinchenmi@gmail.com>
To: Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Janne Grunau <j@jannau.net>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Neal Gompa <neal@gompa.dev>, Sven Peter <sven@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, devicetree@vger.kernel.org,
asahi@lists.linux.dev, linux-kernel@vger.kernel.org,
Nick Chan <towinchenmi@gmail.com>
Subject: [PATCH RESEND v7 16/21] arm64: dts: apple: s800-0-3: Add CPU PMU nodes
Date: Mon, 16 Jun 2025 09:32:05 +0800 [thread overview]
Message-ID: <20250616-apple-cpmu-v7-16-df2778a44d5c@gmail.com> (raw)
In-Reply-To: <20250616-apple-cpmu-v7-0-df2778a44d5c@gmail.com>
Add CPU PMU nodes for Apple A9 SoC.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
---
arch/arm64/boot/dts/apple/s800-0-3.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/s800-0-3.dtsi b/arch/arm64/boot/dts/apple/s800-0-3.dtsi
index c0e9ae45627c8150bc0ddcdc1e6ab65d52fa7219..56ac6e7f3803a16beacc74764262b02c75a96fce 100644
--- a/arch/arm64/boot/dts/apple/s800-0-3.dtsi
+++ b/arch/arm64/boot/dts/apple/s800-0-3.dtsi
@@ -167,6 +167,14 @@ timer {
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
+
+ pmu {
+ compatible = "apple,twister-pmu";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 76 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 79 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0 &cpu1>;
+ };
};
#include "s800-0-3-pmgr.dtsi"
--
2.49.0
next prev parent reply other threads:[~2025-06-16 2:10 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 1:31 [PATCH RESEND v7 00/21] drivers/perf: apple_m1: Add Apple A7-A11, T2 SoC support Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 01/21] dt-bindings: arm: pmu: Add Apple A7-A11 SoC CPU PMU compatibles Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 02/21] drivers/perf: apple_m1: Only init PMUv3 remap when EL2 is available Nick Chan
2025-07-14 15:11 ` Will Deacon
2025-07-14 15:37 ` Nick Chan
2025-07-17 15:16 ` Will Deacon
2025-06-16 1:31 ` [PATCH RESEND v7 03/21] drivers/perf: apple_m1: Support per-implementation event tables Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 04/21] drivers/perf: apple_m1: Support a per-implementation number of counters Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 05/21] drivers/perf: apple_m1: Support configuring counters for 32-bit EL0 Nick Chan
2025-07-14 15:12 ` Will Deacon
2025-06-16 1:31 ` [PATCH RESEND v7 06/21] drivers/perf: apple_m1: Support per-implementation PMU startup Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 07/21] drivers/perf: apple_m1: Support per-implementation event attr group Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 08/21] drivers/perf: apple_m1: Add Apple A7 support Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 09/21] drivers/perf: apple_m1: Add Apple A8/A8X support Nick Chan
2025-06-16 1:31 ` [PATCH RESEND v7 10/21] drivers/perf: apple_m1: Add A9/A9X support Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 11/21] drivers/perf: apple_m1: Add Apple A10/A10X/T2 Support Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 12/21] drivers/perf: apple_m1: Add Apple A11 Support Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 13/21] arm64: dts: apple: s5l8960x: Add CPU PMU nodes Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 14/21] arm64: dts: apple: t7000: " Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 15/21] arm64: dts: apple: t7001: " Nick Chan
2025-06-16 1:32 ` Nick Chan [this message]
2025-06-16 1:32 ` [PATCH RESEND v7 17/21] arm64: dts: apple: s8001: " Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 18/21] arm64: dts: apple: t8010: " Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 19/21] arm64: dts: apple: t8011: " Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 20/21] arm64: dts: apple: t8012: " Nick Chan
2025-06-16 1:32 ` [PATCH RESEND v7 21/21] arm64: dts: apple: t8015: " Nick Chan
2025-06-16 9:36 ` [PATCH RESEND v7 00/21] drivers/perf: apple_m1: Add Apple A7-A11, T2 SoC support Ian Rogers
2025-06-16 10:29 ` Will Deacon
2025-06-16 10:44 ` Ian Rogers
2025-06-17 14:16 ` Will Deacon
2025-06-17 16:28 ` Ian Rogers
2025-06-17 16:47 ` Marc Zyngier
2025-06-17 16:53 ` Ian Rogers
2025-06-16 10:35 ` Nick Chan
2025-07-14 15:12 ` Will Deacon
2025-07-14 15:59 ` Nick Chan
2025-07-17 15:05 ` Mark Rutland
2025-07-17 17:00 ` Nick Chan
2025-07-18 15:01 ` Mark Rutland
2025-07-18 20:45 ` Nick Chan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250616-apple-cpmu-v7-16-df2778a44d5c@gmail.com \
--to=towinchenmi@gmail.com \
--cc=alyssa@rosenzweig.io \
--cc=asahi@lists.linux.dev \
--cc=catalin.marinas@arm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=j@jannau.net \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=neal@gompa.dev \
--cc=robh@kernel.org \
--cc=sven@kernel.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).