From: "Clément Le Goffic" <clement.legoffic@foss.st.com>
To: "Alain Volmat" <alain.volmat@foss.st.com>,
"Mark Brown" <broonie@kernel.org>,
"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
"Valentin Caron" <valentin.caron@foss.st.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Erwan Leray" <erwan.leray@foss.st.com>,
"Fabrice Gasnier" <fabrice.gasnier@foss.st.com>,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"Christian König" <christian.koenig@amd.com>
Cc: linux-spi@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org,
linaro-mm-sig@lists.linaro.org,
"Clément Le Goffic" <clement.legoffic@foss.st.com>
Subject: [PATCH 3/6] dt-bindings: spi: stm32: update bindings with SPI Rx DMA-MDMA chaining
Date: Mon, 16 Jun 2025 11:21:04 +0200 [thread overview]
Message-ID: <20250616-spi-upstream-v1-3-7e8593f3f75d@foss.st.com> (raw)
In-Reply-To: <20250616-spi-upstream-v1-0-7e8593f3f75d@foss.st.com>
Add MDMA channel, and new sram property which are mandatory to enable
SPI Rx DMA-MDMA chaining.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
---
.../devicetree/bindings/spi/st,stm32-spi.yaml | 48 +++++++++++++++++++++-
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml
index 76e43c0ce36c..ca880a226afa 100644
--- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml
@@ -18,6 +18,38 @@ maintainers:
allOf:
- $ref: spi-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32f4-spi
+
+ then:
+ properties:
+ st,spi-midi-ns: false
+ sram: false
+ dmas:
+ maxItems: 2
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp25-spi
+
+ then:
+ properties:
+ sram: false
+ dmas:
+ maxItems: 2
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
properties:
compatible:
@@ -41,16 +73,28 @@ properties:
dmas:
description: |
- DMA specifiers for tx and rx dma. DMA fifo mode must be used. See
- the STM32 DMA controllers bindings Documentation/devicetree/bindings/dma/stm32/*.yaml.
+ DMA specifiers for tx and rx channels. DMA fifo mode must be used. See
+ the STM32 DMA bindings Documentation/devicetree/bindings/dma/stm32/st,*dma.yaml
+ minItems: 2
items:
- description: rx DMA channel
- description: tx DMA channel
+ - description: rxm2m MDMA channel
dma-names:
+ minItems: 2
items:
- const: rx
- const: tx
+ - const: rxm2m
+
+ sram:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: |
+ Phandles to a reserved SRAM region which is used as temporary
+ storage memory between DMA and MDMA engines.
+ The region should be defined as child node of the AHB SRAM node
+ as per the generic bindings in Documentation/devicetree/bindings/sram/sram.yaml
access-controllers:
minItems: 1
--
2.43.0
next prev parent reply other threads:[~2025-06-16 10:05 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 9:21 [PATCH 0/6] Add few updates to the STM32 SPI driver Clément Le Goffic
2025-06-16 9:21 ` [PATCH 1/6] spi: stm32: Add SPI_READY mode to spi controller Clément Le Goffic
2025-06-16 9:21 ` [PATCH 2/6] spi: stm32: Check for cfg availability in stm32_spi_probe Clément Le Goffic
2025-06-16 9:21 ` Clément Le Goffic [this message]
2025-06-16 9:21 ` [PATCH 4/6] spi: stm32: use STM32 DMA with STM32 MDMA to enhance DDR use Clément Le Goffic
2025-06-16 9:21 ` [PATCH 5/6] spi: stm32: deprecate `st,spi-midi-ns` property Clément Le Goffic
2025-06-16 9:21 ` [PATCH 6/6] dt-bindings: " Clément Le Goffic
2025-06-25 19:12 ` [PATCH 0/6] Add few updates to the STM32 SPI driver Mark Brown
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