Re: [PATCH 2/2] clk: sunxi-ng: sun55i-a523-r-ccu: Add missing PPU0 reset

[Andre Przywara <andre.przywara@arm.com>]

On Fri, 20 Jun 2025 01:10:25 +0800
Chen-Yu Tsai <wens@kernel.org> wrote:

Hi,

> From: Chen-Yu Tsai <wens@csie.org>
> 
> There is a PPU0 reset control bit in the same register as the PPU1
> reset control. This missing reset control is for the PCK-600 unit
> in the SoC. Manual tests show that the reset control indeed exists,
> and if not configured, the system will hang when the PCK-600 registers
> are accessed.
> 
> Add a reset entry for it at the end of the existing ones.

Right, just this one bit is not mentioned in the manuals (both A523 and
T527), even though the PPU1 reset bit and the PPU0 clock gate bit are,
so it's clearly a manual bug. I can also confirm that both bit 16 and 17
(and none above that) are writable, and both bit 16 (reset) and bit 0
(clock gate) are required to access the PCK-600 PPU (as per: sunxi-fel
readl 0x7060fc8).
 
> Fixes: 8cea339cfb81 ("clk: sunxi-ng: add support for the A523/T527 PRCM CCU")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Thanks for spotting this!

Cheers,
Andre

> ---
>  drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
> index b5464d8083c8..70ce0ca0cb7d 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun55i-a523-r.c
> @@ -204,6 +204,7 @@ static struct ccu_reset_map sun55i_a523_r_ccu_resets[] = {
>  	[RST_BUS_R_IR_RX]	= { 0x1cc, BIT(16) },
>  	[RST_BUS_R_RTC]		= { 0x20c, BIT(16) },
>  	[RST_BUS_R_CPUCFG]	= { 0x22c, BIT(16) },
> +	[RST_BUS_R_PPU0]	= { 0x1ac, BIT(16) },
>  };
>  
>  static const struct sunxi_ccu_desc sun55i_a523_r_ccu_desc = {