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Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by desiato.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uU5ZN-00000005Tcl-3eUm; Tue, 24 Jun 2025 15:28:24 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 85429445D4; Tue, 24 Jun 2025 15:28:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0BF9FC4CEE3; Tue, 24 Jun 2025 15:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750778896; bh=Pl3NFZyhrvklSpvN1eF/J9iEI8F8auASAYz/1jCX/eI=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=aX667HMmD7Y51beRdU5f4Hd584kRCoEk7KvoexSEew+t+eRh1pj1fR9UYQkqZHZfh fWZBuBKFpWbUuR18ZgET27bcKTR21VWtudD2h/MiJg6xbrWNzJmKi4wWdNJxp8UTpF cLfLjNx7iOPtPZpUkfu58+hbZmJ888pu5bFPuQLLNe3jewq+aBRDEgJjvD7ycC26mJ gerZK14v2YkZRrVmf2+j4+xZpI9yO8HqO8Rg7b5p731cuNj3lCL5h1fcWXBFxZrqNF KCL0s7tmxxejQDhFnb583lC+8Fm9OWcJ3n4gkCCspwZLuTbTLsDNKxeUPWTTXNkXBe /ynLZbIg6aNbg== Date: Tue, 24 Jun 2025 10:28:14 -0500 From: Bjorn Helgaas To: Jacky Chou Cc: "bhelgaas@google.com" , "lpieralisi@kernel.org" , "kwilczynski@kernel.org" , "mani@kernel.org" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "joel@jms.id.au" , "andrew@codeconstruct.com.au" , "vkoul@kernel.org" , "kishon@kernel.org" , "linus.walleij@linaro.org" , "p.zabel@pengutronix.de" , "linux-aspeed@lists.ozlabs.org" , "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-phy@lists.infradead.org" , "openbmc@lists.ozlabs.org" , "linux-gpio@vger.kernel.org" , "elbadrym@google.com" , "romlem@google.com" , "anhphan@google.com" , "wak@google.com" , "yuxiaozhang@google.com" , BMC-SW Subject: Re: =?utf-8?B?5Zue6KaG?= =?utf-8?Q?=3A?= [PATCH 5/7] ARM: dts: aspeed-g6: Add PCIe RC node Message-ID: <20250624152814.GA1477818@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250624_162822_279630_3CAB7366 X-CRM114-Status: GOOD ( 11.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jun 20, 2025 at 05:24:39AM +0000, Jacky Chou wrote: > > > + resets = <&syscon ASPEED_RESET_H2X>, > > > + <&syscon ASPEED_RESET_PCIE_RC_O>; > > > + reset-names = "h2x", "perst"; > > > > PERST# is clearly a per-Root Port item since it's a signal on the > > PCIe connector. Can you separate this and any other per-Root Port > > things into a Root Port stanza to leave open the possibility of > > future hardware that supports multiple Root Ports in the RC? > > The PCIe RC that designed by us is only one root port. Yes. But this driver may be used in the future for other RCs that include more than one Root Port, and it would be good if that didn't require structural changes to the DT. Also, there are RCs from other vendors that include more than one Root Port, and I'd like all the DTs and drivers to have similar structure. Bjorn