From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66780C7EE31 for ; Fri, 27 Jun 2025 10:43:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Q4s8pGA08nJ2ppMKYeSSJfjaUJqoOpavuQKbFXfOgfM=; b=zFoME3uyu0oYJOzyweJzmow03n QftVI3fkAJl9mNXv6BTXOMOrcyLsBeBsBF54/VtUgRaRm9pOD87xcCC7oH4Uyfpjgw2TqdVGUDVGN BYq0v/1MRnyjZzIufoGWmmk2wjEm0T7MsqaBvQDW/SrPteZrZlvn9EoarzRUapdiXQrnOHtwPjDjg kcMMODT5Yr7QuKQ8rVQYlx20XNgXg4+NqWeoTiD3+0A/oF50B4ett2nL0JpPRaCSKSUlQ52m80YJn Ov5uvrZdLuZznmiz3OIfswpGTj6zxg2nlo8BxHg0qflj0BnhKOroOMFvotx9u4Uq244rs7LitDYwm lsf1geYQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uV6Xo-0000000EK56-1Dq5; Fri, 27 Jun 2025 10:42:56 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uV67F-0000000EELm-2KRA for linux-arm-kernel@lists.infradead.org; Fri, 27 Jun 2025 10:15:32 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 55RA2wL1007309; Fri, 27 Jun 2025 12:15:13 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= Q4s8pGA08nJ2ppMKYeSSJfjaUJqoOpavuQKbFXfOgfM=; b=1QV1Q7/Mfqca/ART QlwWh04EZZssmN5BsGA/NgUwiR2qnJl1ToxW5EUfQjqbyuOYHXPgZ0zjoFlBjSps izXY2MjSMJL8vd63v3HMNHHsIhD4qekaVRJn6cSI2SsIa8Udn/s9A2gJnQuIBSZi ggpRgV1rS1ouDm3EUoavv8Ui8DZrntJ9TKc2slgIKgYtUuNbkI+u5hmiD8DwpIpH zvUST++a/1Qu7qkbuUDCuFDrGHxWvUn41Fyeb9v6Va2pBeIqX/nuLcuPKDhCXEKP 4DgC/Qa25oxcE75lyjZSz6eK3/IlthJcIqd5BQPEiNeiZzQfgZtZdLdabnCfBBZt sIPtMw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 47dj5p3xqd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Jun 2025 12:15:12 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id B398E40053; Fri, 27 Jun 2025 12:13:52 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 99C60B656AD; Fri, 27 Jun 2025 12:12:59 +0200 (CEST) Received: from localhost (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 27 Jun 2025 12:12:59 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 27 Jun 2025 12:12:58 +0200 Subject: [PATCH v2 3/3] i2c: stm32f7: support i2c_*_dma_safe_msg_buf APIs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250627-i2c-upstream-v2-3-8c14523481dc@foss.st.com> References: <20250627-i2c-upstream-v2-0-8c14523481dc@foss.st.com> In-Reply-To: <20250627-i2c-upstream-v2-0-8c14523481dc@foss.st.com> To: Pierre-Yves MORDRET , Alain Volmat , Andi Shyti , "Maxime Coquelin" , Alexandre Torgue , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , "M'boumba Cedric Madianga" , Wolfram Sang CC: Pierre-Yves MORDRET , , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-07fe9 X-Originating-IP: [10.48.86.185] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-27_03,2025-06-26_05,2025-03-28_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250627_031530_217592_CD61AA41 X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use the i2c-core-base APIs to allocate a DMA safe buffer when needed. Signed-off-by: Clément Le Goffic Acked-by: Alain Volmat --- drivers/i2c/busses/i2c-stm32f7.c | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c index 042386b4cabe..d06f0efdece3 100644 --- a/drivers/i2c/busses/i2c-stm32f7.c +++ b/drivers/i2c/busses/i2c-stm32f7.c @@ -742,9 +742,12 @@ static void stm32f7_i2c_dma_callback(void *arg) struct stm32f7_i2c_dev *i2c_dev = (struct stm32f7_i2c_dev *)arg; struct stm32_i2c_dma *dma = i2c_dev->dma; struct device *dev = dma->chan_using->device->dev; + struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; stm32f7_i2c_disable_dma_req(i2c_dev); dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); + if (!f7_msg->smbus) + i2c_put_dma_safe_msg_buf(f7_msg->buf, i2c_dev->msg, true); complete(&dma->dma_complete); } @@ -880,6 +883,7 @@ static void stm32f7_i2c_xfer_msg(struct stm32f7_i2c_dev *i2c_dev, { struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; void __iomem *base = i2c_dev->base; + u8 *dma_buf; u32 cr1, cr2; int ret; @@ -929,17 +933,23 @@ static void stm32f7_i2c_xfer_msg(struct stm32f7_i2c_dev *i2c_dev, /* Configure DMA or enable RX/TX interrupt */ i2c_dev->use_dma = false; - if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN - && !i2c_dev->atomic) { - ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, - msg->flags & I2C_M_RD, - f7_msg->count, f7_msg->buf, - stm32f7_i2c_dma_callback, - i2c_dev); - if (!ret) - i2c_dev->use_dma = true; - else - dev_warn(i2c_dev->dev, "can't use DMA\n"); + if (i2c_dev->dma && !i2c_dev->atomic) { + dma_buf = i2c_get_dma_safe_msg_buf(msg, STM32F7_I2C_DMA_LEN_MIN); + if (dma_buf) { + f7_msg->buf = dma_buf; + ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, + msg->flags & I2C_M_RD, + f7_msg->count, f7_msg->buf, + stm32f7_i2c_dma_callback, + i2c_dev); + if (ret) { + dev_warn(i2c_dev->dev, "can't use DMA\n"); + i2c_put_dma_safe_msg_buf(f7_msg->buf, msg, false); + f7_msg->buf = msg->buf; + } else { + i2c_dev->use_dma = true; + } + } } if (!i2c_dev->use_dma) { @@ -1626,6 +1636,8 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int irq, void *data) dmaengine_terminate_async(dma->chan_using); dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); + if (!f7_msg->smbus) + i2c_put_dma_safe_msg_buf(f7_msg->buf, i2c_dev->msg, false); } f7_msg->result = -ENXIO; } @@ -1648,6 +1660,8 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int irq, void *data) dmaengine_terminate_async(dma->chan_using); dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); + if (!f7_msg->smbus) + i2c_put_dma_safe_msg_buf(f7_msg->buf, i2c_dev->msg, false); f7_msg->result = -ETIMEDOUT; } } -- 2.43.0