From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC982C71130 for ; Mon, 7 Jul 2025 20:22:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=PmIWZnOpGht3prHb6RsW3V837EFwQM987QYSi3O8MXE=; b=DWKVfTK0qvVZIihunQ0F6z3gK5 z1+ZZwF3S+0Ek2x1z8PpvssZpWp/d85ndjv+9t8WUOvbsmSDv64K6ODTbyEVRyFyBYI91/ZZDWZyc 2ieZDpbEY3XoD6zGXGvQajQau+So41gTZn2W70J0Ipfpj+vHOoD5wfrdDugD6RczRAqiWdKUnJNIr KIcNX2OEkMkAvmY0M1CquqdUnhZwl0DfSN7Lli2wXS0agUK+/RovdkVjovXFojG+n+IG7j51bGYHs IXTen+x2PjehtkFnBG4+yonRsOA3SZVr1EPUUtj0Yghg5qdKQgbksnTvo9w9GkxlJJuaOjd39rHK4 He69unWQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uYsLb-00000003WOR-23Sx; Mon, 07 Jul 2025 20:21:55 +0000 Received: from finn.gateworks.com ([108.161.129.64] helo=finn.localdomain) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uYsGz-00000003Vmu-0xPs for linux-arm-kernel@lists.infradead.org; Mon, 07 Jul 2025 20:17:10 +0000 Received: from syn-068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.95) (envelope-from ) id 1uYsGv-008ZxD-VH; Mon, 07 Jul 2025 20:17:06 +0000 From: Tim Harvey To: linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Tim Harvey Subject: [PATCH 2/7] arm64: dts: imx8mp-venice-gw702x: Increase HS400 USDHC clock speed Date: Mon, 7 Jul 2025 13:16:57 -0700 Message-Id: <20250707201702.2930066-2-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250707201702.2930066-1-tharvey@gateworks.com> References: <20250707201702.2930066-1-tharvey@gateworks.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250707_131709_263022_EB8B0863 X-CRM114-Status: UNSURE ( 9.60 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The IMX8M reference manuals indicate in the USDHC Clock generator section that the clock rate for DDR is 1/2 the input clock therefore HS400 rates clocked at 200Mhz require a 400Mhz SDHC clock. This showed about a 1.5x improvement in read performance for the eMMC's used on the various imx8mp-venice boards. Fixes: 0d5b288c2110 ("arm64: dts: freescale: Add imx8mp-venice-gw7905-2x") Signed-off-by: Tim Harvey --- arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi index 10713c34ff39..cbf0c9a740fa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi @@ -434,6 +434,8 @@ &usdhc3 { pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; + assigned-clock-rates = <400000000>; bus-width = <8>; non-removable; status = "okay"; -- 2.25.1