From: Rob Herring <robh@kernel.org>
To: iuncuim <iuncuim@gmail.com>
Cc: Srinivas Kandagatla <srini@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Vasily Khoruzhick <anarsoul@gmail.com>,
Yangtao Li <tiny.windzz@gmail.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Maxime Ripard <mripard@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org
Subject: Re: [PATCH v2 2/8] dt-bindings: thermal: sun8i: Add A523 THS0/1 controllers
Date: Tue, 8 Jul 2025 16:31:05 -0500 [thread overview]
Message-ID: <20250708213105.GA1082606-robh@kernel.org> (raw)
In-Reply-To: <20250703151132.2642378-3-iuncuim@gmail.com>
On Thu, Jul 03, 2025 at 11:11:26PM +0800, iuncuim wrote:
> From: Mikhail Kalashnikov <iuncuim@gmail.com>
>
> Add a binding for D1/T113s thermal sensor controller. Add dt-bindings
> description of the thermal sensors in the A523 processor.
> The controllers require activation of the additional frequency of the
> associated gpadc controller, so a new clock property has been added.
>
> The calibration data is split into two cells that are in different areas
> of nvmem. Both controllers require access to both memory cell, so a new
> property nvmem-cells has been added. To maintain backward compatibility,
> the name of the old cell remains the same and the new nvmem-cell-names is
> called calibration-second-part
>
> Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
> ---
> .../thermal/allwinner,sun8i-a83t-ths.yaml | 49 +++++++++++++++++--
> 1 file changed, 46 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
> index 3e61689f6..80657435a 100644
> --- a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
> +++ b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
> @@ -24,18 +24,22 @@ properties:
> - allwinner,sun50i-h5-ths
> - allwinner,sun50i-h6-ths
> - allwinner,sun50i-h616-ths
> + - allwinner,sun55i-a523-ths0
> + - allwinner,sun55i-a523-ths1
>
> clocks:
> minItems: 1
> items:
> - description: Bus Clock
> - description: Module Clock
> + - description: GPADC Clock
You add a 3rd clock for everyone, but I don't see a conditional schema
keeping the existing users at 2 clocks (maxItems: 2).
>
> clock-names:
> minItems: 1
> items:
> - const: bus
> - const: mod
> + - const: gpadc
>
> reg:
> maxItems: 1
> @@ -47,11 +51,16 @@ properties:
> maxItems: 1
>
> nvmem-cells:
> - maxItems: 1
> - description: Calibration data for thermal sensors
> + minItems: 1
> + items:
> + - description: Calibration data for thermal sensors
> + - description: Additional cell in case of separate calibration data
>
> nvmem-cell-names:
> - const: calibration
> + minItems: 1
> + items:
> + - const: calibration
> + - const: calibration-second-part
>
> allwinner,sram:
> maxItems: 1
> @@ -107,6 +116,7 @@ allOf:
> enum:
> - allwinner,sun8i-h3-ths
> - allwinner,sun20i-d1-ths
> + - allwinner,sun55i-a523-ths0
>
> then:
> properties:
> @@ -132,6 +142,26 @@ allOf:
> - clock-names
> - resets
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - allwinner,sun55i-a523-ths0
> + - allwinner,sun55i-a523-ths1
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + clock-names:
> + items:
> + - const: bus
> + - const: gpadc
But if there's really still just 2 clocks, you need the last entry to be
'enum: [ mod, gpadc ]'
Though really, how can this h/w now not have a clock for itself?
> + nvmem-cells:
> + minItems: 2
> + nvmem-cell-names:
> + minItems: 2
Everyone else needs 'maxItems: 1'
> +
> required:
> - compatible
> - reg
> @@ -176,4 +206,17 @@ examples:
> #thermal-sensor-cells = <1>;
> };
>
> + - |
> + thermal-sensor@2009400 {
> + compatible = "allwinner,sun55i-a523-ths1";
> + reg = <0x02009400 0x400>;
> + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_GPADC1>;
> + clock-names = "bus", "gpadc";
> + resets = <&ccu RST_BUS_THS>;
> + nvmem-cells = <&ths_calibration0>, <&ths_calibration1>;
> + nvmem-cell-names = "calibration",
> + "calibration-second-part";
> + #thermal-sensor-cells = <1>;
> + };
> ...
> --
> 2.49.0
>
next prev parent reply other threads:[~2025-07-08 21:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-03 15:11 [PATCH v2 0/8] Allwinner: A523: add support for A523 THS0/1 controllers iuncuim
2025-07-03 15:11 ` [PATCH v2 1/8] dt-bindings: nvmem: SID: Add binding for A523 SID controller iuncuim
2025-07-08 17:06 ` Rob Herring (Arm)
2025-07-03 15:11 ` [PATCH v2 2/8] dt-bindings: thermal: sun8i: Add A523 THS0/1 controllers iuncuim
2025-07-08 21:31 ` Rob Herring [this message]
2025-07-03 15:11 ` [PATCH v2 3/8] thermal/drivers/sun8i: add gpadc clock iuncuim
2025-07-12 8:25 ` Chen-Yu Tsai
2025-07-03 15:11 ` [PATCH v2 4/8] thermal/drivers/sun8i: replace devm_reset_control_get to devm_reset_control_get_shared_deasserted iuncuim
2025-07-06 17:13 ` Chen-Yu Tsai
2025-07-03 15:11 ` [PATCH v2 5/8] thermal/drivers/sun8i: get calibration data from two nvmem cells iuncuim
2025-07-03 15:11 ` [PATCH v2 6/8] thermal/drivers/sun8i: Add support for A523 THS0/1 controllers iuncuim
2025-07-03 15:11 ` [PATCH v2 7/8] arm64: dts: allwinner: A523: Add SID controller node iuncuim
2025-07-03 15:11 ` [PATCH v2 8/8] arm64: dts: allwinner: A523: Add thermal sensors and zones iuncuim
2025-07-11 16:42 ` (subset) [PATCH v2 0/8] Allwinner: A523: add support for A523 THS0/1 controllers Srinivas Kandagatla
2025-07-12 7:57 ` Chen-Yu Tsai
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