From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0C9A4C83F1A for ; Mon, 21 Jul 2025 09:18:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pXMth0h5MXIGog1zO/KpPieo85FTxe9rczL2BiEm3Tk=; b=iMSP7/DOOEH2/7ea4pUv3nDOzq IzcxxKQs2xAUw1diTpHnuDlJVVaiYGWP/FsoVT9GwFuu5FM59VvujwaNLaVvqBWc4rv/0LLPelmRM PnmsMwDy8tk44u3ujFEW1H+e5eQaY1jXrwR+El7ZzNfM++g/ERt66A6MJrfkFwaJKQWeKaRd/ukp7 zq5mYKq6bBehNX6G0W9LdDb0K0On77nK7O4RTJAC1WIcqVw8DzPsyNeQxbYjV/J/qhX85yiBc3g4R aHqCQytFBm2KttkhfP5HkUnXv6v76UANax7IIm76X+0sLbS4Zx65aedbSc4JIuUDEp+lBWecPs8PN lodV4TXg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1udmen-0000000Gm9I-3kyQ; Mon, 21 Jul 2025 09:18:01 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1udm0k-0000000GgD2-3rvr for linux-arm-kernel@lists.infradead.org; Mon, 21 Jul 2025 08:36:40 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 901063105; Mon, 21 Jul 2025 01:36:32 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 959C63F66E; Mon, 21 Jul 2025 01:36:36 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org, oliver.upton@linux.dev, ardb@kernel.org, frederic@kernel.org, james.morse@arm.com, joey.gouly@arm.com, scott@os.amperecomputing.com, maz@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yeoreum Yun Subject: [PATCH v4 3/7] arm64/Kconfig: add LSUI Kconfig Date: Mon, 21 Jul 2025 09:36:14 +0100 Message-Id: <20250721083618.2743569-4-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250721083618.2743569-1-yeoreum.yun@arm.com> References: <20250721083618.2743569-1-yeoreum.yun@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250721_013638_994973_DE5EC1EF X-CRM114-Status: UNSURE ( 8.65 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since Armv9.6, FEAT_LSUI supplies the load/store instructions for previleged level to access to access user memory without clearing PSTATE.PAN bit. It's enough to add CONFIG_AS_HAS_LSUI only because the code for LUSI uses indiviual `.arch_extension` entries. Signed-off-by: Yeoreum Yun --- arch/arm64/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 393d71124f5d..c0beb44ed5b8 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2238,6 +2238,15 @@ config ARM64_GCS endmenu # "v9.4 architectural features" +config AS_HAS_LSUI + def_bool $(as-instr,.arch_extension lsui) + help + Unprivileged Load Store is an extension to introduce unprivileged + variants of load and store instructions so that clearing PSTATE.PAN + is never required in privileged mode. + This feature is available with clang version 20 and later and not yet + supported by gcc. + config ARM64_SVE bool "ARM Scalable Vector Extension support" default y -- LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}