From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29EF6C83F26 for ; Mon, 28 Jul 2025 15:53:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=c84xGmzk0WDtYO8pxiXJLl1Oz2OVFtl3JU/pJXFAfdc=; b=YqCczCEtHT9h24vqRRmVJrKZEA bRQh0beRF0j+p5LRGeDM6B+KbFHnAxkq1jscb+9miZWB8GGr3qmstC0be4JpYcZGY938K+s38y4bt DANMVzuwl5S5Xoq8vTXe4UUdcK22UQdV3r4DjtZSBEOmyrXO6j6HpTXDDhQ3ri//Lk23g2IyaTBAz GYHZQAfExuXvR6/Uu9ynYSHES61kRxbwQJYKSx3Hxk9y0T/YTA0C+DO+N/mEgz3C7nAlUS6X3+fiD x4xYr9k9vQA4PI5oRqqTd0i0ycyYEegldsS4PxT6xbDyxAq0OcXH0lheLtgs5dAEjabb1hR+6U8Dw jA5j89RQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1ugQAj-0000000EtWL-0C6J; Mon, 28 Jul 2025 15:53:53 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1ugPqm-0000000EpLu-1FYD for linux-arm-kernel@lists.infradead.org; Mon, 28 Jul 2025 15:33:18 +0000 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56SEjk2u023740; Mon, 28 Jul 2025 17:33:04 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= c84xGmzk0WDtYO8pxiXJLl1Oz2OVFtl3JU/pJXFAfdc=; b=nmLUHOJSOmejT17L CtsYu3DcFX6tN0GuzXqA7q1AfhjywxAlhtqkMd565axWcuuSzbeFx9G48Do300iK 5Wkae9PHKDlA9iIGcDI6JJf0Kjw9FxF/EDoHc/jQa5bKXlXEN7dwgOZPZnhUJ8ei qOaA1DmOJCwHNmvHuIrADfzDzO3mACPbbj08V/7PDwv21ynUFS62wabb1hC5lsp6 wuRKdLBeALeuE2GJkXwdC6Q4BTakPv+72DX4P5Gy/OnVq4leLXR2MyFePhS42G32 qMhC0KZK50s39CjwWyp6RxDVsvtQMvrPHhbNHGL5ztcr0GxZdfg/c5jYiTEgmRXN k3aG/Q== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 484pc28w3d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Jul 2025 17:33:04 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 3F45A40046; Mon, 28 Jul 2025 17:31:14 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 6B80F787C2C; Mon, 28 Jul 2025 17:29:52 +0200 (CEST) Received: from localhost (10.252.23.100) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 28 Jul 2025 17:29:52 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Mon, 28 Jul 2025 17:29:34 +0200 Subject: [PATCH v5 03/20] clk: stm32mp25: add firewall grant_access ops MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250728-ddrperfm-upstream-v5-3-03f1be8ad396@foss.st.com> References: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> In-Reply-To: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic , Julius Werner CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-8018a X-Originating-IP: [10.252.23.100] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-28_01,2025-03-28_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250728_083316_626212_1A4DB4F8 X-CRM114-Status: GOOD ( 16.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On STM32MP25, the RCC peripheral manages the secure level of resources that are used by other devices such as clocks. Declare this peripheral as a firewall controller. Signed-off-by: Clément Le Goffic --- drivers/clk/stm32/clk-stm32mp25.c | 40 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/clk/stm32/clk-stm32mp25.c b/drivers/clk/stm32/clk-stm32mp25.c index 52f0e8a12926..af4bc06d703a 100644 --- a/drivers/clk/stm32/clk-stm32mp25.c +++ b/drivers/clk/stm32/clk-stm32mp25.c @@ -4,8 +4,10 @@ * Author: Gabriel Fernandez for STMicroelectronics. */ +#include #include #include +#include #include #include @@ -1602,6 +1604,11 @@ static int stm32_rcc_get_access(void __iomem *base, u32 index) return 0; } +static int stm32mp25_rcc_grant_access(struct stm32_firewall_controller *ctrl, u32 firewall_id) +{ + return stm32_rcc_get_access(ctrl->mmio, firewall_id); +} + static int stm32mp25_check_security(struct device_node *np, void __iomem *base, const struct clock_config *cfg) { @@ -1970,6 +1977,7 @@ MODULE_DEVICE_TABLE(of, stm32mp25_match_data); static int stm32mp25_rcc_clocks_probe(struct platform_device *pdev) { + struct stm32_firewall_controller *rcc_controller; struct device *dev = &pdev->dev; void __iomem *base; int ret; @@ -1982,7 +1990,36 @@ static int stm32mp25_rcc_clocks_probe(struct platform_device *pdev) if (ret) return ret; - return stm32_rcc_init(dev, stm32mp25_match_data, base); + ret = stm32_rcc_init(dev, stm32mp25_match_data, base); + if (ret) + return ret; + + rcc_controller = devm_kzalloc(&pdev->dev, sizeof(*rcc_controller), GFP_KERNEL); + if (!rcc_controller) + return -ENOMEM; + + rcc_controller->dev = dev; + rcc_controller->mmio = base; + rcc_controller->name = dev_driver_string(dev); + rcc_controller->type = STM32_PERIPHERAL_FIREWALL; + rcc_controller->grant_access = stm32mp25_rcc_grant_access; + + platform_set_drvdata(pdev, rcc_controller); + + ret = stm32_firewall_controller_register(rcc_controller); + if (ret) { + dev_err(dev, "Couldn't register as a firewall controller: %d\n", ret); + return ret; + } + + return 0; +} + +static void stm32mp25_rcc_clocks_remove(struct platform_device *pdev) +{ + struct stm32_firewall_controller *rcc_controller = platform_get_drvdata(pdev); + + stm32_firewall_controller_unregister(rcc_controller); } static struct platform_driver stm32mp25_rcc_clocks_driver = { @@ -1991,6 +2028,7 @@ static struct platform_driver stm32mp25_rcc_clocks_driver = { .of_match_table = stm32mp25_match_data, }, .probe = stm32mp25_rcc_clocks_probe, + .remove = stm32mp25_rcc_clocks_remove, }; static int __init stm32mp25_clocks_init(void) -- 2.43.0