From: <enachman@marvell.com>
To: <andrew@lunn.ch>, <gregory.clement@bootlin.com>,
<sebastian.hesselbarth@gmail.com>, <tglx@linutronix.de>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: <enachman@marvell.com>
Subject: [PATCH] irqchip/mvebu-gicp: clear pending irqs on init
Date: Tue, 29 Jul 2025 11:48:26 +0300 [thread overview]
Message-ID: <20250729084826.3222785-1-enachman@marvell.com> (raw)
From: Elad Nachman <enachman@marvell.com>
For kexec case, left interrupt might generate spurious
interrupts in various A7/A8/CN913x interrupt system
from the I/O SB to the NB. Clear all pending interrupts
when the driver is initialized to prevent these spurious
interrupts.
Signed-off-by: Elad Nachman <enachman@marvell.com>
---
drivers/irqchip/irq-mvebu-gicp.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/irqchip/irq-mvebu-gicp.c b/drivers/irqchip/irq-mvebu-gicp.c
index d3232d6d8dce..0fa21a45d4e1 100644
--- a/drivers/irqchip/irq-mvebu-gicp.c
+++ b/drivers/irqchip/irq-mvebu-gicp.c
@@ -31,6 +31,7 @@ struct mvebu_gicp_spi_range {
struct mvebu_gicp {
struct mvebu_gicp_spi_range *spi_ranges;
+ void __iomem *base;
unsigned int spi_ranges_cnt;
unsigned int spi_cnt;
unsigned long *spi_bitmap;
@@ -236,6 +237,14 @@ static int mvebu_gicp_probe(struct platform_device *pdev)
return -ENODEV;
}
+ gicp->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(gicp->base))
+ dev_err(&pdev->dev, "gicp - Cannot ioremap !\n");
+ else {
+ for (i = 0; i < 64; i++)
+ writel(i, gicp->base + GICP_CLRSPI_NSR_OFFSET);
+ }
+
return msi_create_parent_irq_domain(&info, &gicp_msi_parent_ops) ? 0 : -ENOMEM;
}
--
2.25.1
next reply other threads:[~2025-07-29 8:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-29 8:48 enachman [this message]
2025-07-29 12:10 ` [PATCH] irqchip/mvebu-gicp: clear pending irqs on init Thomas Gleixner
2025-07-29 19:07 ` Markus Elfring
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