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From: Louis Chauvet <louis.chauvet@bootlin.com>
To: Jyri Sarha <jyri.sarha@iki.fi>,
	 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
	 Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	 David Airlie <airlied@gmail.com>,
	Simona Vetter <simona@ffwll.ch>,  Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Sam Ravnborg <sam@ravnborg.org>,  Benoit Parrot <bparrot@ti.com>,
	Lee Jones <lee@kernel.org>,  Nishanth Menon <nm@ti.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	 Tero Kristo <kristo@kernel.org>
Cc: thomas.petazzoni@bootlin.com, Jyri Sarha <jsarha@ti.com>,
	 Tomi Valkeinen <tomi.valkeinen@ti.com>,
	dri-devel@lists.freedesktop.org,  devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org,
	 Louis Chauvet <louis.chauvet@bootlin.com>
Subject: [PATCH 3/4] arm64: dts: ti: k3-am62-main: Add tidss clk-ctrl property
Date: Wed, 30 Jul 2025 19:02:46 +0200	[thread overview]
Message-ID: <20250730-fix-edge-handling-v1-3-1bdfb3fe7922@bootlin.com> (raw)
In-Reply-To: <20250730-fix-edge-handling-v1-0-1bdfb3fe7922@bootlin.com>

For am62 processors, we need to use the newly created clk-ctrl property to
properly handle data edge sampling configuration. Add them in the main
device tree.

Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platform Display SubSystem")
Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com>
---

Cc: stable@vger.kernel.org
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 9e0b6eee9ac77d66869915b2d7bec3e2275c03ea..d3131e6da8e70fde035d3c44716f939e8167795a 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -76,6 +76,11 @@ audio_refclk1: clock-controller@82e4 {
 			assigned-clock-parents = <&k3_clks 157 18>;
 			#clock-cells = <0>;
 		};
+
+		dss_clk_ctrl: dss_clk_ctrl@8300 {
+			compatible = "ti,am625-dss-clk-ctrl", "syscon";
+			reg = <0x8300 0x4>;
+		};
 	};
 
 	dmss: bus@48000000 {
@@ -787,6 +792,7 @@ dss: dss@30200000 {
 			 <&k3_clks 186 2>;
 		clock-names = "fck", "vp1", "vp2";
 		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+		ti,clk-ctrl = <&dss_clk_ctrl>;
 		status = "disabled";
 
 		dss_ports: ports {

-- 
2.50.1



  parent reply	other threads:[~2025-07-30 17:05 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-30 17:02 [PATCH 0/4] drm/tidss: Fixes data edge sampling Louis Chauvet
2025-07-30 17:02 ` [PATCH 1/4] dt-bindings: display: ti,am65x-dss: Add clk property for data edge synchronization Louis Chauvet
2025-07-30 23:56   ` Rob Herring
2025-07-31  9:50     ` Louis Chauvet
2025-07-30 17:02 ` [PATCH 2/4] dt-bindings: mfd: syscon: Add ti,am625-dss-clk-ctrl Louis Chauvet
2025-08-04  8:04   ` Krzysztof Kozlowski
2025-07-30 17:02 ` Louis Chauvet [this message]
2025-07-31  0:17   ` [PATCH 3/4] arm64: dts: ti: k3-am62-main: Add tidss clk-ctrl property Rob Herring
2025-07-31  9:50     ` Louis Chauvet
2025-08-05  6:44       ` Krzysztof Kozlowski
2025-08-11  9:56         ` Louis Chauvet
2025-07-30 17:02 ` [PATCH 4/4] drm/tidss: Fix sampling edge configuration Louis Chauvet
2025-08-04  8:06   ` Krzysztof Kozlowski
2025-08-08 13:46   ` devarsh
2025-08-08 16:26     ` Swamil Jain
2025-08-11  9:56       ` Louis Chauvet
2025-08-12 18:02         ` Swamil Jain
2025-08-12 18:10           ` Swamil Jain
2025-08-07 13:21 ` [PATCH 0/4] drm/tidss: Fixes data edge sampling Tomi Valkeinen
2025-08-08 13:24   ` devarsh
2025-08-11  7:56     ` Tomi Valkeinen
2025-08-11  9:56       ` Louis Chauvet

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