[PATCH 00/15] Add thermal management support for sama7d65

[PATCH 00/15] Add thermal management support for sama7d65

[Varshini Rajendran]

The thermal management system of sama7d65 includes

- Temperature sensor as a part of ADC channel
- Temperature calibration data retreived from the OTP memory for
  improved accuracy of the readings
- DVFS implementation
- And finally a thermal system with DVFS as cooling cell.

This patch series adds support for the following

- New and improved version of the OTP driver
- Adaptation of the above in existing DT, DT doc and ADC driver
- DVFS, OTP, ADC, Thermal system support in DT of new sama7d65

Varshini Rajendran (15):
  ARM: dts: microchip: sama7d65: add cpu opps
  nvmem: microchip-otpc: rework to access packets based on tag
  dt-bindings: microchip-otpc: update dt node example
  iio: adc: at91-sama5d2_adc: update calibration index, validation
    condition
  ARM: dts: microchip: sama7g5: add packet tag as offset for calib
  dt-bindings: nvmem: microchip-otpc: remove stride details
  iio: adc: at91-sama5d2_adc: add temp init function as callback
  dt-bindings: iio: adc: at91-sama5d2: document sama7d65
  iio: adc: at91-sama5d2_adc: adapt the driver for sama7d65
  ARM: dts: microchip: sama7d65: add node for the ADC
  dt-bindings: microchip-otpc: document sama7d65
  ARM: dts: microchip: sama7d65: add otpc node
  ARM: dts: microchip: sama7d65: add cells for temperature calibration
  ARM: dts: microchip: sama7d65: add temperature sensor
  ARM: dts: microchip: sama7d65: add thermal zones node

 .../bindings/iio/adc/atmel,sama5d2-adc.yaml   |   1 +
 .../nvmem/microchip,sama7g5-otpc.yaml         |  17 ++-
 .../dts/microchip/at91-sama7d65_curiosity.dts |  23 ++++
 arch/arm/boot/dts/microchip/sama7d65.dtsi     | 128 +++++++++++++++++
 arch/arm/boot/dts/microchip/sama7g5.dtsi      |   4 +-
 drivers/iio/adc/at91-sama5d2_adc.c            | 123 ++++++++++++++++-
 drivers/nvmem/microchip-otpc.c                | 130 ++++++++++++++----
 .../nvmem/microchip,sama7g5-otpc.h            |   6 -
 8 files changed, 383 insertions(+), 49 deletions(-)

-- 
2.34.1

[PATCH 01/15] ARM: dts: microchip: sama7d65: add cpu opps

[Varshini Rajendran]

Add CPU OPPs table for SAMA7D65.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 36 +++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index d08d773b1cc5..2e20a7532c03 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -32,6 +32,42 @@ cpu0: cpu@0 {
 			device_type = "cpu";
 			clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
 			clock-names = "cpu";
+			operating-points-v2 = <&cpu_opp_table>;
+		};
+	};
+
+	cpu_opp_table: opp-table {
+		compatible = "operating-points-v2";
+
+		opp-90000000 {
+			opp-hz = /bits/ 64 <90000000>;
+			opp-microvolt = <1050000 1050000 1225000>;
+			clock-latency-ns = <320000>;
+		};
+
+		opp-250000000 {
+			opp-hz = /bits/ 64 <250000000>;
+			opp-microvolt = <1050000 1050000 1225000>;
+			clock-latency-ns = <320000>;
+		};
+
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1050000 1050000 1225000>;
+			clock-latency-ns = <320000>;
+			opp-suspend;
+		};
+
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1150000 1125000 1225000>;
+			clock-latency-ns = <320000>;
+		};
+
+		opp-1000000002 {
+			opp-hz = /bits/ 64 <1000000002>;
+			opp-microvolt = <1250000 1225000 1300000>;
+			clock-latency-ns = <320000>;
 		};
 	};
 
-- 
2.34.1

[PATCH 02/15] nvmem: microchip-otpc: rework to access packets based on tag

[Varshini Rajendran]

Rework the driver to change the packet access technique based on the TAG
instead of the currently in use "id".

Since there is no way of knowing the OTP memory mapping in advance or the
changes it can go through with time, the id based approach is not reliable.
Accessing the packets based on the associated tags is a fail-proof
approach. This method is aided by adding a table of contents to store the
payload information which makes it easier to traverse through the OTP
memory and read the data of the intended packet. The stride of the nvmem
device is adjusted to 1 to support the TAG being treated as an offset.
The only reliable way to recognize a packet without being aware of the
flashed contents of the OTP memory is the TAG of the packet.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 drivers/nvmem/microchip-otpc.c | 130 +++++++++++++++++++++++++--------
 1 file changed, 101 insertions(+), 29 deletions(-)

diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
index df979e8549fd..e922c882af72 100644
--- a/drivers/nvmem/microchip-otpc.c
+++ b/drivers/nvmem/microchip-otpc.c
@@ -18,16 +18,27 @@
 #define MCHP_OTPC_CR_READ		BIT(6)
 #define MCHP_OTPC_MR			(0x4)
 #define MCHP_OTPC_MR_ADDR		GENMASK(31, 16)
+#define MCHP_OTPC_MR_EMUL		BIT(7)
 #define MCHP_OTPC_AR			(0x8)
 #define MCHP_OTPC_SR			(0xc)
 #define MCHP_OTPC_SR_READ		BIT(6)
 #define MCHP_OTPC_HR			(0x20)
 #define MCHP_OTPC_HR_SIZE		GENMASK(15, 8)
+#define MCHP_OTPC_HR_PACKET_TYPE	GENMASK(2, 0)
 #define MCHP_OTPC_DR			(0x24)
 
 #define MCHP_OTPC_NAME			"mchp-otpc"
 #define MCHP_OTPC_SIZE			(11 * 1024)
 
+enum packet_type {
+	PACKET_TYPE_REGULAR = 1,
+	PACKET_TYPE_KEY	= 2,
+	PACKET_TYPE_BOOT_CONFIG = 3,
+	PACKET_TYPE_SECURE_BOOT_CONFIG = 4,
+	PACKET_TYPE_HARDWARE_CONFIG = 5,
+	PACKET_TYPE_CUSTOM = 6,
+};
+
 /**
  * struct mchp_otpc - OTPC private data structure
  * @base: base address
@@ -42,6 +53,25 @@ struct mchp_otpc {
 	u32 npackets;
 };
 
+/**
+ * struct mchp_otpc_payload_info - OTP packet's payload information
+ *				retrieved from the packet's header
+ * @id: driver assigned packet ID
+ * @packet_offset: offset address of the packet to be written in the
+ *			register OTPC_MR.ADDR to access the packet
+ * @payload_length: length of the packet's payload
+ * @packet_type: type of the packet
+ * @packet_tag: TAG corresponding to the packet. Applicable for most
+ *		of the regular packets
+ */
+struct mchp_otpc_payload_info {
+	u32 id;
+	u32 packet_offset;
+	u32 payload_length;
+	u32 packet_type;
+	u32 packet_tag;
+};
+
 /**
  * struct mchp_otpc_packet - OTPC packet data structure
  * @list: list head
@@ -50,20 +80,16 @@ struct mchp_otpc {
  */
 struct mchp_otpc_packet {
 	struct list_head list;
-	u32 id;
-	u32 offset;
+	struct mchp_otpc_payload_info payload_info;
 };
 
-static struct mchp_otpc_packet *mchp_otpc_id_to_packet(struct mchp_otpc *otpc,
-						       u32 id)
+static struct mchp_otpc_packet *mchp_otpc_tag_to_packet(struct mchp_otpc *otpc,
+							u32 tag)
 {
 	struct mchp_otpc_packet *packet;
 
-	if (id >= otpc->npackets)
-		return NULL;
-
 	list_for_each_entry(packet, &otpc->packets, list) {
-		if (packet->id == id)
+		if (packet->payload_info.packet_tag == tag)
 			return packet;
 	}
 
@@ -140,8 +166,27 @@ static int mchp_otpc_prepare_read(struct mchp_otpc *otpc,
  * offset returned by hardware.
  *
  * For this, the read function will return the first requested bytes in the
- * packet. The user will have to be aware of the memory footprint before doing
- * the read request.
+ * packet. The user won't have to be aware of the memory footprint before doing
+ * the read request since it is abstracted and taken care by this driver.
+ *
+ * There is no way of knowing the Mapping of the OTP memory table in advance. In
+ * this read function the offset requested is treated as the identifier string
+ * i.e., Packet TAG, to acquire the payload with reliability. The packet Tag
+ * is the only way to recognize a packet without being aware of the flashed
+ * OTP memory map table.
+ */
+
+/**
+ * mchp_otpc_read() - Read the OTP packets and fill the buffer based on the TAG
+ *		      of the packet treated as the offset.
+ * @priv: Pointer to device structure.
+ * @off: offset of the OTP packet to be read. In this case, the TAG of the
+ *	 corresponding packet.
+ * @val: Pointer to data buffer
+ * @bytes: length of the buffer
+ *
+ * A value of zero will be returned on success, a negative errno will be
+ * returned in error cases.
  */
 static int mchp_otpc_read(void *priv, unsigned int off, void *val,
 			  size_t bytes)
@@ -154,30 +199,23 @@ static int mchp_otpc_read(void *priv, unsigned int off, void *val,
 	int ret, payload_size;
 
 	/*
-	 * We reach this point with off being multiple of stride = 4 to
-	 * be able to cross the subsystem. Inside the driver we use continuous
-	 * unsigned integer numbers for packet id, thus divide off by 4
-	 * before passing it to mchp_otpc_id_to_packet().
+	 * From this point the packet tag received as the offset has to be translated
+	 * into the actual packet. For this we traverse the table of contents stored
+	 * in a list "packet" and look for the tag.
 	 */
-	packet = mchp_otpc_id_to_packet(otpc, off / 4);
+
+	packet = mchp_otpc_tag_to_packet(otpc, off);
 	if (!packet)
 		return -EINVAL;
-	offset = packet->offset;
+	offset = packet->payload_info.packet_offset;
 
-	while (len < bytes) {
+	if (len < bytes) {
 		ret = mchp_otpc_prepare_read(otpc, offset);
 		if (ret)
 			return ret;
 
-		/* Read and save header content. */
-		*buf++ = readl_relaxed(otpc->base + MCHP_OTPC_HR);
-		len += sizeof(*buf);
-		offset++;
-		if (len >= bytes)
-			break;
-
 		/* Read and save payload content. */
-		payload_size = FIELD_GET(MCHP_OTPC_HR_SIZE, *(buf - 1));
+		payload_size = packet->payload_info.payload_length;
 		writel_relaxed(0UL, otpc->base + MCHP_OTPC_AR);
 		do {
 			*buf++ = readl_relaxed(otpc->base + MCHP_OTPC_DR);
@@ -190,6 +228,20 @@ static int mchp_otpc_read(void *priv, unsigned int off, void *val,
 	return 0;
 }
 
+static int mchp_otpc_read_packet_tag(struct mchp_otpc *otpc, unsigned int offset, unsigned int *val)
+{
+	int ret;
+
+	ret = mchp_otpc_prepare_read(otpc, offset);
+	if (ret)
+		return ret;
+
+	writel_relaxed(0UL, otpc->base + MCHP_OTPC_AR);
+	*val = readl_relaxed(otpc->base + MCHP_OTPC_DR);
+
+	return 0;
+}
+
 static int mchp_otpc_init_packets_list(struct mchp_otpc *otpc, u32 *size)
 {
 	struct mchp_otpc_packet *packet;
@@ -213,8 +265,15 @@ static int mchp_otpc_init_packets_list(struct mchp_otpc *otpc, u32 *size)
 		if (!packet)
 			return -ENOMEM;
 
-		packet->id = id++;
-		packet->offset = word_pos;
+		packet->payload_info.id = id++;
+		packet->payload_info.packet_offset = word_pos;
+		packet->payload_info.payload_length = payload_size;
+		packet->payload_info.packet_type = FIELD_GET(MCHP_OTPC_HR_PACKET_TYPE, word);
+
+		if (packet->payload_info.packet_type == PACKET_TYPE_REGULAR)
+			ret = mchp_otpc_read_packet_tag(otpc, packet->payload_info.packet_offset,
+							&packet->payload_info.packet_tag);
+
 		INIT_LIST_HEAD(&packet->list);
 		list_add_tail(&packet->list, &otpc->packets);
 
@@ -236,7 +295,7 @@ static struct nvmem_config mchp_nvmem_config = {
 	.type = NVMEM_TYPE_OTP,
 	.read_only = true,
 	.word_size = 4,
-	.stride = 4,
+	.stride = 1,
 	.reg_read = mchp_otpc_read,
 };
 
@@ -244,8 +303,9 @@ static int mchp_otpc_probe(struct platform_device *pdev)
 {
 	struct nvmem_device *nvmem;
 	struct mchp_otpc *otpc;
-	u32 size;
+	u32 size, tmp;
 	int ret;
+	bool emul_enable;
 
 	otpc = devm_kzalloc(&pdev->dev, sizeof(*otpc), GFP_KERNEL);
 	if (!otpc)
@@ -256,10 +316,22 @@ static int mchp_otpc_probe(struct platform_device *pdev)
 		return PTR_ERR(otpc->base);
 
 	otpc->dev = &pdev->dev;
+
+	tmp = readl_relaxed(otpc->base + MCHP_OTPC_MR);
+	emul_enable = tmp & MCHP_OTPC_MR_EMUL;
+	if (emul_enable)
+		dev_info(otpc->dev, "Emulation mode enabled\n");
+
 	ret = mchp_otpc_init_packets_list(otpc, &size);
 	if (ret)
 		return ret;
 
+	if (size == 0) {
+		dev_err(otpc->dev, "Cannot access OTP memory !\n");
+		if (!emul_enable)
+			dev_err(otpc->dev, "Boot packet not configured & Emulation mode not enabled !\n");
+	}
+
 	mchp_nvmem_config.dev = otpc->dev;
 	mchp_nvmem_config.add_legacy_fixed_of_cells = true;
 	mchp_nvmem_config.size = size;
-- 
2.34.1

Re: [PATCH 02/15] nvmem: microchip-otpc: rework to access packets based on tag

[Andy Shevchenko]

On Mon, Aug 4, 2025 at 12:03 PM Varshini Rajendran
<varshini.rajendran@microchip.com> wrote:
>
> Rework the driver to change the packet access technique based on the TAG
> instead of the currently in use "id".
>
> Since there is no way of knowing the OTP memory mapping in advance or the
> changes it can go through with time, the id based approach is not reliable.
> Accessing the packets based on the associated tags is a fail-proof
> approach. This method is aided by adding a table of contents to store the
> payload information which makes it easier to traverse through the OTP
> memory and read the data of the intended packet. The stride of the nvmem
> device is adjusted to 1 to support the TAG being treated as an offset.
> The only reliable way to recognize a packet without being aware of the
> flashed contents of the OTP memory is the TAG of the packet.

...

> +struct mchp_otpc_payload_info {
> +       u32 id;
> +       u32 packet_offset;
> +       u32 payload_length;
> +       u32 packet_type;
> +       u32 packet_tag;

Just wondering if these are okay to be in CPU endianess, i.o.w. is
this part of the protocol to HW, or is it simply Linux driver holding
values?

> +};

...

> +/**
> + * mchp_otpc_read() - Read the OTP packets and fill the buffer based on the TAG
> + *                   of the packet treated as the offset.
> + * @priv: Pointer to device structure.
> + * @off: offset of the OTP packet to be read. In this case, the TAG of the
> + *      corresponding packet.
> + * @val: Pointer to data buffer
> + * @bytes: length of the buffer
> + *
> + * A value of zero will be returned on success, a negative errno will be
> + * returned in error cases.

kernel-doc validator is not happy: Missing Return section.

>   */

...

> -       packet = mchp_otpc_id_to_packet(otpc, off / 4);
> +

Seems like a stray change (adding a blank line).

> +       packet = mchp_otpc_tag_to_packet(otpc, off);
>         if (!packet)
>                 return -EINVAL;

...

> +       writel_relaxed(0UL, otpc->base + MCHP_OTPC_AR);

Does UL give any value  / make any sense here?

...

> +       if (size == 0) {
> +               dev_err(otpc->dev, "Cannot access OTP memory !\n");
> +               if (!emul_enable)
> +                       dev_err(otpc->dev, "Boot packet not configured & Emulation mode not enabled !\n");

Stray space before the exclamation mark in both messages.

> +       }

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 02/15] nvmem: microchip-otpc: rework to access packets based on tag

[kernel test robot]

Hi Varshini,

kernel test robot noticed the following build warnings:

[auto build test WARNING on robh/for-next]
[also build test WARNING on jic23-iio/togreg v6.16]
[cannot apply to linus/master next-20250804]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Varshini-Rajendran/ARM-dts-microchip-sama7d65-add-cpu-opps/20250804-180839
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20250804100219.63325-3-varshini.rajendran%40microchip.com
patch subject: [PATCH 02/15] nvmem: microchip-otpc: rework to access packets based on tag
config: arc-randconfig-002-20250804 (https://download.01.org/0day-ci/archive/20250805/202508050141.HKFcYdLy-lkp@intel.com/config)
compiler: arc-linux-gcc (GCC) 13.4.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250805/202508050141.HKFcYdLy-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202508050141.HKFcYdLy-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> Warning: drivers/nvmem/microchip-otpc.c:83 struct member 'payload_info' not described in 'mchp_otpc_packet'
>> Warning: drivers/nvmem/microchip-otpc.c:83 Excess struct member 'id' description in 'mchp_otpc_packet'
>> Warning: drivers/nvmem/microchip-otpc.c:83 Excess struct member 'offset' description in 'mchp_otpc_packet'

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 02/15] nvmem: microchip-otpc: rework to access packets based on tag

[Krzysztof Kozlowski]

On Mon, Aug 04, 2025 at 03:32:06PM +0530, Varshini Rajendran wrote:
> +static struct mchp_otpc_packet *mchp_otpc_tag_to_packet(struct mchp_otpc *otpc,
> +							u32 tag)
>  {
>  	struct mchp_otpc_packet *packet;
>  
> -	if (id >= otpc->npackets)
> -		return NULL;
> -
>  	list_for_each_entry(packet, &otpc->packets, list) {
> -		if (packet->id == id)
> +		if (packet->payload_info.packet_tag == tag)
>  			return packet;
>  	}

As mentioned in bindings change, this looks like breaking all the users.

Best regards,
Krzysztof

[PATCH 03/15] dt-bindings: microchip-otpc: update dt node example

[Varshini Rajendran]

Update the example binding according to the new driver implementation.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml    | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
index cc25f2927682..e9059dce85ef 100644
--- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
+++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
@@ -42,9 +42,8 @@ examples:
         reg = <0xe8c00000 0xec>;
         #address-cells = <1>;
         #size-cells = <1>;
-
-        temperature_calib: calib@1 {
-            reg = <OTP_PKT(1) 76>;
+        temperature_calib: calib@41435354 {
+            reg = <0x41435354 0x4c>;        /* Temp calib data packet TAG */
         };
     };
 
-- 
2.34.1

Re: [PATCH 03/15] dt-bindings: microchip-otpc: update dt node example

[Krzysztof Kozlowski]

On Mon, Aug 04, 2025 at 03:32:07PM +0530, Varshini Rajendran wrote:
> Update the example binding according to the new driver implementation.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
>  .../devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml    | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> index cc25f2927682..e9059dce85ef 100644
> --- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
> @@ -42,9 +42,8 @@ examples:
>          reg = <0xe8c00000 0xec>;
>          #address-cells = <1>;
>          #size-cells = <1>;
> -
> -        temperature_calib: calib@1 {
> -            reg = <OTP_PKT(1) 76>;
> +        temperature_calib: calib@41435354 {

1. You did not clean up the header.
2. I looked briefly on your driver and it seems it changes the ABI
breaking users.

Best regards,
Krzysztof

[PATCH 04/15] iio: adc: at91-sama5d2_adc: update calibration index, validation condition

[Varshini Rajendran]

Add additional condition for validating the calibration data read from
the OTP through nvmem device interface. Adjust the calibration indexes
of sama7g5 according to the buffer received from the OTP memory.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 drivers/iio/adc/at91-sama5d2_adc.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
index c3450246730e..d952109a64a9 100644
--- a/drivers/iio/adc/at91-sama5d2_adc.c
+++ b/drivers/iio/adc/at91-sama5d2_adc.c
@@ -445,6 +445,14 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
 #define at91_adc_writel(st, reg, val)					\
 	writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
 
+/*
+ * The calibration data has a TAG to recognize the packet
+ * The tag has a constant value "ACST" with the ASCII
+ * equivalent 0x41435354. This is used to validate the
+ * calibration data obtained from the OTP.
+ */
+#define AT91_TEMP_CALIB_TAG	0x41435354
+
 /**
  * struct at91_adc_platform - at91-sama5d2 platform information struct
  * @layout:		pointer to the reg layout struct
@@ -504,10 +512,10 @@ struct at91_adc_temp_sensor_clb {
  * @AT91_ADC_TS_CLB_IDX_MAX: max index for temperature calibration packet in OTP
  */
 enum at91_adc_ts_clb_idx {
-	AT91_ADC_TS_CLB_IDX_P1 = 2,
-	AT91_ADC_TS_CLB_IDX_P4 = 5,
-	AT91_ADC_TS_CLB_IDX_P6 = 7,
-	AT91_ADC_TS_CLB_IDX_MAX = 19,
+	AT91_ADC_TS_CLB_IDX_P1 = 1,
+	AT91_ADC_TS_CLB_IDX_P4 = 4,
+	AT91_ADC_TS_CLB_IDX_P6 = 6,
+	AT91_ADC_TS_CLB_IDX_MAX = 18,
 };
 
 /* Temperature sensor calibration - Vtemp voltage sensitivity to temperature. */
@@ -2281,7 +2289,7 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
 		dev_err(dev, "Failed to read calibration data!\n");
 		return PTR_ERR(buf);
 	}
-	if (len < AT91_ADC_TS_CLB_IDX_MAX * 4) {
+	if (len < AT91_ADC_TS_CLB_IDX_MAX * 4  || buf[0] != AT91_TEMP_CALIB_TAG) {
 		dev_err(dev, "Invalid calibration data!\n");
 		ret = -EINVAL;
 		goto free_buf;
-- 
2.34.1

Re: [PATCH 04/15] iio: adc: at91-sama5d2_adc: update calibration index, validation condition

[Andy Shevchenko]

On Mon, Aug 4, 2025 at 12:03 PM Varshini Rajendran
<varshini.rajendran@microchip.com> wrote:
>
> Add additional condition for validating the calibration data read from
> the OTP through nvmem device interface. Adjust the calibration indexes
> of sama7g5 according to the buffer received from the OTP memory.


> +/*
> + * The calibration data has a TAG to recognize the packet
> + * The tag has a constant value "ACST" with the ASCII
> + * equivalent 0x41435354. This is used to validate the
> + * calibration data obtained from the OTP.
> + */
> +#define AT91_TEMP_CALIB_TAG    0x41435354

Just add the ASCII representation into the definition name.

For example,

AT91_TAG_ACST

or

AT91_CALIB_TAG_ACST

or choose the better one, but with an ACST token in it.

...

>  enum at91_adc_ts_clb_idx {
> -       AT91_ADC_TS_CLB_IDX_P1 = 2,
> -       AT91_ADC_TS_CLB_IDX_P4 = 5,
> -       AT91_ADC_TS_CLB_IDX_P6 = 7,
> -       AT91_ADC_TS_CLB_IDX_MAX = 19,
> +       AT91_ADC_TS_CLB_IDX_P1 = 1,
> +       AT91_ADC_TS_CLB_IDX_P4 = 4,
> +       AT91_ADC_TS_CLB_IDX_P6 = 6,
> +       AT91_ADC_TS_CLB_IDX_MAX = 18,

This MAX naming with the trailing comma is odd. Either remove MAX, or
remove trailing comma, or explain why moving from 19 to 18 has no side
effects here.

>  };


-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 04/15] iio: adc: at91-sama5d2_adc: update calibration index, validation condition

[Jonathan Cameron]

On Mon, 4 Aug 2025 15:32:08 +0530
Varshini Rajendran <varshini.rajendran@microchip.com> wrote:

> Add additional condition for validating the calibration data read from
> the OTP through nvmem device interface. Adjust the calibration indexes
> of sama7g5 according to the buffer received from the OTP memory.
Changing those indexes looks to me like either this was broken previously
or we are supporting something new (possibly at the expense of the older
support)

Or is this 'broken' by patch 2 and you are fixing it up here?
If so we normally try not to do that sort of change in multiple steps
because the patches may go via different trees and potentially only
part of it make it to upstream in a particular cycle.

Messy though it is, if you need to change indexes because something
broke doe it all in one patch.

> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
>  drivers/iio/adc/at91-sama5d2_adc.c | 18 +++++++++++++-----
>  1 file changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
> index c3450246730e..d952109a64a9 100644
> --- a/drivers/iio/adc/at91-sama5d2_adc.c
> +++ b/drivers/iio/adc/at91-sama5d2_adc.c
> @@ -445,6 +445,14 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
>  #define at91_adc_writel(st, reg, val)					\
>  	writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
>  
> +/*
> + * The calibration data has a TAG to recognize the packet
> + * The tag has a constant value "ACST" with the ASCII
> + * equivalent 0x41435354. This is used to validate the
> + * calibration data obtained from the OTP.
> + */
> +#define AT91_TEMP_CALIB_TAG	0x41435354

Could we treat it as a string and do a strcmp?  Main advantage
is this comment may become unneeded if the code is clear enough.

> +
>  /**
>   * struct at91_adc_platform - at91-sama5d2 platform information struct
>   * @layout:		pointer to the reg layout struct
> @@ -504,10 +512,10 @@ struct at91_adc_temp_sensor_clb {
>   * @AT91_ADC_TS_CLB_IDX_MAX: max index for temperature calibration packet in OTP
>   */
>  enum at91_adc_ts_clb_idx {
> -	AT91_ADC_TS_CLB_IDX_P1 = 2,
> -	AT91_ADC_TS_CLB_IDX_P4 = 5,
> -	AT91_ADC_TS_CLB_IDX_P6 = 7,
> -	AT91_ADC_TS_CLB_IDX_MAX = 19,
> +	AT91_ADC_TS_CLB_IDX_P1 = 1,
> +	AT91_ADC_TS_CLB_IDX_P4 = 4,
> +	AT91_ADC_TS_CLB_IDX_P6 = 6,
> +	AT91_ADC_TS_CLB_IDX_MAX = 18,
>  };
>  
>  /* Temperature sensor calibration - Vtemp voltage sensitivity to temperature. */
> @@ -2281,7 +2289,7 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
>  		dev_err(dev, "Failed to read calibration data!\n");
>  		return PTR_ERR(buf);
>  	}
> -	if (len < AT91_ADC_TS_CLB_IDX_MAX * 4) {
> +	if (len < AT91_ADC_TS_CLB_IDX_MAX * 4  || buf[0] != AT91_TEMP_CALIB_TAG) {
>  		dev_err(dev, "Invalid calibration data!\n");
>  		ret = -EINVAL;
>  		goto free_buf;
Not related to this patch, but this would be excellent place to deploy __free
u32 *buf __free(kfree) = nvmem_cell_read(temp_calib, &len);

then can directly return on error here and drop the kfree(buf) below.

[PATCH 05/15] ARM: dts: microchip: sama7g5: add packet tag as offset for calib

[Varshini Rajendran]

Add packet tag as offset to access temperature calibration data from otp
memory for sama7g5.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7g5.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index 17bcdcf0cf4a..62f946f3f894 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -1023,8 +1023,8 @@ otpc: efuse@e8c00000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			temperature_calib: calib@1 {
-				reg = <OTP_PKT(1) 76>;
+			temperature_calib: calib@41435354 {
+				reg = <0x41435354 0x4c>;	/* Temp calib data packet TAG */
 			};
 		};
 
-- 
2.34.1

Re: [PATCH 05/15] ARM: dts: microchip: sama7g5: add packet tag as offset for calib

[Krzysztof Kozlowski]

On Mon, Aug 04, 2025 at 03:32:09PM +0530, Varshini Rajendran wrote:
> Add packet tag as offset to access temperature calibration data from otp
> memory for sama7g5.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
>  arch/arm/boot/dts/microchip/sama7g5.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 

Not only driver breaks users, but also stuffing DTS change in the middle
of patchset instead of postponing it, breaks kernel.

Please learn how SoC trees are handled. This is clearly documented.

Best regards,
Krzysztof

[PATCH 06/15] dt-bindings: nvmem: microchip-otpc: remove stride details

[Varshini Rajendran]

Removed stride details from the bindings header as they are not relevant
anymore since the access method of OTP packets is changed to TAG
approach. Update the example binding according to the new changes.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 include/dt-bindings/nvmem/microchip,sama7g5-otpc.h | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/include/dt-bindings/nvmem/microchip,sama7g5-otpc.h b/include/dt-bindings/nvmem/microchip,sama7g5-otpc.h
index f570b23165a2..682b040675fd 100644
--- a/include/dt-bindings/nvmem/microchip,sama7g5-otpc.h
+++ b/include/dt-bindings/nvmem/microchip,sama7g5-otpc.h
@@ -3,10 +3,4 @@
 #ifndef _DT_BINDINGS_NVMEM_MICROCHIP_OTPC_H
 #define _DT_BINDINGS_NVMEM_MICROCHIP_OTPC_H
 
-/*
- * Need to have it as a multiple of 4 as NVMEM memory is registered with
- * stride = 4.
- */
-#define OTP_PKT(id)			((id) * 4)
-
 #endif
-- 
2.34.1

Re: [PATCH 06/15] dt-bindings: nvmem: microchip-otpc: remove stride details

[Krzysztof Kozlowski]

On Mon, Aug 04, 2025 at 03:32:10PM +0530, Varshini Rajendran wrote:
> Removed stride details from the bindings header as they are not relevant
> anymore since the access method of OTP packets is changed to TAG
> approach. Update the example binding according to the new changes.

Where?

This was supposed to be one commit.

Best regards,
Krzysztof

[PATCH 07/15] iio: adc: at91-sama5d2_adc: add temp init function as callback

[Varshini Rajendran]

Adding the temperature sensor init function as a callback function.
The temperature sensor initialisation sequence is handled differently
for each platform. The same is added to the platform data of the
corresponding device. This allows us to handle new devices like
sama7d65.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 drivers/iio/adc/at91-sama5d2_adc.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
index d952109a64a9..916682e326c7 100644
--- a/drivers/iio/adc/at91-sama5d2_adc.c
+++ b/drivers/iio/adc/at91-sama5d2_adc.c
@@ -453,6 +453,10 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
  */
 #define AT91_TEMP_CALIB_TAG	0x41435354
 
+struct at91_adc_state;
+static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
+				     struct device *dev);
+
 /**
  * struct at91_adc_platform - at91-sama5d2 platform information struct
  * @layout:		pointer to the reg layout struct
@@ -472,6 +476,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
  * @chan_realbits:	realbits for registered channels
  * @temp_chan:		temperature channel index
  * @temp_sensor:	temperature sensor supported
+ * @temp_init:		callback function to initialize the temperature sensor
+ *			with its calibration data
  */
 struct at91_adc_platform {
 	const struct at91_adc_reg_layout	*layout;
@@ -489,6 +495,7 @@ struct at91_adc_platform {
 	unsigned int				chan_realbits;
 	unsigned int				temp_chan;
 	bool					temp_sensor;
+	int (*temp_init)(struct at91_adc_state *st, struct device *dev);
 };
 
 /**
@@ -729,6 +736,7 @@ static const struct at91_adc_platform sama5d2_platform = {
 	.oversampling_avail = { 1, 4, 16, },
 	.oversampling_avail_no = 3,
 	.chan_realbits = 14,
+	.temp_init = at91_adc_temp_sensor_init,
 };
 
 static const struct at91_adc_platform sama7g5_platform = {
@@ -753,6 +761,7 @@ static const struct at91_adc_platform sama7g5_platform = {
 	.chan_realbits = 16,
 	.temp_sensor = true,
 	.temp_chan = AT91_SAMA7G5_ADC_TEMP_CHANNEL,
+	.temp_init = at91_adc_temp_sensor_init,
 };
 
 static int at91_adc_chan_xlate(struct iio_dev *indio_dev, int chan)
@@ -2328,7 +2337,7 @@ static int at91_adc_probe(struct platform_device *pdev)
 
 	st->soc_info.platform = device_get_match_data(dev);
 
-	ret = at91_adc_temp_sensor_init(st, &pdev->dev);
+	ret = st->soc_info.platform->temp_init(st, &pdev->dev);
 	/* Don't register temperature channel if initialization failed. */
 	if (ret)
 		num_channels = st->soc_info.platform->max_channels - 1;
-- 
2.34.1

Re: [PATCH 07/15] iio: adc: at91-sama5d2_adc: add temp init function as callback

[Andy Shevchenko]

On Mon, Aug 4, 2025 at 12:03 PM Varshini Rajendran
<varshini.rajendran@microchip.com> wrote:
>
> Adding the temperature sensor init function as a callback function.
> The temperature sensor initialisation sequence is handled differently
> for each platform. The same is added to the platform data of the
> corresponding device. This allows us to handle new devices like
> sama7d65.

...

> +struct at91_adc_state;
> +static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
> +                                    struct device *dev);

Isn't it possible to avoid forward declaration for the function?

-- 
With Best Regards,
Andy Shevchenko

[PATCH 08/15] dt-bindings: iio: adc: at91-sama5d2: document sama7d65

[Varshini Rajendran]

Add dt-binding documentation for sama7d65 ADC.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml b/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml
index 4817b840977a..e8a65fdcd018 100644
--- a/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml
@@ -15,6 +15,7 @@ properties:
       - atmel,sama5d2-adc
       - microchip,sam9x60-adc
       - microchip,sama7g5-adc
+      - microchip,sama7d65-adc
 
   reg:
     maxItems: 1
-- 
2.34.1

Re: [PATCH 08/15] dt-bindings: iio: adc: at91-sama5d2: document sama7d65

[Krzysztof Kozlowski]

On Mon, Aug 04, 2025 at 03:32:12PM +0530, Varshini Rajendran wrote:
> Add dt-binding documentation for sama7d65 ADC.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
>  Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 09/15] iio: adc: at91-sama5d2_adc: adapt the driver for sama7d65

[Varshini Rajendran]

Add support to sama7d65 ADC. The differences are highlighted with the
compatible. The init and parsing of the temperature sensor and
calibration indexes are the main differences.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 drivers/iio/adc/at91-sama5d2_adc.c | 94 ++++++++++++++++++++++++++++++
 1 file changed, 94 insertions(+)

diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
index 916682e326c7..909841b84834 100644
--- a/drivers/iio/adc/at91-sama5d2_adc.c
+++ b/drivers/iio/adc/at91-sama5d2_adc.c
@@ -456,6 +456,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
 struct at91_adc_state;
 static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
 				     struct device *dev);
+static int at91_sama7d65_adc_temp_sensor_init(struct at91_adc_state *st,
+					      struct device *dev);
 
 /**
  * struct at91_adc_platform - at91-sama5d2 platform information struct
@@ -525,6 +527,20 @@ enum at91_adc_ts_clb_idx {
 	AT91_ADC_TS_CLB_IDX_MAX = 18,
 };
 
+/**
+ * enum at91_sama7d65_adc_ts_clb_idx - calibration indexes in sama7d65 NVMEM buffer
+ * @AT91_SAMA7D65_ADC_TS_CLB_IDX_P1: index for FT1_TEMP equivalent to P1 * (10 ^ 6)
+ * @AT91_SAMA7D65_ADC_TS_CLB_IDX_P4: index for FT1_VPAT equivalent to P4
+ * @AT91_SAMA7D65_ADC_TS_CLB_IDX_P6: index for FT2_VBG equivalent to P6
+ * @AT91_SAMA7D65_ADC_TS_CLB_IDX_MAX: max index for temperature calibration packet in OTP
+ */
+enum at91_sama7d65_adc_ts_clb_idx {
+	AT91_SAMA7D65_ADC_TS_CLB_IDX_P1 = 2,
+	AT91_SAMA7D65_ADC_TS_CLB_IDX_P4 = 1,
+	AT91_SAMA7D65_ADC_TS_CLB_IDX_P6 = 4,
+	AT91_SAMA7D65_ADC_TS_CLB_IDX_MAX = 10,
+};
+
 /* Temperature sensor calibration - Vtemp voltage sensitivity to temperature. */
 #define AT91_ADC_TS_VTEMP_DT		(2080U)
 
@@ -764,6 +780,31 @@ static const struct at91_adc_platform sama7g5_platform = {
 	.temp_init = at91_adc_temp_sensor_init,
 };
 
+static const struct at91_adc_platform sama7d65_platform = {
+	.layout = &sama7g5_layout,
+	.adc_channels = &at91_sama7g5_adc_channels,
+#define AT91_SAMA7D65_SINGLE_CHAN_CNT	16
+#define AT91_SAMA7D65_DIFF_CHAN_CNT	8
+#define AT91_SAMA7D65_TEMP_CHAN_CNT	1
+	.nr_channels = AT91_SAMA7D65_SINGLE_CHAN_CNT +
+		       AT91_SAMA7D65_DIFF_CHAN_CNT +
+		       AT91_SAMA7D65_TEMP_CHAN_CNT,
+#define AT91_SAMA7D65_MAX_CHAN_IDX	(AT91_SAMA7D65_SINGLE_CHAN_CNT + \
+					AT91_SAMA7D65_DIFF_CHAN_CNT + \
+					AT91_SAMA7D65_TEMP_CHAN_CNT)
+	.max_channels = ARRAY_SIZE(at91_sama7g5_adc_channels),
+	.max_index = AT91_SAMA7D65_MAX_CHAN_IDX,
+#define AT91_SAMA7G5_HW_TRIG_CNT	3
+	.hw_trig_cnt = AT91_SAMA7G5_HW_TRIG_CNT,
+	.osr_mask = GENMASK(18, 16),
+	.oversampling_avail = { 1, 4, 16, 64, 256, },
+	.oversampling_avail_no = 5,
+	.chan_realbits = 16,
+	.temp_sensor = true,
+	.temp_chan = AT91_SAMA7G5_ADC_TEMP_CHANNEL,
+	.temp_init = at91_sama7d65_adc_temp_sensor_init,
+};
+
 static int at91_adc_chan_xlate(struct iio_dev *indio_dev, int chan)
 {
 	int i;
@@ -2319,6 +2360,56 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
 	return ret;
 }
 
+static int at91_sama7d65_adc_temp_sensor_init(struct at91_adc_state *st,
+					      struct device *dev)
+{
+	struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb;
+	struct nvmem_cell *temp_calib;
+	u32 *buf = NULL;
+	size_t len;
+	int ret = 0;
+
+	if (!st->soc_info.platform->temp_sensor)
+		return 0;
+
+	/* Get the calibration data from NVMEM. */
+	temp_calib = devm_nvmem_cell_get(dev, "temperature_calib");
+	if (IS_ERR(temp_calib)) {
+		ret = PTR_ERR(temp_calib);
+		if (ret != -ENOENT)
+			dev_err(dev, "Failed to get temperature_calib cell!\n");
+		return ret;
+	}
+
+	buf = nvmem_cell_read(temp_calib, &len);
+	if (IS_ERR(buf)) {
+		dev_err(dev, "Failed to read calibration data!\n");
+		return PTR_ERR(buf);
+	}
+
+	if (len < AT91_SAMA7D65_ADC_TS_CLB_IDX_MAX * sizeof(u32) ||
+	    buf[0] != AT91_TEMP_CALIB_TAG) {
+		dev_err(dev, "Invalid calibration data!\n");
+		ret = -EINVAL;
+		goto free_buf;
+	}
+
+	/* Store calibration data for later use. */
+	clb->p1 = buf[AT91_SAMA7D65_ADC_TS_CLB_IDX_P1];
+	clb->p4 = buf[AT91_SAMA7D65_ADC_TS_CLB_IDX_P4];
+	clb->p6 = buf[AT91_SAMA7D65_ADC_TS_CLB_IDX_P6];
+
+	/*
+	 * We prepare here the conversion to milli from micro to avoid
+	 * doing it on hotpath.
+	 */
+	clb->p1 = clb->p1 / 1000;
+
+free_buf:
+	kfree(buf);
+	return ret;
+}
+
 static int at91_adc_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -2633,6 +2724,9 @@ static const struct of_device_id at91_adc_dt_match[] = {
 	}, {
 		.compatible = "microchip,sama7g5-adc",
 		.data = (const void *)&sama7g5_platform,
+	}, {
+		.compatible = "microchip,sama7d65-adc",
+		.data = (const void *)&sama7d65_platform,
 	}, {
 		/* sentinel */
 	}
-- 
2.34.1

Re: [PATCH 09/15] iio: adc: at91-sama5d2_adc: adapt the driver for sama7d65

[Andy Shevchenko]

On Mon, Aug 4, 2025 at 12:03 PM Varshini Rajendran
<varshini.rajendran@microchip.com> wrote:
>
> Add support to sama7d65 ADC. The differences are highlighted with the
> compatible. The init and parsing of the temperature sensor and
> calibration indexes are the main differences.

...

> +static int at91_sama7d65_adc_temp_sensor_init(struct at91_adc_state *st,
> +                                             struct device *dev);

Again, please try to avoid forward declarations. They make code harder
to maintain.

...

> +enum at91_sama7d65_adc_ts_clb_idx {
> +       AT91_SAMA7D65_ADC_TS_CLB_IDX_P1 = 2,
> +       AT91_SAMA7D65_ADC_TS_CLB_IDX_P4 = 1,
> +       AT91_SAMA7D65_ADC_TS_CLB_IDX_P6 = 4,
> +       AT91_SAMA7D65_ADC_TS_CLB_IDX_MAX = 10,

MAX and trailing comma are odd when they go together.

> +};

...

> +static const struct at91_adc_platform sama7d65_platform = {
> +       .layout = &sama7g5_layout,
> +       .adc_channels = &at91_sama7g5_adc_channels,
> +#define AT91_SAMA7D65_SINGLE_CHAN_CNT  16
> +#define AT91_SAMA7D65_DIFF_CHAN_CNT    8
> +#define AT91_SAMA7D65_TEMP_CHAN_CNT    1
> +       .nr_channels = AT91_SAMA7D65_SINGLE_CHAN_CNT +
> +                      AT91_SAMA7D65_DIFF_CHAN_CNT +
> +                      AT91_SAMA7D65_TEMP_CHAN_CNT,
> +#define AT91_SAMA7D65_MAX_CHAN_IDX     (AT91_SAMA7D65_SINGLE_CHAN_CNT + \
> +                                       AT91_SAMA7D65_DIFF_CHAN_CNT + \
> +                                       AT91_SAMA7D65_TEMP_CHAN_CNT)
> +       .max_channels = ARRAY_SIZE(at91_sama7g5_adc_channels),
> +       .max_index = AT91_SAMA7D65_MAX_CHAN_IDX,
> +#define AT91_SAMA7G5_HW_TRIG_CNT       3
> +       .hw_trig_cnt = AT91_SAMA7G5_HW_TRIG_CNT,
> +       .osr_mask = GENMASK(18, 16),
> +       .oversampling_avail = { 1, 4, 16, 64, 256, },
> +       .oversampling_avail_no = 5,
> +       .chan_realbits = 16,
> +       .temp_sensor = true,
> +       .temp_chan = AT91_SAMA7G5_ADC_TEMP_CHANNEL,
> +       .temp_init = at91_sama7d65_adc_temp_sensor_init,
> +};

It's harder to read the static assignment interleaved by the sparse
definitions. Can't you group definitions followed by the initialiser?

...

> +static int at91_sama7d65_adc_temp_sensor_init(struct at91_adc_state *st,
> +                                             struct device *dev)
> +{
> +       struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb;
> +       struct nvmem_cell *temp_calib;
> +       u32 *buf = NULL;

What for this NULL initialiser?

> +       size_t len;
> +       int ret = 0;

This initialisation can be avoided (see below how).

> +       if (!st->soc_info.platform->temp_sensor)
> +               return 0;
> +
> +       /* Get the calibration data from NVMEM. */
> +       temp_calib = devm_nvmem_cell_get(dev, "temperature_calib");
> +       if (IS_ERR(temp_calib)) {
> +               ret = PTR_ERR(temp_calib);
> +               if (ret != -ENOENT)
> +                       dev_err(dev, "Failed to get temperature_calib cell!\n");
> +               return ret;
> +       }
> +
> +       buf = nvmem_cell_read(temp_calib, &len);
> +       if (IS_ERR(buf)) {
> +               dev_err(dev, "Failed to read calibration data!\n");
> +               return PTR_ERR(buf);
> +       }

...

> +       /*
> +        * We prepare here the conversion to milli from micro to avoid

Here we prepare the...

> +        * doing it on hotpath.
> +        */

...

> +free_buf:
> +       kfree(buf);
> +       return ret;

Can't use cleanup.h? I.e. __free().

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 09/15] iio: adc: at91-sama5d2_adc: adapt the driver for sama7d65

[Jonathan Cameron]

On Mon, 4 Aug 2025 15:32:13 +0530
Varshini Rajendran <varshini.rajendran@microchip.com> wrote:

> Add support to sama7d65 ADC. The differences are highlighted with the
> compatible. The init and parsing of the temperature sensor and
> calibration indexes are the main differences.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
...

>  static int at91_adc_chan_xlate(struct iio_dev *indio_dev, int chan)
>  {
>  	int i;
> @@ -2319,6 +2360,56 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
>  	return ret;
>  }
>  
> +static int at91_sama7d65_adc_temp_sensor_init(struct at91_adc_state *st,
> +					      struct device *dev)
> +{
> +	struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb;
> +	struct nvmem_cell *temp_calib;
> +	u32 *buf = NULL;

As per earlier comment and I see Andy raised it as well. __free()
magic dust is useful here.

> +	size_t len;
> +	int ret = 0;
> +
> +	if (!st->soc_info.platform->temp_sensor)
> +		return 0;
> +
> +	/* Get the calibration data from NVMEM. */
> +	temp_calib = devm_nvmem_cell_get(dev, "temperature_calib");
> +	if (IS_ERR(temp_calib)) {
> +		ret = PTR_ERR(temp_calib);
> +		if (ret != -ENOENT)
> +			dev_err(dev, "Failed to get temperature_calib cell!\n");
> +		return ret;
> +	}
> +
> +	buf = nvmem_cell_read(temp_calib, &len);
> +	if (IS_ERR(buf)) {
> +		dev_err(dev, "Failed to read calibration data!\n");
> +		return PTR_ERR(buf);
> +	}
> +
> +	if (len < AT91_SAMA7D65_ADC_TS_CLB_IDX_MAX * sizeof(u32) ||
> +	    buf[0] != AT91_TEMP_CALIB_TAG) {
> +		dev_err(dev, "Invalid calibration data!\n");
> +		ret = -EINVAL;
> +		goto free_buf;
> +	}
> +
> +	/* Store calibration data for later use. */
> +	clb->p1 = buf[AT91_SAMA7D65_ADC_TS_CLB_IDX_P1];
> +	clb->p4 = buf[AT91_SAMA7D65_ADC_TS_CLB_IDX_P4];
> +	clb->p6 = buf[AT91_SAMA7D65_ADC_TS_CLB_IDX_P6];

only these indexes and the MAX check above make this different from
the existing function.  Maybe we could just store those instead
of a function pointer in the device type specific structure.

> +
> +	/*
> +	 * We prepare here the conversion to milli from micro to avoid
> +	 * doing it on hotpath.
> +	 */
> +	clb->p1 = clb->p1 / 1000;
> +
> +free_buf:
> +	kfree(buf);
> +	return ret;
> +}

[PATCH 10/15] ARM: dts: microchip: sama7d65: add node for the ADC

[Varshini Rajendran]

Add node for the ADC controller in sama7d65 SoC. Also add corresponding
regulator and pinmux for the ADC.

Signed-off-by: Romain Sioen <romain.sioen@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 .../dts/microchip/at91-sama7d65_curiosity.dts | 23 +++++++++++++++
 arch/arm/boot/dts/microchip/sama7d65.dtsi     | 29 +++++++++++++++++++
 2 files changed, 52 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
index 7250823a6f59..7ecc748456ba 100644
--- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
@@ -41,6 +41,14 @@ reg_5v: regulator-5v {
 
 };
 
+&adc {
+	vddana-supply = <&vddout25>;
+	vref-supply = <&vddout25>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>;
+	status = "okay";
+};
+
 &dma0 {
 	status = "okay";
 };
@@ -278,6 +286,16 @@ &main_xtal {
 };
 
 &pioa {
+	pinctrl_adc_default: adc_default {
+		pinmux = <PIN_PC5__GPIO>;
+		bias-disable;
+	};
+
+	pinctrl_adtrg_default: adtrg-default {
+		pinmux = <PIN_PB7__ADTRG>;
+		bias-pull-up;
+	};
+
 	pinctrl_gmac0_default: gmac0-default {
 		pinmux = <PIN_PA26__G0_TX0>,
 			 <PIN_PA27__G0_TX1>,
@@ -373,3 +391,8 @@ input@0 {
 &slow_xtal {
 	clock-frequency = <32768>;
 };
+
+&vddout25 {
+	vin-supply = <&vdd_3v3>;
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 2e20a7532c03..1f249323d08a 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/clock/at91.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/mfd/at91-usart.h>
@@ -83,6 +84,16 @@ slow_xtal: clock-slowxtal {
 		};
 	};
 
+	vddout25: fixed-regulator-vddout25 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VDDOUT25";
+		regulator-min-microvolt = <2500000>;
+		regulator-max-microvolt = <2500000>;
+		regulator-boot-on;
+		status = "disabled";
+	};
+
 	ns_sram: sram@100000 {
 		compatible = "mmio-sram";
 		reg = <0x100000 0x20000>;
@@ -199,6 +210,24 @@ chipid@e0020000 {
 			reg = <0xe0020000 0x8>;
 		};
 
+		adc: adc@e1000000 {
+			compatible = "microchip,sama7d65-adc";
+			reg = <0xe1000000 0x200>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmc PMC_TYPE_GCK 25>;
+			assigned-clocks = <&pmc PMC_TYPE_GCK 25>;
+			assigned-clock-rates = <100000000>;
+			clock-names = "adc_clk";
+			dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+			dma-names = "rx";
+			atmel,min-sample-rate-hz = <200000>;
+			atmel,max-sample-rate-hz = <20000000>;
+			atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
+			atmel,startup-time-ms = <4>;
+			#io-channel-cells = <1>;
+			status = "disabled";
+		};
+
 		dma2: dma-controller@e1200000 {
 			compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
 			reg = <0xe1200000 0x1000>;
-- 
2.34.1

[PATCH 11/15] dt-bindings: microchip-otpc: document sama7d65

[Varshini Rajendran]

Add microchip,sama7d65-otpc to DT bindings documentation.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 .../bindings/nvmem/microchip,sama7g5-otpc.yaml       | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
index e9059dce85ef..43625c9d6af5 100644
--- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
+++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
@@ -20,9 +20,15 @@ allOf:
 
 properties:
   compatible:
-    items:
-      - const: microchip,sama7g5-otpc
-      - const: syscon
+    oneOf:
+      - items:
+          - const: microchip,sama7g5-otpc
+          - const: syscon
+      - items:
+          - enum:
+              - microchip,sama7d65-otpc
+          - const: microchip,sama7g5-otpc
+          - const: syscon
 
   reg:
     maxItems: 1
-- 
2.34.1

Re: [PATCH 11/15] dt-bindings: microchip-otpc: document sama7d65

[Krzysztof Kozlowski]

On Mon, Aug 04, 2025 at 03:32:15PM +0530, Varshini Rajendran wrote:
> Add microchip,sama7d65-otpc to DT bindings documentation.

We see that from the diff. Explain the hardware. Is it compatible with
existing one? How much compatible?

> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
>  .../bindings/nvmem/microchip,sama7g5-otpc.yaml       | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)

Please use subject prefixes matching the subsystem. You can get them for
example with 'git log --oneline -- DIRECTORY_OR_FILE' on the directory
your patch is touching. For bindings, the preferred subjects are
explained here:
https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters

This applies to all your patches, because several of them have the same
issue.

Best regards,
Krzysztof

[PATCH 12/15] ARM: dts: microchip: sama7d65: add otpc node

[Varshini Rajendran]

Add OTPC node along with temperature calibration cell.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 1f249323d08a..1d3708c76202 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -15,6 +15,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/mfd/at91-usart.h>
+#include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
 
 / {
 	model = "Microchip SAMA7D65 family SoC";
@@ -638,6 +639,17 @@ ddr3phy: ddr3phy@e3804000 {
 			reg = <0xe3804000 0x1000>;
 		};
 
+		otpc: efuse@e8c00000 {
+			compatible = "microchip,sama7d65-otpc", "microchip,sama7g5-otpc", "syscon";
+			reg = <0xe8c00000 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			temperature_calib: calib@41435354 {
+				reg = <0x41435354 0x2c>;	/* Temp calib data packet TAG */
+			};
+		};
+
 		gic: interrupt-controller@e8c11000 {
 			compatible = "arm,cortex-a7-gic";
 			reg = <0xe8c11000 0x1000>,
-- 
2.34.1

[PATCH 13/15] ARM: dts: microchip: sama7d65: add cells for temperature calibration

[Varshini Rajendran]

Add NVMEM cell to ADC for temperature calibration data.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 1d3708c76202..5d1f6684f64f 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -226,6 +226,8 @@ adc: adc@e1000000 {
 			atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
 			atmel,startup-time-ms = <4>;
 			#io-channel-cells = <1>;
+			nvmem-cells = <&temperature_calib>;
+			nvmem-cell-names = "temperature_calib";
 			status = "disabled";
 		};
 
-- 
2.34.1

[PATCH 14/15] ARM: dts: microchip: sama7d65: add temperature sensor

[Varshini Rajendran]

Add temperature sensor node.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 5d1f6684f64f..aefdd72cb59c 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -103,6 +103,13 @@ ns_sram: sram@100000 {
 		#size-cells = <1>;
 	};
 
+	thermal_sensor: thermal-sensor {
+		compatible = "generic-adc-thermal";
+		#thermal-sensor-cells = <0>;
+		io-channels = <&adc AT91_SAMA7G5_ADC_TEMP_CHANNEL>;
+		io-channel-names = "sensor-channel";
+	};
+
 	soc {
 		compatible = "simple-bus";
 		ranges;
-- 
2.34.1

[PATCH 15/15] ARM: dts: microchip: sama7d65: add thermal zones node

[Varshini Rajendran]

Add thermal zones node with its associated trips and cooling-maps.
It uses CPUFreq as cooling device for temperatures in the interval
[90, 100) degrees Celsius and describe the temperature of 100 degrees
Celsius as critical temperature. System will be is shutting down when
reaching critical temperature.

Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 42 +++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index aefdd72cb59c..a4e5ef6a9cf2 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -16,6 +16,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/mfd/at91-usart.h>
 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	model = "Microchip SAMA7D65 family SoC";
@@ -35,6 +36,7 @@ cpu0: cpu@0 {
 			clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
 			clock-names = "cpu";
 			operating-points-v2 = <&cpu_opp_table>;
+			#cooling-cells = <2>; /* min followed by max */
 		};
 	};
 
@@ -110,6 +112,46 @@ thermal_sensor: thermal-sensor {
 		io-channel-names = "sensor-channel";
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <1000>;
+			polling-delay = <5000>;
+			thermal-sensors = <&thermal_sensor>;
+
+			trips {
+				cpu_normal: cpu-alert0 {
+					temperature = <90000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				cpu_hot: cpu-alert1 {
+					temperature = <95000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				cpu_critical: cpu-critical {
+					temperature = <100000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_normal>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map1 {
+					trip = <&cpu_hot>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		ranges;
-- 
2.34.1