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* [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra
@ 2025-08-12  2:57 Jimmy Hon
  2025-08-12  2:57 ` [PATCH 2/2] arm64: dts: rockchip: enable NPU on OPI5/5B Jimmy Hon
  2025-08-24 10:54 ` (subset) [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra Heiko Stuebner
  0 siblings, 2 replies; 3+ messages in thread
From: Jimmy Hon @ 2025-08-12  2:57 UTC (permalink / raw)
  To: Heiko Stuebner, Cenk Uluisik, Johannes Erdfelt
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel, linux-rockchip, Jimmy Hon

The NPU on the Orange Pi 5 uses the same regulator for both the
sram-supply and the npu's supply. Add this regulator, and enable all
the NPU bits. Also add the regulator as a domain-supply to the pd_npu
power domain.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
---
 .../boot/dts/rockchip/rk3588-orangepi-5.dtsi  | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi
index 91d56c34a1e4..ac1df223d6a2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi
@@ -258,6 +258,28 @@ regulator-state-mem {
 	};
 };
 
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1m2_xfer>;
+	status = "okay";
+
+	vdd_npu_s0: regulator@42 {
+		compatible = "rockchip,rk8602";
+		reg = <0x42>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_npu_s0";
+		regulator-boot-on;
+		regulator-min-microvolt = <550000>;
+		regulator-max-microvolt = <950000>;
+		regulator-ramp-delay = <2300>;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
 &i2c6 {
 	clock-frequency = <400000>;
 	status = "okay";
@@ -352,6 +374,40 @@ &pd_gpu {
 	domain-supply = <&vdd_gpu_s0>;
 };
 
+&pd_npu {
+	domain-supply = <&vdd_npu_s0>;
+};
+
+&rknn_core_0 {
+	npu-supply = <&vdd_npu_s0>;
+	sram-supply = <&vdd_npu_s0>;
+	status = "okay";
+};
+
+&rknn_core_1 {
+	npu-supply = <&vdd_npu_s0>;
+	sram-supply = <&vdd_npu_s0>;
+	status = "okay";
+};
+
+&rknn_core_2 {
+	npu-supply = <&vdd_npu_s0>;
+	sram-supply = <&vdd_npu_s0>;
+	status = "okay";
+};
+
+&rknn_mmu_0 {
+	status = "okay";
+};
+
+&rknn_mmu_1 {
+	status = "okay";
+};
+
+&rknn_mmu_2 {
+	status = "okay";
+};
+
 &saradc {
 	vref-supply = <&vcc_1v8_s0>;
 	status = "okay";
-- 
2.50.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 2/2] arm64: dts: rockchip: enable NPU on OPI5/5B
  2025-08-12  2:57 [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra Jimmy Hon
@ 2025-08-12  2:57 ` Jimmy Hon
  2025-08-24 10:54 ` (subset) [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra Heiko Stuebner
  1 sibling, 0 replies; 3+ messages in thread
From: Jimmy Hon @ 2025-08-12  2:57 UTC (permalink / raw)
  To: Heiko Stuebner, Cenk Uluisik, Johannes Erdfelt
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, devicetree,
	linux-arm-kernel, linux-rockchip, Jimmy Hon

The NPU on the Orange Pi 5/5B uses the same regulator for both the
sram-supply and the npu's supply. Enable all the NPU bits. Also add
the regulator as a domain-supply to the pd_npu power domain.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
---
 .../boot/dts/rockchip/rk3588s-orangepi-5.dtsi | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
index 4fedc50cce8c..65a06ce8c131 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
@@ -377,6 +377,10 @@ &pd_gpu {
 	domain-supply = <&vdd_gpu_s0>;
 };
 
+&pd_npu {
+	domain-supply = <&vdd_npu_s0>;
+};
+
 &pinctrl {
 	hym8563 {
 		hym8563_int: hym8563-int {
@@ -407,6 +411,36 @@ &pwm0 {
 	status = "okay";
 };
 
+&rknn_core_0 {
+	npu-supply = <&vdd_npu_s0>;
+	sram-supply = <&vdd_npu_s0>;
+	status = "okay";
+};
+
+&rknn_core_1 {
+	npu-supply = <&vdd_npu_s0>;
+	sram-supply = <&vdd_npu_s0>;
+	status = "okay";
+};
+
+&rknn_core_2 {
+	npu-supply = <&vdd_npu_s0>;
+	sram-supply = <&vdd_npu_s0>;
+	status = "okay";
+};
+
+&rknn_mmu_0 {
+	status = "okay";
+};
+
+&rknn_mmu_1 {
+	status = "okay";
+};
+
+&rknn_mmu_2 {
+	status = "okay";
+};
+
 &saradc {
 	vref-supply = <&avcc_1v8_s0>;
 	status = "okay";
-- 
2.50.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: (subset) [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra
  2025-08-12  2:57 [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra Jimmy Hon
  2025-08-12  2:57 ` [PATCH 2/2] arm64: dts: rockchip: enable NPU on OPI5/5B Jimmy Hon
@ 2025-08-24 10:54 ` Heiko Stuebner
  1 sibling, 0 replies; 3+ messages in thread
From: Heiko Stuebner @ 2025-08-24 10:54 UTC (permalink / raw)
  To: Cenk Uluisik, Johannes Erdfelt, Jimmy Hon
  Cc: Heiko Stuebner, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	devicetree, linux-arm-kernel, linux-rockchip


On Mon, 11 Aug 2025 21:57:54 -0500, Jimmy Hon wrote:
> The NPU on the Orange Pi 5 uses the same regulator for both the
> sram-supply and the npu's supply. Add this regulator, and enable all
> the NPU bits. Also add the regulator as a domain-supply to the pd_npu
> power domain.
> 
> 

Applied, thanks!

[2/2] arm64: dts: rockchip: enable NPU on OPI5/5B
      commit: b3d7fb3fb2227259aa2fc54916cc808614f3ac24

I picked the other patch from Maud for the RK3588-without-s
Orange-Pis a bit earlier. While yours was earlier, they are
effectively the same, so I just picked up the 2nd one for the
rk3588s boards now.


Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2025-08-24 11:11 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2025-08-12  2:57 [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra Jimmy Hon
2025-08-12  2:57 ` [PATCH 2/2] arm64: dts: rockchip: enable NPU on OPI5/5B Jimmy Hon
2025-08-24 10:54 ` (subset) [PATCH 1/2] arm64: dts: rockchip: enable NPU on OPI5 Plus/Max/Ultra Heiko Stuebner

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