From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27D4DCA0EE4 for ; Wed, 13 Aug 2025 15:28:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=YVDMBQ57GBt7ulYkoD26HKO0YilHVo0kQsoal9H/YKg=; b=bJDVkFQ2DwnKVI7BwfdFI8G6oW BoOxuaw1aJEXnT6NPUmX8ItKu7dYpBrYQF54jwjFKYe0zuI1tD5m5m2Eq5p3oyCNArn9rCEM0EQcH /Vrhp0SoHcLiLX9/3Ln25tNVVE7jN1xJmtUkD3u5F3A7Ieg1mHA3LS48mLOslYcqTEbWTDEtdjvQc ztabsMnnJ8aSlx7jVWF/Kx2XuiYlsNcGzMHN0WjwNmF9srJ50C4g9sL1igFd4zFqSNuGoFbEBGsAo DhOa4OHOATEhUiTC8A4+8lDHXxPjHM6DiQ0F4FbkMrjHQV6ajgMZnnyQcCA+EzN7YYPzb0BUkGCJ9 KzIu+7vg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1umDOX-0000000EBXE-15jd; Wed, 13 Aug 2025 15:28:05 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1umCtL-0000000E4lY-4Baw for linux-arm-kernel@lists.infradead.org; Wed, 13 Aug 2025 14:56:05 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 3C6205C69B1; Wed, 13 Aug 2025 14:55:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DA19DC4CEFA; Wed, 13 Aug 2025 14:55:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1755096950; bh=RVal9HTE3KtH+mFNbn3brWgtrY/W+HjmgbacLzq8U5E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S33giej8gHnlgi+xgSwr0e1NDi6b4ipyxr/RH4dmTP6GI2PtXGbI3UUfcPozZdXpe AUdAlv7mLk4VzoqPs+eeM1oNQpV4K4+Z9aZyZaIFHvYv3ffQG0otokJQsBzr/GKPH+ pWibPmGhQEafDsimQfSldAMA7ojQee4ioiiUyvbq+C4TC6c//9wLyyaB9o+cIFgo4p S+2xtgW/cLcf8OpFVU/P02sVhDjW9bUEb2IgIYgH7Bf4qRTrJxvdH+T7nL9UinTQSW HwTHNKFKAZC4YU4JIWJvS99+gzCS780gxur6pNFTfhhkrXczynhxGISzpaWapUM1Li A+bHLu56J9Geg== Received: by wens.tw (Postfix, from userid 1000) id 4A4C85FF90; Wed, 13 Aug 2025 22:55:45 +0800 (CST) From: Chen-Yu Tsai To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara Subject: [PATCH net-next v2 07/10] arm64: dts: allwinner: a527: cubie-a5e: Enable second Ethernet port Date: Wed, 13 Aug 2025 22:55:37 +0800 Message-Id: <20250813145540.2577789-8-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250813145540.2577789-1-wens@kernel.org> References: <20250813145540.2577789-1-wens@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250813_075552_236239_07EEE887 X-CRM114-Status: GOOD ( 13.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Chen-Yu Tsai On the Radxa Cubie A5E board, the second Ethernet controller, aka the GMAC200, is connected to a second external Maxio MAE0621A PHY. The PHY uses an external 25MHz crystal, and has the SoC's PJ16 pin connected to its reset pin. Enable the second Ethernet port. Also fix up the label for the existing external PHY connected to the first Ethernet port. An enable delay for the PHY supply regulator is added to make sure the PHY's internal regulators are fully powered and the PHY is operational. Signed-off-by: Chen-Yu Tsai --- Changes since v1: - Switch to generic (tx|rx)-internal-delay-ps properties - Add PHY regulator delay --- .../dts/allwinner/sun55i-a527-cubie-a5e.dts | 28 +++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts index d4cee2222104..e96a419faf21 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts @@ -14,6 +14,7 @@ / { aliases { ethernet0 = &gmac0; + ethernet1 = &gmac1; serial0 = &uart0; }; @@ -76,7 +77,7 @@ &ehci1 { &gmac0 { phy-mode = "rgmii-id"; - phy-handle = <&ext_rgmii_phy>; + phy-handle = <&ext_rgmii0_phy>; phy-supply = <®_cldo3>; allwinner,tx-delay-ps = <300>; @@ -85,13 +86,24 @@ &gmac0 { status = "okay"; }; +&gmac1 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii1_phy>; + phy-supply = <®_cldo4>; + + tx-internal-delay-ps = <300>; + rx-internal-delay-ps = <400>; + + status = "okay"; +}; + &gpu { mali-supply = <®_dcdc2>; status = "okay"; }; &mdio0 { - ext_rgmii_phy: ethernet-phy@1 { + ext_rgmii0_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ @@ -100,6 +112,16 @@ ext_rgmii_phy: ethernet-phy@1 { }; }; +&mdio1 { + ext_rgmii1_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-gpios = <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; +}; + &mmc0 { vmmc-supply = <®_cldo3>; cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ @@ -240,6 +262,8 @@ reg_cldo4: cldo4 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc-pj-phy"; + /* enough time for the PHY to fully power on */ + regulator-enable-ramp-delay = <150000>; }; reg_cpusldo: cpusldo { -- 2.39.5